stm32f4xx_hal_fmpsmbus.c 98 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_fmpsmbus.c
  4. * @author MCD Application Team
  5. * @brief FMPSMBUS HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the System Management Bus (SMBus) peripheral,
  8. * based on I2C principles of operation :
  9. * + Initialization and de-initialization functions
  10. * + IO operation functions
  11. * + Peripheral State and Errors functions
  12. *
  13. @verbatim
  14. ==============================================================================
  15. ##### How to use this driver #####
  16. ==============================================================================
  17. [..]
  18. The FMPSMBUS HAL driver can be used as follows:
  19. (#) Declare a FMPSMBUS_HandleTypeDef handle structure, for example:
  20. FMPSMBUS_HandleTypeDef hfmpsmbus;
  21. (#)Initialize the FMPSMBUS low level resources by implementing the @ref HAL_FMPSMBUS_MspInit() API:
  22. (##) Enable the FMPSMBUSx interface clock
  23. (##) FMPSMBUS pins configuration
  24. (+++) Enable the clock for the FMPSMBUS GPIOs
  25. (+++) Configure FMPSMBUS pins as alternate function open-drain
  26. (##) NVIC configuration if you need to use interrupt process
  27. (+++) Configure the FMPSMBUSx interrupt priority
  28. (+++) Enable the NVIC FMPSMBUS IRQ Channel
  29. (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing mode,
  30. Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
  31. Peripheral mode and Packet Error Check mode in the hfmpsmbus Init structure.
  32. (#) Initialize the FMPSMBUS registers by calling the @ref HAL_FMPSMBUS_Init() API:
  33. (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  34. by calling the customized @ref HAL_FMPSMBUS_MspInit(&hfmpsmbus) API.
  35. (#) To check if target device is ready for communication, use the function @ref HAL_FMPSMBUS_IsDeviceReady()
  36. (#) For FMPSMBUS IO operations, only one mode of operations is available within this driver
  37. *** Interrupt mode IO operation ***
  38. ===================================
  39. [..]
  40. (+) Transmit in master/host FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Master_Transmit_IT()
  41. (++) At transmission end of transfer @ref HAL_FMPSMBUS_MasterTxCpltCallback() is executed and user can
  42. add his own code by customization of function pointer @ref HAL_FMPSMBUS_MasterTxCpltCallback()
  43. (+) Receive in master/host FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Master_Receive_IT()
  44. (++) At reception end of transfer @ref HAL_FMPSMBUS_MasterRxCpltCallback() is executed and user can
  45. add his own code by customization of function pointer @ref HAL_FMPSMBUS_MasterRxCpltCallback()
  46. (+) Abort a master/host FMPSMBUS process communication with Interrupt using @ref HAL_FMPSMBUS_Master_Abort_IT()
  47. (++) The associated previous transfer callback is called at the end of abort process
  48. (++) mean @ref HAL_FMPSMBUS_MasterTxCpltCallback() in case of previous state was master transmit
  49. (++) mean @ref HAL_FMPSMBUS_MasterRxCpltCallback() in case of previous state was master receive
  50. (+) Enable/disable the Address listen mode in slave/device or host/slave FMPSMBUS mode
  51. using @ref HAL_FMPSMBUS_EnableListen_IT() @ref HAL_FMPSMBUS_DisableListen_IT()
  52. (++) When address slave/device FMPSMBUS match, @ref HAL_FMPSMBUS_AddrCallback() is executed and user can
  53. add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
  54. (++) At Listen mode end @ref HAL_FMPSMBUS_ListenCpltCallback() is executed and user can
  55. add his own code by customization of function pointer @ref HAL_FMPSMBUS_ListenCpltCallback()
  56. (+) Transmit in slave/device FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Slave_Transmit_IT()
  57. (++) At transmission end of transfer @ref HAL_FMPSMBUS_SlaveTxCpltCallback() is executed and user can
  58. add his own code by customization of function pointer @ref HAL_FMPSMBUS_SlaveTxCpltCallback()
  59. (+) Receive in slave/device FMPSMBUS mode an amount of data in non-blocking mode using @ref HAL_FMPSMBUS_Slave_Receive_IT()
  60. (++) At reception end of transfer @ref HAL_FMPSMBUS_SlaveRxCpltCallback() is executed and user can
  61. add his own code by customization of function pointer @ref HAL_FMPSMBUS_SlaveRxCpltCallback()
  62. (+) Enable/Disable the FMPSMBUS alert mode using @ref HAL_FMPSMBUS_EnableAlert_IT() @ref HAL_FMPSMBUS_DisableAlert_IT()
  63. (++) When FMPSMBUS Alert is generated @ref HAL_FMPSMBUS_ErrorCallback() is executed and user can
  64. add his own code by customization of function pointer @ref HAL_FMPSMBUS_ErrorCallback()
  65. to check the Alert Error Code using function @ref HAL_FMPSMBUS_GetError()
  66. (+) Get HAL state machine or error values using @ref HAL_FMPSMBUS_GetState() or @ref HAL_FMPSMBUS_GetError()
  67. (+) In case of transfer Error, @ref HAL_FMPSMBUS_ErrorCallback() function is executed and user can
  68. add his own code by customization of function pointer @ref HAL_FMPSMBUS_ErrorCallback()
  69. to check the Error Code using function @ref HAL_FMPSMBUS_GetError()
  70. *** FMPSMBUS HAL driver macros list ***
  71. ==================================
  72. [..]
  73. Below the list of most used macros in FMPSMBUS HAL driver.
  74. (+) @ref __HAL_FMPSMBUS_ENABLE: Enable the FMPSMBUS peripheral
  75. (+) @ref __HAL_FMPSMBUS_DISABLE: Disable the FMPSMBUS peripheral
  76. (+) @ref __HAL_FMPSMBUS_GET_FLAG: Check whether the specified FMPSMBUS flag is set or not
  77. (+) @ref __HAL_FMPSMBUS_CLEAR_FLAG: Clear the specified FMPSMBUS pending flag
  78. (+) @ref __HAL_FMPSMBUS_ENABLE_IT: Enable the specified FMPSMBUS interrupt
  79. (+) @ref __HAL_FMPSMBUS_DISABLE_IT: Disable the specified FMPSMBUS interrupt
  80. *** Callback registration ***
  81. =============================================
  82. [..]
  83. The compilation flag USE_HAL_FMPSMBUS_REGISTER_CALLBACKS when set to 1
  84. allows the user to configure dynamically the driver callbacks.
  85. Use Functions @ref HAL_FMPSMBUS_RegisterCallback() or @ref HAL_FMPSMBUS_RegisterAddrCallback()
  86. to register an interrupt callback.
  87. [..]
  88. Function @ref HAL_FMPSMBUS_RegisterCallback() allows to register following callbacks:
  89. (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  90. (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  91. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
  92. (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
  93. (+) ListenCpltCallback : callback for end of listen mode.
  94. (+) ErrorCallback : callback for error detection.
  95. (+) MspInitCallback : callback for Msp Init.
  96. (+) MspDeInitCallback : callback for Msp DeInit.
  97. This function takes as parameters the HAL peripheral handle, the Callback ID
  98. and a pointer to the user callback function.
  99. [..]
  100. For specific callback AddrCallback use dedicated register callbacks : @ref HAL_FMPSMBUS_RegisterAddrCallback.
  101. [..]
  102. Use function @ref HAL_FMPSMBUS_UnRegisterCallback to reset a callback to the default
  103. weak function.
  104. @ref HAL_FMPSMBUS_UnRegisterCallback takes as parameters the HAL peripheral handle,
  105. and the Callback ID.
  106. This function allows to reset following callbacks:
  107. (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
  108. (+) MasterRxCpltCallback : callback for Master reception end of transfer.
  109. (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer.
  110. (+) SlaveRxCpltCallback : callback for Slave reception end of transfer.
  111. (+) ListenCpltCallback : callback for end of listen mode.
  112. (+) ErrorCallback : callback for error detection.
  113. (+) MspInitCallback : callback for Msp Init.
  114. (+) MspDeInitCallback : callback for Msp DeInit.
  115. [..]
  116. For callback AddrCallback use dedicated register callbacks : @ref HAL_FMPSMBUS_UnRegisterAddrCallback.
  117. [..]
  118. By default, after the @ref HAL_FMPSMBUS_Init() and when the state is @ref HAL_FMPI2C_STATE_RESET
  119. all callbacks are set to the corresponding weak functions:
  120. examples @ref HAL_FMPSMBUS_MasterTxCpltCallback(), @ref HAL_FMPSMBUS_MasterRxCpltCallback().
  121. Exception done for MspInit and MspDeInit functions that are
  122. reset to the legacy weak functions in the @ref HAL_FMPSMBUS_Init()/ @ref HAL_FMPSMBUS_DeInit() only when
  123. these callbacks are null (not registered beforehand).
  124. If MspInit or MspDeInit are not null, the @ref HAL_FMPSMBUS_Init()/ @ref HAL_FMPSMBUS_DeInit()
  125. keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
  126. [..]
  127. Callbacks can be registered/unregistered in @ref HAL_FMPI2C_STATE_READY state only.
  128. Exception done MspInit/MspDeInit functions that can be registered/unregistered
  129. in @ref HAL_FMPI2C_STATE_READY or @ref HAL_FMPI2C_STATE_RESET state,
  130. thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
  131. Then, the user first registers the MspInit/MspDeInit user callbacks
  132. using @ref HAL_FMPSMBUS_RegisterCallback() before calling @ref HAL_FMPSMBUS_DeInit()
  133. or @ref HAL_FMPSMBUS_Init() function.
  134. [..]
  135. When the compilation flag USE_HAL_FMPSMBUS_REGISTER_CALLBACKS is set to 0 or
  136. not defined, the callback registration feature is not available and all callbacks
  137. are set to the corresponding weak functions.
  138. [..]
  139. (@) You can refer to the FMPSMBUS HAL driver header file for more useful macros
  140. @endverbatim
  141. ******************************************************************************
  142. * @attention
  143. *
  144. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  145. * All rights reserved.</center></h2>
  146. *
  147. * This software component is licensed by ST under BSD 3-Clause license,
  148. * the "License"; You may not use this file except in compliance with the
  149. * License. You may obtain a copy of the License at:
  150. * opensource.org/licenses/BSD-3-Clause
  151. *
  152. ******************************************************************************
  153. */
  154. /* Includes ------------------------------------------------------------------*/
  155. #include "stm32f4xx_hal.h"
  156. /** @addtogroup STM32F4xx_HAL_Driver
  157. * @{
  158. */
  159. /** @defgroup FMPSMBUS FMPSMBUS
  160. * @brief FMPSMBUS HAL module driver
  161. * @{
  162. */
  163. #ifdef HAL_FMPSMBUS_MODULE_ENABLED
  164. #if defined(FMPI2C_CR1_PE)
  165. /* Private typedef -----------------------------------------------------------*/
  166. /* Private constants ---------------------------------------------------------*/
  167. /** @defgroup FMPSMBUS_Private_Define FMPSMBUS Private Constants
  168. * @{
  169. */
  170. #define TIMING_CLEAR_MASK (0xF0FFFFFFUL) /*!< FMPSMBUS TIMING clear register Mask */
  171. #define HAL_TIMEOUT_ADDR (10000U) /*!< 10 s */
  172. #define HAL_TIMEOUT_BUSY (25U) /*!< 25 ms */
  173. #define HAL_TIMEOUT_DIR (25U) /*!< 25 ms */
  174. #define HAL_TIMEOUT_RXNE (25U) /*!< 25 ms */
  175. #define HAL_TIMEOUT_STOPF (25U) /*!< 25 ms */
  176. #define HAL_TIMEOUT_TC (25U) /*!< 25 ms */
  177. #define HAL_TIMEOUT_TCR (25U) /*!< 25 ms */
  178. #define HAL_TIMEOUT_TXIS (25U) /*!< 25 ms */
  179. #define MAX_NBYTE_SIZE 255U
  180. /**
  181. * @}
  182. */
  183. /* Private macro -------------------------------------------------------------*/
  184. /* Private variables ---------------------------------------------------------*/
  185. /* Private function prototypes -----------------------------------------------*/
  186. /** @addtogroup FMPSMBUS_Private_Functions FMPSMBUS Private Functions
  187. * @{
  188. */
  189. static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status,
  190. uint32_t Timeout);
  191. static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
  192. static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest);
  193. static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
  194. static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags);
  195. static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus);
  196. static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus);
  197. static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
  198. uint32_t Request);
  199. /**
  200. * @}
  201. */
  202. /* Exported functions --------------------------------------------------------*/
  203. /** @defgroup FMPSMBUS_Exported_Functions FMPSMBUS Exported Functions
  204. * @{
  205. */
  206. /** @defgroup FMPSMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
  207. * @brief Initialization and Configuration functions
  208. *
  209. @verbatim
  210. ===============================================================================
  211. ##### Initialization and de-initialization functions #####
  212. ===============================================================================
  213. [..] This subsection provides a set of functions allowing to initialize and
  214. deinitialize the FMPSMBUSx peripheral:
  215. (+) User must Implement HAL_FMPSMBUS_MspInit() function in which he configures
  216. all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
  217. (+) Call the function HAL_FMPSMBUS_Init() to configure the selected device with
  218. the selected configuration:
  219. (++) Clock Timing
  220. (++) Bus Timeout
  221. (++) Analog Filer mode
  222. (++) Own Address 1
  223. (++) Addressing mode (Master, Slave)
  224. (++) Dual Addressing mode
  225. (++) Own Address 2
  226. (++) Own Address 2 Mask
  227. (++) General call mode
  228. (++) Nostretch mode
  229. (++) Packet Error Check mode
  230. (++) Peripheral mode
  231. (+) Call the function HAL_FMPSMBUS_DeInit() to restore the default configuration
  232. of the selected FMPSMBUSx peripheral.
  233. (+) Enable/Disable Analog/Digital filters with HAL_FMPSMBUS_ConfigAnalogFilter() and
  234. HAL_FMPSMBUS_ConfigDigitalFilter().
  235. @endverbatim
  236. * @{
  237. */
  238. /**
  239. * @brief Initialize the FMPSMBUS according to the specified parameters
  240. * in the FMPSMBUS_InitTypeDef and initialize the associated handle.
  241. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  242. * the configuration information for the specified FMPSMBUS.
  243. * @retval HAL status
  244. */
  245. HAL_StatusTypeDef HAL_FMPSMBUS_Init(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  246. {
  247. /* Check the FMPSMBUS handle allocation */
  248. if (hfmpsmbus == NULL)
  249. {
  250. return HAL_ERROR;
  251. }
  252. /* Check the parameters */
  253. assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
  254. assert_param(IS_FMPSMBUS_ANALOG_FILTER(hfmpsmbus->Init.AnalogFilter));
  255. assert_param(IS_FMPSMBUS_OWN_ADDRESS1(hfmpsmbus->Init.OwnAddress1));
  256. assert_param(IS_FMPSMBUS_ADDRESSING_MODE(hfmpsmbus->Init.AddressingMode));
  257. assert_param(IS_FMPSMBUS_DUAL_ADDRESS(hfmpsmbus->Init.DualAddressMode));
  258. assert_param(IS_FMPSMBUS_OWN_ADDRESS2(hfmpsmbus->Init.OwnAddress2));
  259. assert_param(IS_FMPSMBUS_OWN_ADDRESS2_MASK(hfmpsmbus->Init.OwnAddress2Masks));
  260. assert_param(IS_FMPSMBUS_GENERAL_CALL(hfmpsmbus->Init.GeneralCallMode));
  261. assert_param(IS_FMPSMBUS_NO_STRETCH(hfmpsmbus->Init.NoStretchMode));
  262. assert_param(IS_FMPSMBUS_PEC(hfmpsmbus->Init.PacketErrorCheckMode));
  263. assert_param(IS_FMPSMBUS_PERIPHERAL_MODE(hfmpsmbus->Init.PeripheralMode));
  264. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_RESET)
  265. {
  266. /* Allocate lock resource and initialize it */
  267. hfmpsmbus->Lock = HAL_UNLOCKED;
  268. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  269. hfmpsmbus->MasterTxCpltCallback = HAL_FMPSMBUS_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  270. hfmpsmbus->MasterRxCpltCallback = HAL_FMPSMBUS_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  271. hfmpsmbus->SlaveTxCpltCallback = HAL_FMPSMBUS_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
  272. hfmpsmbus->SlaveRxCpltCallback = HAL_FMPSMBUS_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
  273. hfmpsmbus->ListenCpltCallback = HAL_FMPSMBUS_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
  274. hfmpsmbus->ErrorCallback = HAL_FMPSMBUS_ErrorCallback; /* Legacy weak ErrorCallback */
  275. hfmpsmbus->AddrCallback = HAL_FMPSMBUS_AddrCallback; /* Legacy weak AddrCallback */
  276. if (hfmpsmbus->MspInitCallback == NULL)
  277. {
  278. hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
  279. }
  280. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  281. hfmpsmbus->MspInitCallback(hfmpsmbus);
  282. #else
  283. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  284. HAL_FMPSMBUS_MspInit(hfmpsmbus);
  285. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  286. }
  287. hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
  288. /* Disable the selected FMPSMBUS peripheral */
  289. __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
  290. /*---------------------------- FMPSMBUSx TIMINGR Configuration ------------------------*/
  291. /* Configure FMPSMBUSx: Frequency range */
  292. hfmpsmbus->Instance->TIMINGR = hfmpsmbus->Init.Timing & TIMING_CLEAR_MASK;
  293. /*---------------------------- FMPSMBUSx TIMEOUTR Configuration ------------------------*/
  294. /* Configure FMPSMBUSx: Bus Timeout */
  295. hfmpsmbus->Instance->TIMEOUTR &= ~FMPI2C_TIMEOUTR_TIMOUTEN;
  296. hfmpsmbus->Instance->TIMEOUTR &= ~FMPI2C_TIMEOUTR_TEXTEN;
  297. hfmpsmbus->Instance->TIMEOUTR = hfmpsmbus->Init.SMBusTimeout;
  298. /*---------------------------- FMPSMBUSx OAR1 Configuration -----------------------*/
  299. /* Configure FMPSMBUSx: Own Address1 and ack own address1 mode */
  300. hfmpsmbus->Instance->OAR1 &= ~FMPI2C_OAR1_OA1EN;
  301. if (hfmpsmbus->Init.OwnAddress1 != 0UL)
  302. {
  303. if (hfmpsmbus->Init.AddressingMode == FMPSMBUS_ADDRESSINGMODE_7BIT)
  304. {
  305. hfmpsmbus->Instance->OAR1 = (FMPI2C_OAR1_OA1EN | hfmpsmbus->Init.OwnAddress1);
  306. }
  307. else /* FMPSMBUS_ADDRESSINGMODE_10BIT */
  308. {
  309. hfmpsmbus->Instance->OAR1 = (FMPI2C_OAR1_OA1EN | FMPI2C_OAR1_OA1MODE | hfmpsmbus->Init.OwnAddress1);
  310. }
  311. }
  312. /*---------------------------- FMPSMBUSx CR2 Configuration ------------------------*/
  313. /* Configure FMPSMBUSx: Addressing Master mode */
  314. if (hfmpsmbus->Init.AddressingMode == FMPSMBUS_ADDRESSINGMODE_10BIT)
  315. {
  316. hfmpsmbus->Instance->CR2 = (FMPI2C_CR2_ADD10);
  317. }
  318. /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
  319. /* AUTOEND and NACK bit will be manage during Transfer process */
  320. hfmpsmbus->Instance->CR2 |= (FMPI2C_CR2_AUTOEND | FMPI2C_CR2_NACK);
  321. /*---------------------------- FMPSMBUSx OAR2 Configuration -----------------------*/
  322. /* Configure FMPSMBUSx: Dual mode and Own Address2 */
  323. hfmpsmbus->Instance->OAR2 = (hfmpsmbus->Init.DualAddressMode | hfmpsmbus->Init.OwnAddress2 | (hfmpsmbus->Init.OwnAddress2Masks << 8U));
  324. /*---------------------------- FMPSMBUSx CR1 Configuration ------------------------*/
  325. /* Configure FMPSMBUSx: Generalcall and NoStretch mode */
  326. hfmpsmbus->Instance->CR1 = (hfmpsmbus->Init.GeneralCallMode | hfmpsmbus->Init.NoStretchMode | hfmpsmbus->Init.PacketErrorCheckMode | hfmpsmbus->Init.PeripheralMode | hfmpsmbus->Init.AnalogFilter);
  327. /* Enable Slave Byte Control only in case of Packet Error Check is enabled and FMPSMBUS Peripheral is set in Slave mode */
  328. if ((hfmpsmbus->Init.PacketErrorCheckMode == FMPSMBUS_PEC_ENABLE)
  329. && ((hfmpsmbus->Init.PeripheralMode == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE) || (hfmpsmbus->Init.PeripheralMode == FMPSMBUS_PERIPHERAL_MODE_FMPSMBUS_SLAVE_ARP)))
  330. {
  331. hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
  332. }
  333. /* Enable the selected FMPSMBUS peripheral */
  334. __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
  335. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  336. hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
  337. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  338. return HAL_OK;
  339. }
  340. /**
  341. * @brief DeInitialize the FMPSMBUS peripheral.
  342. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  343. * the configuration information for the specified FMPSMBUS.
  344. * @retval HAL status
  345. */
  346. HAL_StatusTypeDef HAL_FMPSMBUS_DeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  347. {
  348. /* Check the FMPSMBUS handle allocation */
  349. if (hfmpsmbus == NULL)
  350. {
  351. return HAL_ERROR;
  352. }
  353. /* Check the parameters */
  354. assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
  355. hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
  356. /* Disable the FMPSMBUS Peripheral Clock */
  357. __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
  358. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  359. if (hfmpsmbus->MspDeInitCallback == NULL)
  360. {
  361. hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
  362. }
  363. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  364. hfmpsmbus->MspDeInitCallback(hfmpsmbus);
  365. #else
  366. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  367. HAL_FMPSMBUS_MspDeInit(hfmpsmbus);
  368. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  369. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  370. hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_RESET;
  371. hfmpsmbus->State = HAL_FMPSMBUS_STATE_RESET;
  372. /* Release Lock */
  373. __HAL_UNLOCK(hfmpsmbus);
  374. return HAL_OK;
  375. }
  376. /**
  377. * @brief Initialize the FMPSMBUS MSP.
  378. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  379. * the configuration information for the specified FMPSMBUS.
  380. * @retval None
  381. */
  382. __weak void HAL_FMPSMBUS_MspInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  383. {
  384. /* Prevent unused argument(s) compilation warning */
  385. UNUSED(hfmpsmbus);
  386. /* NOTE : This function should not be modified, when the callback is needed,
  387. the HAL_FMPSMBUS_MspInit could be implemented in the user file
  388. */
  389. }
  390. /**
  391. * @brief DeInitialize the FMPSMBUS MSP.
  392. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  393. * the configuration information for the specified FMPSMBUS.
  394. * @retval None
  395. */
  396. __weak void HAL_FMPSMBUS_MspDeInit(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  397. {
  398. /* Prevent unused argument(s) compilation warning */
  399. UNUSED(hfmpsmbus);
  400. /* NOTE : This function should not be modified, when the callback is needed,
  401. the HAL_FMPSMBUS_MspDeInit could be implemented in the user file
  402. */
  403. }
  404. /**
  405. * @brief Configure Analog noise filter.
  406. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  407. * the configuration information for the specified FMPSMBUS.
  408. * @param AnalogFilter This parameter can be one of the following values:
  409. * @arg @ref FMPSMBUS_ANALOGFILTER_ENABLE
  410. * @arg @ref FMPSMBUS_ANALOGFILTER_DISABLE
  411. * @retval HAL status
  412. */
  413. HAL_StatusTypeDef HAL_FMPSMBUS_ConfigAnalogFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t AnalogFilter)
  414. {
  415. /* Check the parameters */
  416. assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
  417. assert_param(IS_FMPSMBUS_ANALOG_FILTER(AnalogFilter));
  418. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  419. {
  420. /* Process Locked */
  421. __HAL_LOCK(hfmpsmbus);
  422. hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
  423. /* Disable the selected FMPSMBUS peripheral */
  424. __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
  425. /* Reset ANOFF bit */
  426. hfmpsmbus->Instance->CR1 &= ~(FMPI2C_CR1_ANFOFF);
  427. /* Set analog filter bit*/
  428. hfmpsmbus->Instance->CR1 |= AnalogFilter;
  429. __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
  430. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  431. /* Process Unlocked */
  432. __HAL_UNLOCK(hfmpsmbus);
  433. return HAL_OK;
  434. }
  435. else
  436. {
  437. return HAL_BUSY;
  438. }
  439. }
  440. /**
  441. * @brief Configure Digital noise filter.
  442. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  443. * the configuration information for the specified FMPSMBUS.
  444. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F.
  445. * @retval HAL status
  446. */
  447. HAL_StatusTypeDef HAL_FMPSMBUS_ConfigDigitalFilter(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t DigitalFilter)
  448. {
  449. uint32_t tmpreg;
  450. /* Check the parameters */
  451. assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
  452. assert_param(IS_FMPSMBUS_DIGITAL_FILTER(DigitalFilter));
  453. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  454. {
  455. /* Process Locked */
  456. __HAL_LOCK(hfmpsmbus);
  457. hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
  458. /* Disable the selected FMPSMBUS peripheral */
  459. __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
  460. /* Get the old register value */
  461. tmpreg = hfmpsmbus->Instance->CR1;
  462. /* Reset FMPI2C DNF bits [11:8] */
  463. tmpreg &= ~(FMPI2C_CR1_DNF);
  464. /* Set FMPI2Cx DNF coefficient */
  465. tmpreg |= DigitalFilter << FMPI2C_CR1_DNF_Pos;
  466. /* Store the new register value */
  467. hfmpsmbus->Instance->CR1 = tmpreg;
  468. __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
  469. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  470. /* Process Unlocked */
  471. __HAL_UNLOCK(hfmpsmbus);
  472. return HAL_OK;
  473. }
  474. else
  475. {
  476. return HAL_BUSY;
  477. }
  478. }
  479. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  480. /**
  481. * @brief Register a User FMPSMBUS Callback
  482. * To be used instead of the weak predefined callback
  483. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  484. * the configuration information for the specified FMPSMBUS.
  485. * @param CallbackID ID of the callback to be registered
  486. * This parameter can be one of the following values:
  487. * @arg @ref HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  488. * @arg @ref HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  489. * @arg @ref HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  490. * @arg @ref HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  491. * @arg @ref HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  492. * @arg @ref HAL_FMPSMBUS_ERROR_CB_ID Error callback ID
  493. * @arg @ref HAL_FMPSMBUS_MSPINIT_CB_ID MspInit callback ID
  494. * @arg @ref HAL_FMPSMBUS_MSPDEINIT_CB_ID MspDeInit callback ID
  495. * @param pCallback pointer to the Callback function
  496. * @retval HAL status
  497. */
  498. HAL_StatusTypeDef HAL_FMPSMBUS_RegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, HAL_FMPSMBUS_CallbackIDTypeDef CallbackID,
  499. pFMPSMBUS_CallbackTypeDef pCallback)
  500. {
  501. HAL_StatusTypeDef status = HAL_OK;
  502. if (pCallback == NULL)
  503. {
  504. /* Update the error code */
  505. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  506. return HAL_ERROR;
  507. }
  508. /* Process locked */
  509. __HAL_LOCK(hfmpsmbus);
  510. if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
  511. {
  512. switch (CallbackID)
  513. {
  514. case HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID :
  515. hfmpsmbus->MasterTxCpltCallback = pCallback;
  516. break;
  517. case HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID :
  518. hfmpsmbus->MasterRxCpltCallback = pCallback;
  519. break;
  520. case HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID :
  521. hfmpsmbus->SlaveTxCpltCallback = pCallback;
  522. break;
  523. case HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID :
  524. hfmpsmbus->SlaveRxCpltCallback = pCallback;
  525. break;
  526. case HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID :
  527. hfmpsmbus->ListenCpltCallback = pCallback;
  528. break;
  529. case HAL_FMPSMBUS_ERROR_CB_ID :
  530. hfmpsmbus->ErrorCallback = pCallback;
  531. break;
  532. case HAL_FMPSMBUS_MSPINIT_CB_ID :
  533. hfmpsmbus->MspInitCallback = pCallback;
  534. break;
  535. case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
  536. hfmpsmbus->MspDeInitCallback = pCallback;
  537. break;
  538. default :
  539. /* Update the error code */
  540. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  541. /* Return error status */
  542. status = HAL_ERROR;
  543. break;
  544. }
  545. }
  546. else if (HAL_FMPSMBUS_STATE_RESET == hfmpsmbus->State)
  547. {
  548. switch (CallbackID)
  549. {
  550. case HAL_FMPSMBUS_MSPINIT_CB_ID :
  551. hfmpsmbus->MspInitCallback = pCallback;
  552. break;
  553. case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
  554. hfmpsmbus->MspDeInitCallback = pCallback;
  555. break;
  556. default :
  557. /* Update the error code */
  558. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  559. /* Return error status */
  560. status = HAL_ERROR;
  561. break;
  562. }
  563. }
  564. else
  565. {
  566. /* Update the error code */
  567. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  568. /* Return error status */
  569. status = HAL_ERROR;
  570. }
  571. /* Release Lock */
  572. __HAL_UNLOCK(hfmpsmbus);
  573. return status;
  574. }
  575. /**
  576. * @brief Unregister an FMPSMBUS Callback
  577. * FMPSMBUS callback is redirected to the weak predefined callback
  578. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  579. * the configuration information for the specified FMPSMBUS.
  580. * @param CallbackID ID of the callback to be unregistered
  581. * This parameter can be one of the following values:
  582. * This parameter can be one of the following values:
  583. * @arg @ref HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID
  584. * @arg @ref HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID
  585. * @arg @ref HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID
  586. * @arg @ref HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID
  587. * @arg @ref HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID Listen Complete callback ID
  588. * @arg @ref HAL_FMPSMBUS_ERROR_CB_ID Error callback ID
  589. * @arg @ref HAL_FMPSMBUS_MSPINIT_CB_ID MspInit callback ID
  590. * @arg @ref HAL_FMPSMBUS_MSPDEINIT_CB_ID MspDeInit callback ID
  591. * @retval HAL status
  592. */
  593. HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, HAL_FMPSMBUS_CallbackIDTypeDef CallbackID)
  594. {
  595. HAL_StatusTypeDef status = HAL_OK;
  596. /* Process locked */
  597. __HAL_LOCK(hfmpsmbus);
  598. if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
  599. {
  600. switch (CallbackID)
  601. {
  602. case HAL_FMPSMBUS_MASTER_TX_COMPLETE_CB_ID :
  603. hfmpsmbus->MasterTxCpltCallback = HAL_FMPSMBUS_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback */
  604. break;
  605. case HAL_FMPSMBUS_MASTER_RX_COMPLETE_CB_ID :
  606. hfmpsmbus->MasterRxCpltCallback = HAL_FMPSMBUS_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback */
  607. break;
  608. case HAL_FMPSMBUS_SLAVE_TX_COMPLETE_CB_ID :
  609. hfmpsmbus->SlaveTxCpltCallback = HAL_FMPSMBUS_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback */
  610. break;
  611. case HAL_FMPSMBUS_SLAVE_RX_COMPLETE_CB_ID :
  612. hfmpsmbus->SlaveRxCpltCallback = HAL_FMPSMBUS_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback */
  613. break;
  614. case HAL_FMPSMBUS_LISTEN_COMPLETE_CB_ID :
  615. hfmpsmbus->ListenCpltCallback = HAL_FMPSMBUS_ListenCpltCallback; /* Legacy weak ListenCpltCallback */
  616. break;
  617. case HAL_FMPSMBUS_ERROR_CB_ID :
  618. hfmpsmbus->ErrorCallback = HAL_FMPSMBUS_ErrorCallback; /* Legacy weak ErrorCallback */
  619. break;
  620. case HAL_FMPSMBUS_MSPINIT_CB_ID :
  621. hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
  622. break;
  623. case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
  624. hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
  625. break;
  626. default :
  627. /* Update the error code */
  628. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  629. /* Return error status */
  630. status = HAL_ERROR;
  631. break;
  632. }
  633. }
  634. else if (HAL_FMPSMBUS_STATE_RESET == hfmpsmbus->State)
  635. {
  636. switch (CallbackID)
  637. {
  638. case HAL_FMPSMBUS_MSPINIT_CB_ID :
  639. hfmpsmbus->MspInitCallback = HAL_FMPSMBUS_MspInit; /* Legacy weak MspInit */
  640. break;
  641. case HAL_FMPSMBUS_MSPDEINIT_CB_ID :
  642. hfmpsmbus->MspDeInitCallback = HAL_FMPSMBUS_MspDeInit; /* Legacy weak MspDeInit */
  643. break;
  644. default :
  645. /* Update the error code */
  646. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  647. /* Return error status */
  648. status = HAL_ERROR;
  649. break;
  650. }
  651. }
  652. else
  653. {
  654. /* Update the error code */
  655. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  656. /* Return error status */
  657. status = HAL_ERROR;
  658. }
  659. /* Release Lock */
  660. __HAL_UNLOCK(hfmpsmbus);
  661. return status;
  662. }
  663. /**
  664. * @brief Register the Slave Address Match FMPSMBUS Callback
  665. * To be used instead of the weak HAL_FMPSMBUS_AddrCallback() predefined callback
  666. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  667. * the configuration information for the specified FMPSMBUS.
  668. * @param pCallback pointer to the Address Match Callback function
  669. * @retval HAL status
  670. */
  671. HAL_StatusTypeDef HAL_FMPSMBUS_RegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, pFMPSMBUS_AddrCallbackTypeDef pCallback)
  672. {
  673. HAL_StatusTypeDef status = HAL_OK;
  674. if (pCallback == NULL)
  675. {
  676. /* Update the error code */
  677. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  678. return HAL_ERROR;
  679. }
  680. /* Process locked */
  681. __HAL_LOCK(hfmpsmbus);
  682. if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
  683. {
  684. hfmpsmbus->AddrCallback = pCallback;
  685. }
  686. else
  687. {
  688. /* Update the error code */
  689. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  690. /* Return error status */
  691. status = HAL_ERROR;
  692. }
  693. /* Release Lock */
  694. __HAL_UNLOCK(hfmpsmbus);
  695. return status;
  696. }
  697. /**
  698. * @brief UnRegister the Slave Address Match FMPSMBUS Callback
  699. * Info Ready FMPSMBUS Callback is redirected to the weak HAL_FMPSMBUS_AddrCallback() predefined callback
  700. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  701. * the configuration information for the specified FMPSMBUS.
  702. * @retval HAL status
  703. */
  704. HAL_StatusTypeDef HAL_FMPSMBUS_UnRegisterAddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  705. {
  706. HAL_StatusTypeDef status = HAL_OK;
  707. /* Process locked */
  708. __HAL_LOCK(hfmpsmbus);
  709. if (HAL_FMPSMBUS_STATE_READY == hfmpsmbus->State)
  710. {
  711. hfmpsmbus->AddrCallback = HAL_FMPSMBUS_AddrCallback; /* Legacy weak AddrCallback */
  712. }
  713. else
  714. {
  715. /* Update the error code */
  716. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_INVALID_CALLBACK;
  717. /* Return error status */
  718. status = HAL_ERROR;
  719. }
  720. /* Release Lock */
  721. __HAL_UNLOCK(hfmpsmbus);
  722. return status;
  723. }
  724. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  725. /**
  726. * @}
  727. */
  728. /** @defgroup FMPSMBUS_Exported_Functions_Group2 Input and Output operation functions
  729. * @brief Data transfers functions
  730. *
  731. @verbatim
  732. ===============================================================================
  733. ##### IO operation functions #####
  734. ===============================================================================
  735. [..]
  736. This subsection provides a set of functions allowing to manage the FMPSMBUS data
  737. transfers.
  738. (#) Blocking mode function to check if device is ready for usage is :
  739. (++) HAL_FMPSMBUS_IsDeviceReady()
  740. (#) There is only one mode of transfer:
  741. (++) Non-Blocking mode : The communication is performed using Interrupts.
  742. These functions return the status of the transfer startup.
  743. The end of the data processing will be indicated through the
  744. dedicated FMPSMBUS IRQ when using Interrupt mode.
  745. (#) Non-Blocking mode functions with Interrupt are :
  746. (++) HAL_FMPSMBUS_Master_Transmit_IT()
  747. (++) HAL_FMPSMBUS_Master_Receive_IT()
  748. (++) HAL_FMPSMBUS_Slave_Transmit_IT()
  749. (++) HAL_FMPSMBUS_Slave_Receive_IT()
  750. (++) HAL_FMPSMBUS_EnableListen_IT() or alias HAL_FMPSMBUS_EnableListen_IT()
  751. (++) HAL_FMPSMBUS_DisableListen_IT()
  752. (++) HAL_FMPSMBUS_EnableAlert_IT()
  753. (++) HAL_FMPSMBUS_DisableAlert_IT()
  754. (#) A set of Transfer Complete Callbacks are provided in non-Blocking mode:
  755. (++) HAL_FMPSMBUS_MasterTxCpltCallback()
  756. (++) HAL_FMPSMBUS_MasterRxCpltCallback()
  757. (++) HAL_FMPSMBUS_SlaveTxCpltCallback()
  758. (++) HAL_FMPSMBUS_SlaveRxCpltCallback()
  759. (++) HAL_FMPSMBUS_AddrCallback()
  760. (++) HAL_FMPSMBUS_ListenCpltCallback()
  761. (++) HAL_FMPSMBUS_ErrorCallback()
  762. @endverbatim
  763. * @{
  764. */
  765. /**
  766. * @brief Transmit in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
  767. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  768. * the configuration information for the specified FMPSMBUS.
  769. * @param DevAddress Target device address: The device 7 bits address value
  770. * in datasheet must be shifted to the left before calling the interface
  771. * @param pData Pointer to data buffer
  772. * @param Size Amount of data to be sent
  773. * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
  774. * @retval HAL status
  775. */
  776. HAL_StatusTypeDef HAL_FMPSMBUS_Master_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData,
  777. uint16_t Size, uint32_t XferOptions)
  778. {
  779. uint32_t tmp;
  780. /* Check the parameters */
  781. assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
  782. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  783. {
  784. /* Process Locked */
  785. __HAL_LOCK(hfmpsmbus);
  786. hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_TX;
  787. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  788. /* Prepare transfer parameters */
  789. hfmpsmbus->pBuffPtr = pData;
  790. hfmpsmbus->XferCount = Size;
  791. hfmpsmbus->XferOptions = XferOptions;
  792. /* In case of Quick command, remove autoend mode */
  793. /* Manage the stop generation by software */
  794. if (hfmpsmbus->pBuffPtr == NULL)
  795. {
  796. hfmpsmbus->XferOptions &= ~FMPSMBUS_AUTOEND_MODE;
  797. }
  798. if (Size > MAX_NBYTE_SIZE)
  799. {
  800. hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
  801. }
  802. else
  803. {
  804. hfmpsmbus->XferSize = Size;
  805. }
  806. /* Send Slave Address */
  807. /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
  808. if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
  809. {
  810. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize,
  811. FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_GENERATE_START_WRITE);
  812. }
  813. else
  814. {
  815. /* If transfer direction not change, do not generate Restart Condition */
  816. /* Mean Previous state is same as current state */
  817. /* Store current volatile XferOptions, misra rule */
  818. tmp = hfmpsmbus->XferOptions;
  819. if ((hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX) && (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
  820. {
  821. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  822. }
  823. /* Else transfer direction change, so generate Restart with new transfer direction */
  824. else
  825. {
  826. /* Convert OTHER_xxx XferOptions if any */
  827. FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
  828. /* Handle Transfer */
  829. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_GENERATE_START_WRITE);
  830. }
  831. /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
  832. /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
  833. if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
  834. {
  835. hfmpsmbus->XferSize--;
  836. hfmpsmbus->XferCount--;
  837. }
  838. }
  839. /* Process Unlocked */
  840. __HAL_UNLOCK(hfmpsmbus);
  841. /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
  842. to avoid the risk of FMPSMBUS interrupt handle execution before current
  843. process unlock */
  844. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  845. return HAL_OK;
  846. }
  847. else
  848. {
  849. return HAL_BUSY;
  850. }
  851. }
  852. /**
  853. * @brief Receive in master/host FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
  854. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  855. * the configuration information for the specified FMPSMBUS.
  856. * @param DevAddress Target device address: The device 7 bits address value
  857. * in datasheet must be shifted to the left before calling the interface
  858. * @param pData Pointer to data buffer
  859. * @param Size Amount of data to be sent
  860. * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
  861. * @retval HAL status
  862. */
  863. HAL_StatusTypeDef HAL_FMPSMBUS_Master_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t *pData,
  864. uint16_t Size, uint32_t XferOptions)
  865. {
  866. uint32_t tmp;
  867. /* Check the parameters */
  868. assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
  869. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  870. {
  871. /* Process Locked */
  872. __HAL_LOCK(hfmpsmbus);
  873. hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_RX;
  874. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  875. /* Prepare transfer parameters */
  876. hfmpsmbus->pBuffPtr = pData;
  877. hfmpsmbus->XferCount = Size;
  878. hfmpsmbus->XferOptions = XferOptions;
  879. /* In case of Quick command, remove autoend mode */
  880. /* Manage the stop generation by software */
  881. if (hfmpsmbus->pBuffPtr == NULL)
  882. {
  883. hfmpsmbus->XferOptions &= ~FMPSMBUS_AUTOEND_MODE;
  884. }
  885. if (Size > MAX_NBYTE_SIZE)
  886. {
  887. hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
  888. }
  889. else
  890. {
  891. hfmpsmbus->XferSize = Size;
  892. }
  893. /* Send Slave Address */
  894. /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
  895. if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
  896. {
  897. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize,
  898. FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_GENERATE_START_READ);
  899. }
  900. else
  901. {
  902. /* If transfer direction not change, do not generate Restart Condition */
  903. /* Mean Previous state is same as current state */
  904. /* Store current volatile XferOptions, Misra rule */
  905. tmp = hfmpsmbus->XferOptions;
  906. if ((hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX) && (IS_FMPSMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(tmp) == 0))
  907. {
  908. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  909. }
  910. /* Else transfer direction change, so generate Restart with new transfer direction */
  911. else
  912. {
  913. /* Convert OTHER_xxx XferOptions if any */
  914. FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
  915. /* Handle Transfer */
  916. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_GENERATE_START_READ);
  917. }
  918. }
  919. /* Process Unlocked */
  920. __HAL_UNLOCK(hfmpsmbus);
  921. /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
  922. to avoid the risk of FMPSMBUS interrupt handle execution before current
  923. process unlock */
  924. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  925. return HAL_OK;
  926. }
  927. else
  928. {
  929. return HAL_BUSY;
  930. }
  931. }
  932. /**
  933. * @brief Abort a master/host FMPSMBUS process communication with Interrupt.
  934. * @note This abort can be called only if state is ready
  935. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  936. * the configuration information for the specified FMPSMBUS.
  937. * @param DevAddress Target device address: The device 7 bits address value
  938. * in datasheet must be shifted to the left before calling the interface
  939. * @retval HAL status
  940. */
  941. HAL_StatusTypeDef HAL_FMPSMBUS_Master_Abort_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress)
  942. {
  943. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  944. {
  945. /* Process Locked */
  946. __HAL_LOCK(hfmpsmbus);
  947. /* Keep the same state as previous */
  948. /* to perform as well the call of the corresponding end of transfer callback */
  949. if (hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  950. {
  951. hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_TX;
  952. }
  953. else if (hfmpsmbus->PreviousState == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  954. {
  955. hfmpsmbus->State = HAL_FMPSMBUS_STATE_MASTER_BUSY_RX;
  956. }
  957. else
  958. {
  959. /* Wrong usage of abort function */
  960. /* This function should be used only in case of abort monitored by master device */
  961. return HAL_ERROR;
  962. }
  963. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  964. /* Set NBYTES to 1 to generate a dummy read on FMPSMBUS peripheral */
  965. /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
  966. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, 1, FMPSMBUS_AUTOEND_MODE, FMPSMBUS_NO_STARTSTOP);
  967. /* Process Unlocked */
  968. __HAL_UNLOCK(hfmpsmbus);
  969. /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
  970. to avoid the risk of FMPSMBUS interrupt handle execution before current
  971. process unlock */
  972. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  973. {
  974. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  975. }
  976. else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  977. {
  978. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  979. }
  980. else
  981. {
  982. /* Nothing to do */
  983. }
  984. return HAL_OK;
  985. }
  986. else
  987. {
  988. return HAL_BUSY;
  989. }
  990. }
  991. /**
  992. * @brief Transmit in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
  993. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  994. * the configuration information for the specified FMPSMBUS.
  995. * @param pData Pointer to data buffer
  996. * @param Size Amount of data to be sent
  997. * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
  998. * @retval HAL status
  999. */
  1000. HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Transmit_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
  1001. uint32_t XferOptions)
  1002. {
  1003. /* Check the parameters */
  1004. assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1005. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
  1006. {
  1007. if ((pData == NULL) || (Size == 0UL))
  1008. {
  1009. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_INVALID_PARAM;
  1010. return HAL_ERROR;
  1011. }
  1012. /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  1013. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR | FMPSMBUS_IT_TX);
  1014. /* Process Locked */
  1015. __HAL_LOCK(hfmpsmbus);
  1016. hfmpsmbus->State = (HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX | HAL_FMPSMBUS_STATE_LISTEN);
  1017. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  1018. /* Set SBC bit to manage Acknowledge at each bit */
  1019. hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
  1020. /* Enable Address Acknowledge */
  1021. hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
  1022. /* Prepare transfer parameters */
  1023. hfmpsmbus->pBuffPtr = pData;
  1024. hfmpsmbus->XferCount = Size;
  1025. hfmpsmbus->XferOptions = XferOptions;
  1026. /* Convert OTHER_xxx XferOptions if any */
  1027. FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
  1028. if (Size > MAX_NBYTE_SIZE)
  1029. {
  1030. hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
  1031. }
  1032. else
  1033. {
  1034. hfmpsmbus->XferSize = Size;
  1035. }
  1036. /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
  1037. if ((hfmpsmbus->XferSize < hfmpsmbus->XferCount) && (hfmpsmbus->XferSize == MAX_NBYTE_SIZE))
  1038. {
  1039. FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize,
  1040. FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_NO_STARTSTOP);
  1041. }
  1042. else
  1043. {
  1044. /* Set NBYTE to transmit */
  1045. FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  1046. /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
  1047. /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
  1048. if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
  1049. {
  1050. hfmpsmbus->XferSize--;
  1051. hfmpsmbus->XferCount--;
  1052. }
  1053. }
  1054. /* Clear ADDR flag after prepare the transfer parameters */
  1055. /* This action will generate an acknowledge to the HOST */
  1056. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
  1057. /* Process Unlocked */
  1058. __HAL_UNLOCK(hfmpsmbus);
  1059. /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
  1060. to avoid the risk of FMPSMBUS interrupt handle execution before current
  1061. process unlock */
  1062. /* REnable ADDR interrupt */
  1063. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX | FMPSMBUS_IT_ADDR);
  1064. return HAL_OK;
  1065. }
  1066. else
  1067. {
  1068. return HAL_BUSY;
  1069. }
  1070. }
  1071. /**
  1072. * @brief Receive in slave/device FMPSMBUS mode an amount of data in non-blocking mode with Interrupt.
  1073. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1074. * the configuration information for the specified FMPSMBUS.
  1075. * @param pData Pointer to data buffer
  1076. * @param Size Amount of data to be sent
  1077. * @param XferOptions Options of Transfer, value of @ref FMPSMBUS_XferOptions_definition
  1078. * @retval HAL status
  1079. */
  1080. HAL_StatusTypeDef HAL_FMPSMBUS_Slave_Receive_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t *pData, uint16_t Size,
  1081. uint32_t XferOptions)
  1082. {
  1083. /* Check the parameters */
  1084. assert_param(IS_FMPSMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1085. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
  1086. {
  1087. if ((pData == NULL) || (Size == 0UL))
  1088. {
  1089. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_INVALID_PARAM;
  1090. return HAL_ERROR;
  1091. }
  1092. /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
  1093. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR | FMPSMBUS_IT_RX);
  1094. /* Process Locked */
  1095. __HAL_LOCK(hfmpsmbus);
  1096. hfmpsmbus->State = (HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX | HAL_FMPSMBUS_STATE_LISTEN);
  1097. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  1098. /* Set SBC bit to manage Acknowledge at each bit */
  1099. hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_SBC;
  1100. /* Enable Address Acknowledge */
  1101. hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
  1102. /* Prepare transfer parameters */
  1103. hfmpsmbus->pBuffPtr = pData;
  1104. hfmpsmbus->XferSize = Size;
  1105. hfmpsmbus->XferCount = Size;
  1106. hfmpsmbus->XferOptions = XferOptions;
  1107. /* Convert OTHER_xxx XferOptions if any */
  1108. FMPSMBUS_ConvertOtherXferOptions(hfmpsmbus);
  1109. /* Set NBYTE to receive */
  1110. /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
  1111. /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
  1112. /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
  1113. /* This RELOAD bit will be reset for last BYTE to be receive in FMPSMBUS_Slave_ISR */
  1114. if (((FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL) && (hfmpsmbus->XferSize == 2U)) || (hfmpsmbus->XferSize == 1U))
  1115. {
  1116. FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  1117. }
  1118. else
  1119. {
  1120. FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, hfmpsmbus->XferOptions | FMPSMBUS_RELOAD_MODE, FMPSMBUS_NO_STARTSTOP);
  1121. }
  1122. /* Clear ADDR flag after prepare the transfer parameters */
  1123. /* This action will generate an acknowledge to the HOST */
  1124. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
  1125. /* Process Unlocked */
  1126. __HAL_UNLOCK(hfmpsmbus);
  1127. /* Note : The FMPSMBUS interrupts must be enabled after unlocking current process
  1128. to avoid the risk of FMPSMBUS interrupt handle execution before current
  1129. process unlock */
  1130. /* REnable ADDR interrupt */
  1131. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_ADDR);
  1132. return HAL_OK;
  1133. }
  1134. else
  1135. {
  1136. return HAL_BUSY;
  1137. }
  1138. }
  1139. /**
  1140. * @brief Enable the Address listen mode with Interrupt.
  1141. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1142. * the configuration information for the specified FMPSMBUS.
  1143. * @retval HAL status
  1144. */
  1145. HAL_StatusTypeDef HAL_FMPSMBUS_EnableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1146. {
  1147. hfmpsmbus->State = HAL_FMPSMBUS_STATE_LISTEN;
  1148. /* Enable the Address Match interrupt */
  1149. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
  1150. return HAL_OK;
  1151. }
  1152. /**
  1153. * @brief Disable the Address listen mode with Interrupt.
  1154. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1155. * the configuration information for the specified FMPSMBUS.
  1156. * @retval HAL status
  1157. */
  1158. HAL_StatusTypeDef HAL_FMPSMBUS_DisableListen_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1159. {
  1160. /* Disable Address listen mode only if a transfer is not ongoing */
  1161. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_LISTEN)
  1162. {
  1163. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1164. /* Disable the Address Match interrupt */
  1165. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
  1166. return HAL_OK;
  1167. }
  1168. else
  1169. {
  1170. return HAL_BUSY;
  1171. }
  1172. }
  1173. /**
  1174. * @brief Enable the FMPSMBUS alert mode with Interrupt.
  1175. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1176. * the configuration information for the specified FMPSMBUSx peripheral.
  1177. * @retval HAL status
  1178. */
  1179. HAL_StatusTypeDef HAL_FMPSMBUS_EnableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1180. {
  1181. /* Enable SMBus alert */
  1182. hfmpsmbus->Instance->CR1 |= FMPI2C_CR1_ALERTEN;
  1183. /* Clear ALERT flag */
  1184. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ALERT);
  1185. /* Enable Alert Interrupt */
  1186. FMPSMBUS_Enable_IRQ(hfmpsmbus, FMPSMBUS_IT_ALERT);
  1187. return HAL_OK;
  1188. }
  1189. /**
  1190. * @brief Disable the FMPSMBUS alert mode with Interrupt.
  1191. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1192. * the configuration information for the specified FMPSMBUSx peripheral.
  1193. * @retval HAL status
  1194. */
  1195. HAL_StatusTypeDef HAL_FMPSMBUS_DisableAlert_IT(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1196. {
  1197. /* Enable SMBus alert */
  1198. hfmpsmbus->Instance->CR1 &= ~FMPI2C_CR1_ALERTEN;
  1199. /* Disable Alert Interrupt */
  1200. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ALERT);
  1201. return HAL_OK;
  1202. }
  1203. /**
  1204. * @brief Check if target device is ready for communication.
  1205. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1206. * the configuration information for the specified FMPSMBUS.
  1207. * @param DevAddress Target device address: The device 7 bits address value
  1208. * in datasheet must be shifted to the left before calling the interface
  1209. * @param Trials Number of trials
  1210. * @param Timeout Timeout duration
  1211. * @retval HAL status
  1212. */
  1213. HAL_StatusTypeDef HAL_FMPSMBUS_IsDeviceReady(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint32_t Trials,
  1214. uint32_t Timeout)
  1215. {
  1216. uint32_t tickstart;
  1217. __IO uint32_t FMPSMBUS_Trials = 0UL;
  1218. FlagStatus tmp1;
  1219. FlagStatus tmp2;
  1220. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_READY)
  1221. {
  1222. if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_BUSY) != RESET)
  1223. {
  1224. return HAL_BUSY;
  1225. }
  1226. /* Process Locked */
  1227. __HAL_LOCK(hfmpsmbus);
  1228. hfmpsmbus->State = HAL_FMPSMBUS_STATE_BUSY;
  1229. hfmpsmbus->ErrorCode = HAL_FMPSMBUS_ERROR_NONE;
  1230. do
  1231. {
  1232. /* Generate Start */
  1233. hfmpsmbus->Instance->CR2 = FMPSMBUS_GENERATE_START(hfmpsmbus->Init.AddressingMode, DevAddress);
  1234. /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
  1235. /* Wait until STOPF flag is set or a NACK flag is set*/
  1236. tickstart = HAL_GetTick();
  1237. tmp1 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1238. tmp2 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1239. while ((tmp1 == RESET) && (tmp2 == RESET))
  1240. {
  1241. if (Timeout != HAL_MAX_DELAY)
  1242. {
  1243. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
  1244. {
  1245. /* Device is ready */
  1246. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1247. /* Update FMPSMBUS error code */
  1248. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
  1249. /* Process Unlocked */
  1250. __HAL_UNLOCK(hfmpsmbus);
  1251. return HAL_ERROR;
  1252. }
  1253. }
  1254. tmp1 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1255. tmp2 = __HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1256. }
  1257. /* Check if the NACKF flag has not been set */
  1258. if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF) == RESET)
  1259. {
  1260. /* Wait until STOPF flag is reset */
  1261. if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
  1262. {
  1263. return HAL_ERROR;
  1264. }
  1265. /* Clear STOP Flag */
  1266. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1267. /* Device is ready */
  1268. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1269. /* Process Unlocked */
  1270. __HAL_UNLOCK(hfmpsmbus);
  1271. return HAL_OK;
  1272. }
  1273. else
  1274. {
  1275. /* Wait until STOPF flag is reset */
  1276. if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
  1277. {
  1278. return HAL_ERROR;
  1279. }
  1280. /* Clear NACK Flag */
  1281. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1282. /* Clear STOP Flag, auto generated with autoend*/
  1283. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1284. }
  1285. /* Check if the maximum allowed number of trials has been reached */
  1286. if (FMPSMBUS_Trials == Trials)
  1287. {
  1288. /* Generate Stop */
  1289. hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_STOP;
  1290. /* Wait until STOPF flag is reset */
  1291. if (FMPSMBUS_WaitOnFlagUntilTimeout(hfmpsmbus, FMPSMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
  1292. {
  1293. return HAL_ERROR;
  1294. }
  1295. /* Clear STOP Flag */
  1296. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1297. }
  1298. /* Increment Trials */
  1299. FMPSMBUS_Trials++;
  1300. } while (FMPSMBUS_Trials < Trials);
  1301. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1302. /* Update FMPSMBUS error code */
  1303. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
  1304. /* Process Unlocked */
  1305. __HAL_UNLOCK(hfmpsmbus);
  1306. return HAL_ERROR;
  1307. }
  1308. else
  1309. {
  1310. return HAL_BUSY;
  1311. }
  1312. }
  1313. /**
  1314. * @}
  1315. */
  1316. /** @defgroup FMPSMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
  1317. * @{
  1318. */
  1319. /**
  1320. * @brief Handle FMPSMBUS event interrupt request.
  1321. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1322. * the configuration information for the specified FMPSMBUS.
  1323. * @retval None
  1324. */
  1325. void HAL_FMPSMBUS_EV_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1326. {
  1327. /* Use a local variable to store the current ISR flags */
  1328. /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
  1329. uint32_t tmpisrvalue = READ_REG(hfmpsmbus->Instance->ISR);
  1330. uint32_t tmpcr1value = READ_REG(hfmpsmbus->Instance->CR1);
  1331. /* FMPSMBUS in mode Transmitter ---------------------------------------------------*/
  1332. if ((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, (FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_TXI)) != RESET) &&
  1333. ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TXIS) != RESET) ||
  1334. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TCR) != RESET) ||
  1335. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TC) != RESET) ||
  1336. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
  1337. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
  1338. {
  1339. /* Slave mode selected */
  1340. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
  1341. {
  1342. (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
  1343. }
  1344. /* Master mode selected */
  1345. else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_MASTER_BUSY_TX) == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  1346. {
  1347. (void)FMPSMBUS_Master_ISR(hfmpsmbus, tmpisrvalue);
  1348. }
  1349. else
  1350. {
  1351. /* Nothing to do */
  1352. }
  1353. }
  1354. /* FMPSMBUS in mode Receiver ----------------------------------------------------*/
  1355. if ((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, (FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_RXI)) != RESET) &&
  1356. ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_RXNE) != RESET) ||
  1357. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TCR) != RESET) ||
  1358. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_TC) != RESET) ||
  1359. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
  1360. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
  1361. {
  1362. /* Slave mode selected */
  1363. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX)
  1364. {
  1365. (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
  1366. }
  1367. /* Master mode selected */
  1368. else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_MASTER_BUSY_RX) == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  1369. {
  1370. (void)FMPSMBUS_Master_ISR(hfmpsmbus, tmpisrvalue);
  1371. }
  1372. else
  1373. {
  1374. /* Nothing to do */
  1375. }
  1376. }
  1377. /* FMPSMBUS in mode Listener Only --------------------------------------------------*/
  1378. if (((FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_ADDRI) != RESET) ||
  1379. (FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_STOPI) != RESET) ||
  1380. (FMPSMBUS_CHECK_IT_SOURCE(tmpcr1value, FMPSMBUS_IT_NACKI) != RESET)) &&
  1381. ((FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_ADDR) != RESET) ||
  1382. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_STOPF) != RESET) ||
  1383. (FMPSMBUS_CHECK_FLAG(tmpisrvalue, FMPSMBUS_FLAG_AF) != RESET)))
  1384. {
  1385. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
  1386. {
  1387. (void)FMPSMBUS_Slave_ISR(hfmpsmbus, tmpisrvalue);
  1388. }
  1389. }
  1390. }
  1391. /**
  1392. * @brief Handle FMPSMBUS error interrupt request.
  1393. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1394. * the configuration information for the specified FMPSMBUS.
  1395. * @retval None
  1396. */
  1397. void HAL_FMPSMBUS_ER_IRQHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1398. {
  1399. FMPSMBUS_ITErrorHandler(hfmpsmbus);
  1400. }
  1401. /**
  1402. * @brief Master Tx Transfer completed callback.
  1403. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1404. * the configuration information for the specified FMPSMBUS.
  1405. * @retval None
  1406. */
  1407. __weak void HAL_FMPSMBUS_MasterTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1408. {
  1409. /* Prevent unused argument(s) compilation warning */
  1410. UNUSED(hfmpsmbus);
  1411. /* NOTE : This function should not be modified, when the callback is needed,
  1412. the HAL_FMPSMBUS_MasterTxCpltCallback() could be implemented in the user file
  1413. */
  1414. }
  1415. /**
  1416. * @brief Master Rx Transfer completed callback.
  1417. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1418. * the configuration information for the specified FMPSMBUS.
  1419. * @retval None
  1420. */
  1421. __weak void HAL_FMPSMBUS_MasterRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1422. {
  1423. /* Prevent unused argument(s) compilation warning */
  1424. UNUSED(hfmpsmbus);
  1425. /* NOTE : This function should not be modified, when the callback is needed,
  1426. the HAL_FMPSMBUS_MasterRxCpltCallback() could be implemented in the user file
  1427. */
  1428. }
  1429. /** @brief Slave Tx Transfer completed callback.
  1430. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1431. * the configuration information for the specified FMPSMBUS.
  1432. * @retval None
  1433. */
  1434. __weak void HAL_FMPSMBUS_SlaveTxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1435. {
  1436. /* Prevent unused argument(s) compilation warning */
  1437. UNUSED(hfmpsmbus);
  1438. /* NOTE : This function should not be modified, when the callback is needed,
  1439. the HAL_FMPSMBUS_SlaveTxCpltCallback() could be implemented in the user file
  1440. */
  1441. }
  1442. /**
  1443. * @brief Slave Rx Transfer completed callback.
  1444. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1445. * the configuration information for the specified FMPSMBUS.
  1446. * @retval None
  1447. */
  1448. __weak void HAL_FMPSMBUS_SlaveRxCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1449. {
  1450. /* Prevent unused argument(s) compilation warning */
  1451. UNUSED(hfmpsmbus);
  1452. /* NOTE : This function should not be modified, when the callback is needed,
  1453. the HAL_FMPSMBUS_SlaveRxCpltCallback() could be implemented in the user file
  1454. */
  1455. }
  1456. /**
  1457. * @brief Slave Address Match callback.
  1458. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1459. * the configuration information for the specified FMPSMBUS.
  1460. * @param TransferDirection Master request Transfer Direction (Write/Read)
  1461. * @param AddrMatchCode Address Match Code
  1462. * @retval None
  1463. */
  1464. __weak void HAL_FMPSMBUS_AddrCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
  1465. {
  1466. /* Prevent unused argument(s) compilation warning */
  1467. UNUSED(hfmpsmbus);
  1468. UNUSED(TransferDirection);
  1469. UNUSED(AddrMatchCode);
  1470. /* NOTE : This function should not be modified, when the callback is needed,
  1471. the HAL_FMPSMBUS_AddrCallback() could be implemented in the user file
  1472. */
  1473. }
  1474. /**
  1475. * @brief Listen Complete callback.
  1476. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1477. * the configuration information for the specified FMPSMBUS.
  1478. * @retval None
  1479. */
  1480. __weak void HAL_FMPSMBUS_ListenCpltCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1481. {
  1482. /* Prevent unused argument(s) compilation warning */
  1483. UNUSED(hfmpsmbus);
  1484. /* NOTE : This function should not be modified, when the callback is needed,
  1485. the HAL_FMPSMBUS_ListenCpltCallback() could be implemented in the user file
  1486. */
  1487. }
  1488. /**
  1489. * @brief FMPSMBUS error callback.
  1490. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1491. * the configuration information for the specified FMPSMBUS.
  1492. * @retval None
  1493. */
  1494. __weak void HAL_FMPSMBUS_ErrorCallback(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1495. {
  1496. /* Prevent unused argument(s) compilation warning */
  1497. UNUSED(hfmpsmbus);
  1498. /* NOTE : This function should not be modified, when the callback is needed,
  1499. the HAL_FMPSMBUS_ErrorCallback() could be implemented in the user file
  1500. */
  1501. }
  1502. /**
  1503. * @}
  1504. */
  1505. /** @defgroup FMPSMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
  1506. * @brief Peripheral State and Errors functions
  1507. *
  1508. @verbatim
  1509. ===============================================================================
  1510. ##### Peripheral State and Errors functions #####
  1511. ===============================================================================
  1512. [..]
  1513. This subsection permits to get in run-time the status of the peripheral
  1514. and the data flow.
  1515. @endverbatim
  1516. * @{
  1517. */
  1518. /**
  1519. * @brief Return the FMPSMBUS handle state.
  1520. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1521. * the configuration information for the specified FMPSMBUS.
  1522. * @retval HAL state
  1523. */
  1524. uint32_t HAL_FMPSMBUS_GetState(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1525. {
  1526. /* Return FMPSMBUS handle state */
  1527. return hfmpsmbus->State;
  1528. }
  1529. /**
  1530. * @brief Return the FMPSMBUS error code.
  1531. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1532. * the configuration information for the specified FMPSMBUS.
  1533. * @retval FMPSMBUS Error Code
  1534. */
  1535. uint32_t HAL_FMPSMBUS_GetError(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  1536. {
  1537. return hfmpsmbus->ErrorCode;
  1538. }
  1539. /**
  1540. * @}
  1541. */
  1542. /**
  1543. * @}
  1544. */
  1545. /** @addtogroup FMPSMBUS_Private_Functions FMPSMBUS Private Functions
  1546. * @brief Data transfers Private functions
  1547. * @{
  1548. */
  1549. /**
  1550. * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
  1551. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1552. * the configuration information for the specified FMPSMBUS.
  1553. * @param StatusFlags Value of Interrupt Flags.
  1554. * @retval HAL status
  1555. */
  1556. static HAL_StatusTypeDef FMPSMBUS_Master_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
  1557. {
  1558. uint16_t DevAddress;
  1559. /* Process Locked */
  1560. __HAL_LOCK(hfmpsmbus);
  1561. if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_AF) != RESET)
  1562. {
  1563. /* Clear NACK Flag */
  1564. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1565. /* Set corresponding Error Code */
  1566. /* No need to generate STOP, it is automatically done */
  1567. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ACKF;
  1568. /* Process Unlocked */
  1569. __HAL_UNLOCK(hfmpsmbus);
  1570. /* Call the Error callback to inform upper layer */
  1571. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1572. hfmpsmbus->ErrorCallback(hfmpsmbus);
  1573. #else
  1574. HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
  1575. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1576. }
  1577. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_STOPF) != RESET)
  1578. {
  1579. /* Check and treat errors if errors occurs during STOP process */
  1580. FMPSMBUS_ITErrorHandler(hfmpsmbus);
  1581. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1582. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  1583. {
  1584. /* Disable Interrupt */
  1585. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  1586. /* Clear STOP Flag */
  1587. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1588. /* Clear Configuration Register 2 */
  1589. FMPSMBUS_RESET_CR2(hfmpsmbus);
  1590. /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
  1591. /* Disable the selected FMPSMBUS peripheral */
  1592. __HAL_FMPSMBUS_DISABLE(hfmpsmbus);
  1593. hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
  1594. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1595. /* Process Unlocked */
  1596. __HAL_UNLOCK(hfmpsmbus);
  1597. /* Re-enable the selected FMPSMBUS peripheral */
  1598. __HAL_FMPSMBUS_ENABLE(hfmpsmbus);
  1599. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1600. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1601. hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
  1602. #else
  1603. HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
  1604. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1605. }
  1606. else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  1607. {
  1608. /* Store Last receive data if any */
  1609. if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET)
  1610. {
  1611. /* Read data from RXDR */
  1612. *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
  1613. /* Increment Buffer pointer */
  1614. hfmpsmbus->pBuffPtr++;
  1615. if ((hfmpsmbus->XferSize > 0U))
  1616. {
  1617. hfmpsmbus->XferSize--;
  1618. hfmpsmbus->XferCount--;
  1619. }
  1620. }
  1621. /* Disable Interrupt */
  1622. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  1623. /* Clear STOP Flag */
  1624. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1625. /* Clear Configuration Register 2 */
  1626. FMPSMBUS_RESET_CR2(hfmpsmbus);
  1627. hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
  1628. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1629. /* Process Unlocked */
  1630. __HAL_UNLOCK(hfmpsmbus);
  1631. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1632. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1633. hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
  1634. #else
  1635. HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
  1636. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1637. }
  1638. else
  1639. {
  1640. /* Nothing to do */
  1641. }
  1642. }
  1643. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET)
  1644. {
  1645. /* Read data from RXDR */
  1646. *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
  1647. /* Increment Buffer pointer */
  1648. hfmpsmbus->pBuffPtr++;
  1649. /* Increment Size counter */
  1650. hfmpsmbus->XferSize--;
  1651. hfmpsmbus->XferCount--;
  1652. }
  1653. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TXIS) != RESET)
  1654. {
  1655. /* Write data to TXDR */
  1656. hfmpsmbus->Instance->TXDR = *hfmpsmbus->pBuffPtr;
  1657. /* Increment Buffer pointer */
  1658. hfmpsmbus->pBuffPtr++;
  1659. /* Increment Size counter */
  1660. hfmpsmbus->XferSize--;
  1661. hfmpsmbus->XferCount--;
  1662. }
  1663. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TCR) != RESET)
  1664. {
  1665. if ((hfmpsmbus->XferCount != 0U) && (hfmpsmbus->XferSize == 0U))
  1666. {
  1667. DevAddress = (uint16_t)(hfmpsmbus->Instance->CR2 & FMPI2C_CR2_SADD);
  1668. if (hfmpsmbus->XferCount > MAX_NBYTE_SIZE)
  1669. {
  1670. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, MAX_NBYTE_SIZE,
  1671. (FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE)), FMPSMBUS_NO_STARTSTOP);
  1672. hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
  1673. }
  1674. else
  1675. {
  1676. hfmpsmbus->XferSize = hfmpsmbus->XferCount;
  1677. FMPSMBUS_TransferConfig(hfmpsmbus, DevAddress, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  1678. /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
  1679. /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
  1680. if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
  1681. {
  1682. hfmpsmbus->XferSize--;
  1683. hfmpsmbus->XferCount--;
  1684. }
  1685. }
  1686. }
  1687. else if ((hfmpsmbus->XferCount == 0U) && (hfmpsmbus->XferSize == 0U))
  1688. {
  1689. /* Call TxCpltCallback() if no stop mode is set */
  1690. if (FMPSMBUS_GET_STOP_MODE(hfmpsmbus) != FMPSMBUS_AUTOEND_MODE)
  1691. {
  1692. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1693. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  1694. {
  1695. /* Disable Interrupt */
  1696. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  1697. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1698. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1699. /* Process Unlocked */
  1700. __HAL_UNLOCK(hfmpsmbus);
  1701. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1702. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1703. hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
  1704. #else
  1705. HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
  1706. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1707. }
  1708. else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  1709. {
  1710. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  1711. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1712. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1713. /* Process Unlocked */
  1714. __HAL_UNLOCK(hfmpsmbus);
  1715. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1716. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1717. hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
  1718. #else
  1719. HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
  1720. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1721. }
  1722. else
  1723. {
  1724. /* Nothing to do */
  1725. }
  1726. }
  1727. }
  1728. else
  1729. {
  1730. /* Nothing to do */
  1731. }
  1732. }
  1733. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TC) != RESET)
  1734. {
  1735. if (hfmpsmbus->XferCount == 0U)
  1736. {
  1737. /* Specific use case for Quick command */
  1738. if (hfmpsmbus->pBuffPtr == NULL)
  1739. {
  1740. /* Generate a Stop command */
  1741. hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_STOP;
  1742. }
  1743. /* Call TxCpltCallback() if no stop mode is set */
  1744. else if (FMPSMBUS_GET_STOP_MODE(hfmpsmbus) != FMPSMBUS_AUTOEND_MODE)
  1745. {
  1746. /* No Generate Stop, to permit restart mode */
  1747. /* The stop will be done at the end of transfer, when FMPSMBUS_AUTOEND_MODE enable */
  1748. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1749. if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_TX)
  1750. {
  1751. /* Disable Interrupt */
  1752. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  1753. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1754. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1755. /* Process Unlocked */
  1756. __HAL_UNLOCK(hfmpsmbus);
  1757. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1758. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1759. hfmpsmbus->MasterTxCpltCallback(hfmpsmbus);
  1760. #else
  1761. HAL_FMPSMBUS_MasterTxCpltCallback(hfmpsmbus);
  1762. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1763. }
  1764. else if (hfmpsmbus->State == HAL_FMPSMBUS_STATE_MASTER_BUSY_RX)
  1765. {
  1766. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  1767. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1768. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  1769. /* Process Unlocked */
  1770. __HAL_UNLOCK(hfmpsmbus);
  1771. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1772. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1773. hfmpsmbus->MasterRxCpltCallback(hfmpsmbus);
  1774. #else
  1775. HAL_FMPSMBUS_MasterRxCpltCallback(hfmpsmbus);
  1776. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1777. }
  1778. else
  1779. {
  1780. /* Nothing to do */
  1781. }
  1782. }
  1783. else
  1784. {
  1785. /* Nothing to do */
  1786. }
  1787. }
  1788. }
  1789. else
  1790. {
  1791. /* Nothing to do */
  1792. }
  1793. /* Process Unlocked */
  1794. __HAL_UNLOCK(hfmpsmbus);
  1795. return HAL_OK;
  1796. }
  1797. /**
  1798. * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
  1799. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  1800. * the configuration information for the specified FMPSMBUS.
  1801. * @param StatusFlags Value of Interrupt Flags.
  1802. * @retval HAL status
  1803. */
  1804. static HAL_StatusTypeDef FMPSMBUS_Slave_ISR(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t StatusFlags)
  1805. {
  1806. uint8_t TransferDirection;
  1807. uint16_t SlaveAddrCode;
  1808. /* Process Locked */
  1809. __HAL_LOCK(hfmpsmbus);
  1810. if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_AF) != RESET)
  1811. {
  1812. /* Check that FMPSMBUS transfer finished */
  1813. /* if yes, normal usecase, a NACK is sent by the HOST when Transfer is finished */
  1814. /* Mean XferCount == 0*/
  1815. /* So clear Flag NACKF only */
  1816. if (hfmpsmbus->XferCount == 0U)
  1817. {
  1818. /* Clear NACK Flag */
  1819. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1820. /* Process Unlocked */
  1821. __HAL_UNLOCK(hfmpsmbus);
  1822. }
  1823. else
  1824. {
  1825. /* if no, error usecase, a Non-Acknowledge of last Data is generated by the HOST*/
  1826. /* Clear NACK Flag */
  1827. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_AF);
  1828. /* Set HAL State to "Idle" State, mean to LISTEN state */
  1829. /* So reset Slave Busy state */
  1830. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1831. hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX);
  1832. hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX);
  1833. /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
  1834. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_TX);
  1835. /* Set ErrorCode corresponding to a Non-Acknowledge */
  1836. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ACKF;
  1837. /* Process Unlocked */
  1838. __HAL_UNLOCK(hfmpsmbus);
  1839. /* Call the Error callback to inform upper layer */
  1840. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1841. hfmpsmbus->ErrorCallback(hfmpsmbus);
  1842. #else
  1843. HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
  1844. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1845. }
  1846. }
  1847. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_ADDR) != RESET)
  1848. {
  1849. TransferDirection = (uint8_t)(FMPSMBUS_GET_DIR(hfmpsmbus));
  1850. SlaveAddrCode = (uint16_t)(FMPSMBUS_GET_ADDR_MATCH(hfmpsmbus));
  1851. /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
  1852. /* Other ADDRInterrupt will be treat in next Listen usecase */
  1853. __HAL_FMPSMBUS_DISABLE_IT(hfmpsmbus, FMPSMBUS_IT_ADDRI);
  1854. /* Process Unlocked */
  1855. __HAL_UNLOCK(hfmpsmbus);
  1856. /* Call Slave Addr callback */
  1857. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1858. hfmpsmbus->AddrCallback(hfmpsmbus, TransferDirection, SlaveAddrCode);
  1859. #else
  1860. HAL_FMPSMBUS_AddrCallback(hfmpsmbus, TransferDirection, SlaveAddrCode);
  1861. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1862. }
  1863. else if ((FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_RXNE) != RESET) ||
  1864. (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TCR) != RESET))
  1865. {
  1866. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX)
  1867. {
  1868. /* Read data from RXDR */
  1869. *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
  1870. /* Increment Buffer pointer */
  1871. hfmpsmbus->pBuffPtr++;
  1872. hfmpsmbus->XferSize--;
  1873. hfmpsmbus->XferCount--;
  1874. if (hfmpsmbus->XferCount == 1U)
  1875. {
  1876. /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
  1877. /* or only the last Byte of Transfer */
  1878. /* So reset the RELOAD bit mode */
  1879. hfmpsmbus->XferOptions &= ~FMPSMBUS_RELOAD_MODE;
  1880. FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  1881. }
  1882. else if (hfmpsmbus->XferCount == 0U)
  1883. {
  1884. /* Last Byte is received, disable Interrupt */
  1885. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX);
  1886. /* Remove HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_FMPSMBUS_STATE_LISTEN */
  1887. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1888. hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX);
  1889. /* Process Unlocked */
  1890. __HAL_UNLOCK(hfmpsmbus);
  1891. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1892. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1893. hfmpsmbus->SlaveRxCpltCallback(hfmpsmbus);
  1894. #else
  1895. HAL_FMPSMBUS_SlaveRxCpltCallback(hfmpsmbus);
  1896. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1897. }
  1898. else
  1899. {
  1900. /* Set Reload for next Bytes */
  1901. FMPSMBUS_TransferConfig(hfmpsmbus, 0, 1, FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE), FMPSMBUS_NO_STARTSTOP);
  1902. /* Ack last Byte Read */
  1903. hfmpsmbus->Instance->CR2 &= ~FMPI2C_CR2_NACK;
  1904. }
  1905. }
  1906. else if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
  1907. {
  1908. if ((hfmpsmbus->XferCount != 0U) && (hfmpsmbus->XferSize == 0U))
  1909. {
  1910. if (hfmpsmbus->XferCount > MAX_NBYTE_SIZE)
  1911. {
  1912. FMPSMBUS_TransferConfig(hfmpsmbus, 0, MAX_NBYTE_SIZE, (FMPSMBUS_RELOAD_MODE | (hfmpsmbus->XferOptions & FMPSMBUS_SENDPEC_MODE)),
  1913. FMPSMBUS_NO_STARTSTOP);
  1914. hfmpsmbus->XferSize = MAX_NBYTE_SIZE;
  1915. }
  1916. else
  1917. {
  1918. hfmpsmbus->XferSize = hfmpsmbus->XferCount;
  1919. FMPSMBUS_TransferConfig(hfmpsmbus, 0, (uint8_t)hfmpsmbus->XferSize, hfmpsmbus->XferOptions, FMPSMBUS_NO_STARTSTOP);
  1920. /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
  1921. /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
  1922. if (FMPSMBUS_GET_PEC_MODE(hfmpsmbus) != 0UL)
  1923. {
  1924. hfmpsmbus->XferSize--;
  1925. hfmpsmbus->XferCount--;
  1926. }
  1927. }
  1928. }
  1929. }
  1930. else
  1931. {
  1932. /* Nothing to do */
  1933. }
  1934. }
  1935. else if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_TXIS) != RESET)
  1936. {
  1937. /* Write data to TXDR only if XferCount not reach "0" */
  1938. /* A TXIS flag can be set, during STOP treatment */
  1939. /* Check if all Data have already been sent */
  1940. /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
  1941. if (hfmpsmbus->XferCount > 0U)
  1942. {
  1943. /* Write data to TXDR */
  1944. hfmpsmbus->Instance->TXDR = *hfmpsmbus->pBuffPtr;
  1945. /* Increment Buffer pointer */
  1946. hfmpsmbus->pBuffPtr++;
  1947. hfmpsmbus->XferCount--;
  1948. hfmpsmbus->XferSize--;
  1949. }
  1950. if (hfmpsmbus->XferCount == 0U)
  1951. {
  1952. /* Last Byte is Transmitted */
  1953. /* Remove HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_FMPSMBUS_STATE_LISTEN */
  1954. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_TX);
  1955. hfmpsmbus->PreviousState = hfmpsmbus->State;
  1956. hfmpsmbus->State &= ~((uint32_t)HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX);
  1957. /* Process Unlocked */
  1958. __HAL_UNLOCK(hfmpsmbus);
  1959. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1960. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  1961. hfmpsmbus->SlaveTxCpltCallback(hfmpsmbus);
  1962. #else
  1963. HAL_FMPSMBUS_SlaveTxCpltCallback(hfmpsmbus);
  1964. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  1965. }
  1966. }
  1967. else
  1968. {
  1969. /* Nothing to do */
  1970. }
  1971. /* Check if STOPF is set */
  1972. if (FMPSMBUS_CHECK_FLAG(StatusFlags, FMPSMBUS_FLAG_STOPF) != RESET)
  1973. {
  1974. if ((hfmpsmbus->State & HAL_FMPSMBUS_STATE_LISTEN) == HAL_FMPSMBUS_STATE_LISTEN)
  1975. {
  1976. /* Store Last receive data if any */
  1977. if (__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, FMPSMBUS_FLAG_RXNE) != RESET)
  1978. {
  1979. /* Read data from RXDR */
  1980. *hfmpsmbus->pBuffPtr = (uint8_t)(hfmpsmbus->Instance->RXDR);
  1981. /* Increment Buffer pointer */
  1982. hfmpsmbus->pBuffPtr++;
  1983. if ((hfmpsmbus->XferSize > 0U))
  1984. {
  1985. hfmpsmbus->XferSize--;
  1986. hfmpsmbus->XferCount--;
  1987. }
  1988. }
  1989. /* Disable RX and TX Interrupts */
  1990. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_RX | FMPSMBUS_IT_TX);
  1991. /* Disable ADDR Interrupt */
  1992. FMPSMBUS_Disable_IRQ(hfmpsmbus, FMPSMBUS_IT_ADDR);
  1993. /* Disable Address Acknowledge */
  1994. hfmpsmbus->Instance->CR2 |= FMPI2C_CR2_NACK;
  1995. /* Clear Configuration Register 2 */
  1996. FMPSMBUS_RESET_CR2(hfmpsmbus);
  1997. /* Clear STOP Flag */
  1998. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_STOPF);
  1999. /* Clear ADDR flag */
  2000. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ADDR);
  2001. hfmpsmbus->XferOptions = 0;
  2002. hfmpsmbus->PreviousState = hfmpsmbus->State;
  2003. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  2004. /* Process Unlocked */
  2005. __HAL_UNLOCK(hfmpsmbus);
  2006. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  2007. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  2008. hfmpsmbus->ListenCpltCallback(hfmpsmbus);
  2009. #else
  2010. HAL_FMPSMBUS_ListenCpltCallback(hfmpsmbus);
  2011. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  2012. }
  2013. }
  2014. /* Process Unlocked */
  2015. __HAL_UNLOCK(hfmpsmbus);
  2016. return HAL_OK;
  2017. }
  2018. /**
  2019. * @brief Manage the enabling of Interrupts.
  2020. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  2021. * the configuration information for the specified FMPSMBUS.
  2022. * @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
  2023. * @retval HAL status
  2024. */
  2025. static void FMPSMBUS_Enable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
  2026. {
  2027. uint32_t tmpisr = 0UL;
  2028. if ((InterruptRequest & FMPSMBUS_IT_ALERT) == FMPSMBUS_IT_ALERT)
  2029. {
  2030. /* Enable ERR interrupt */
  2031. tmpisr |= FMPSMBUS_IT_ERRI;
  2032. }
  2033. if ((InterruptRequest & FMPSMBUS_IT_ADDR) == FMPSMBUS_IT_ADDR)
  2034. {
  2035. /* Enable ADDR, STOP interrupt */
  2036. tmpisr |= FMPSMBUS_IT_ADDRI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_ERRI;
  2037. }
  2038. if ((InterruptRequest & FMPSMBUS_IT_TX) == FMPSMBUS_IT_TX)
  2039. {
  2040. /* Enable ERR, TC, STOP, NACK, RXI interrupt */
  2041. tmpisr |= FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_TXI;
  2042. }
  2043. if ((InterruptRequest & FMPSMBUS_IT_RX) == FMPSMBUS_IT_RX)
  2044. {
  2045. /* Enable ERR, TC, STOP, NACK, TXI interrupt */
  2046. tmpisr |= FMPSMBUS_IT_ERRI | FMPSMBUS_IT_TCI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI | FMPSMBUS_IT_RXI;
  2047. }
  2048. /* Enable interrupts only at the end */
  2049. /* to avoid the risk of FMPSMBUS interrupt handle execution before */
  2050. /* all interrupts requested done */
  2051. __HAL_FMPSMBUS_ENABLE_IT(hfmpsmbus, tmpisr);
  2052. }
  2053. /**
  2054. * @brief Manage the disabling of Interrupts.
  2055. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  2056. * the configuration information for the specified FMPSMBUS.
  2057. * @param InterruptRequest Value of @ref FMPSMBUS_Interrupt_configuration_definition.
  2058. * @retval HAL status
  2059. */
  2060. static void FMPSMBUS_Disable_IRQ(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t InterruptRequest)
  2061. {
  2062. uint32_t tmpisr = 0UL;
  2063. uint32_t tmpstate = hfmpsmbus->State;
  2064. if ((tmpstate == HAL_FMPSMBUS_STATE_READY) && ((InterruptRequest & FMPSMBUS_IT_ALERT) == FMPSMBUS_IT_ALERT))
  2065. {
  2066. /* Disable ERR interrupt */
  2067. tmpisr |= FMPSMBUS_IT_ERRI;
  2068. }
  2069. if ((InterruptRequest & FMPSMBUS_IT_TX) == FMPSMBUS_IT_TX)
  2070. {
  2071. /* Disable TC, STOP, NACK and TXI interrupt */
  2072. tmpisr |= FMPSMBUS_IT_TCI | FMPSMBUS_IT_TXI;
  2073. if ((FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
  2074. && ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN))
  2075. {
  2076. /* Disable ERR interrupt */
  2077. tmpisr |= FMPSMBUS_IT_ERRI;
  2078. }
  2079. if ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN)
  2080. {
  2081. /* Disable STOP and NACK interrupt */
  2082. tmpisr |= FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
  2083. }
  2084. }
  2085. if ((InterruptRequest & FMPSMBUS_IT_RX) == FMPSMBUS_IT_RX)
  2086. {
  2087. /* Disable TC, STOP, NACK and RXI interrupt */
  2088. tmpisr |= FMPSMBUS_IT_TCI | FMPSMBUS_IT_RXI;
  2089. if ((FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
  2090. && ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN))
  2091. {
  2092. /* Disable ERR interrupt */
  2093. tmpisr |= FMPSMBUS_IT_ERRI;
  2094. }
  2095. if ((tmpstate & HAL_FMPSMBUS_STATE_LISTEN) != HAL_FMPSMBUS_STATE_LISTEN)
  2096. {
  2097. /* Disable STOP and NACK interrupt */
  2098. tmpisr |= FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
  2099. }
  2100. }
  2101. if ((InterruptRequest & FMPSMBUS_IT_ADDR) == FMPSMBUS_IT_ADDR)
  2102. {
  2103. /* Disable ADDR, STOP and NACK interrupt */
  2104. tmpisr |= FMPSMBUS_IT_ADDRI | FMPSMBUS_IT_STOPI | FMPSMBUS_IT_NACKI;
  2105. if (FMPSMBUS_GET_ALERT_ENABLED(hfmpsmbus) == 0UL)
  2106. {
  2107. /* Disable ERR interrupt */
  2108. tmpisr |= FMPSMBUS_IT_ERRI;
  2109. }
  2110. }
  2111. /* Disable interrupts only at the end */
  2112. /* to avoid a breaking situation like at "t" time */
  2113. /* all disable interrupts request are not done */
  2114. __HAL_FMPSMBUS_DISABLE_IT(hfmpsmbus, tmpisr);
  2115. }
  2116. /**
  2117. * @brief FMPSMBUS interrupts error handler.
  2118. * @param hfmpsmbus FMPSMBUS handle.
  2119. * @retval None
  2120. */
  2121. static void FMPSMBUS_ITErrorHandler(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  2122. {
  2123. uint32_t itflags = READ_REG(hfmpsmbus->Instance->ISR);
  2124. uint32_t itsources = READ_REG(hfmpsmbus->Instance->CR1);
  2125. uint32_t tmpstate;
  2126. uint32_t tmperror;
  2127. /* FMPSMBUS Bus error interrupt occurred ------------------------------------*/
  2128. if (((itflags & FMPSMBUS_FLAG_BERR) == FMPSMBUS_FLAG_BERR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2129. {
  2130. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_BERR;
  2131. /* Clear BERR flag */
  2132. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_BERR);
  2133. }
  2134. /* FMPSMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
  2135. if (((itflags & FMPSMBUS_FLAG_OVR) == FMPSMBUS_FLAG_OVR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2136. {
  2137. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_OVR;
  2138. /* Clear OVR flag */
  2139. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_OVR);
  2140. }
  2141. /* FMPSMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
  2142. if (((itflags & FMPSMBUS_FLAG_ARLO) == FMPSMBUS_FLAG_ARLO) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2143. {
  2144. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ARLO;
  2145. /* Clear ARLO flag */
  2146. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ARLO);
  2147. }
  2148. /* FMPSMBUS Timeout error interrupt occurred ---------------------------------------------*/
  2149. if (((itflags & FMPSMBUS_FLAG_TIMEOUT) == FMPSMBUS_FLAG_TIMEOUT) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2150. {
  2151. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_BUSTIMEOUT;
  2152. /* Clear TIMEOUT flag */
  2153. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_TIMEOUT);
  2154. }
  2155. /* FMPSMBUS Alert error interrupt occurred -----------------------------------------------*/
  2156. if (((itflags & FMPSMBUS_FLAG_ALERT) == FMPSMBUS_FLAG_ALERT) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2157. {
  2158. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_ALERT;
  2159. /* Clear ALERT flag */
  2160. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_ALERT);
  2161. }
  2162. /* FMPSMBUS Packet Error Check error interrupt occurred ----------------------------------*/
  2163. if (((itflags & FMPSMBUS_FLAG_PECERR) == FMPSMBUS_FLAG_PECERR) && ((itsources & FMPSMBUS_IT_ERRI) == FMPSMBUS_IT_ERRI))
  2164. {
  2165. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_PECERR;
  2166. /* Clear PEC error flag */
  2167. __HAL_FMPSMBUS_CLEAR_FLAG(hfmpsmbus, FMPSMBUS_FLAG_PECERR);
  2168. }
  2169. /* Store current volatile hfmpsmbus->State, misra rule */
  2170. tmperror = hfmpsmbus->ErrorCode;
  2171. /* Call the Error Callback in case of Error detected */
  2172. if ((tmperror != HAL_FMPSMBUS_ERROR_NONE) && (tmperror != HAL_FMPSMBUS_ERROR_ACKF))
  2173. {
  2174. /* Do not Reset the HAL state in case of ALERT error */
  2175. if ((tmperror & HAL_FMPSMBUS_ERROR_ALERT) != HAL_FMPSMBUS_ERROR_ALERT)
  2176. {
  2177. /* Store current volatile hfmpsmbus->State, misra rule */
  2178. tmpstate = hfmpsmbus->State;
  2179. if (((tmpstate & HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_TX)
  2180. || ((tmpstate & HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX) == HAL_FMPSMBUS_STATE_SLAVE_BUSY_RX))
  2181. {
  2182. /* Reset only HAL_FMPSMBUS_STATE_SLAVE_BUSY_XX */
  2183. /* keep HAL_FMPSMBUS_STATE_LISTEN if set */
  2184. hfmpsmbus->PreviousState = HAL_FMPSMBUS_STATE_READY;
  2185. hfmpsmbus->State = HAL_FMPSMBUS_STATE_LISTEN;
  2186. }
  2187. }
  2188. /* Call the Error callback to inform upper layer */
  2189. #if (USE_HAL_FMPSMBUS_REGISTER_CALLBACKS == 1)
  2190. hfmpsmbus->ErrorCallback(hfmpsmbus);
  2191. #else
  2192. HAL_FMPSMBUS_ErrorCallback(hfmpsmbus);
  2193. #endif /* USE_HAL_FMPSMBUS_REGISTER_CALLBACKS */
  2194. }
  2195. }
  2196. /**
  2197. * @brief Handle FMPSMBUS Communication Timeout.
  2198. * @param hfmpsmbus Pointer to a FMPSMBUS_HandleTypeDef structure that contains
  2199. * the configuration information for the specified FMPSMBUS.
  2200. * @param Flag Specifies the FMPSMBUS flag to check.
  2201. * @param Status The new Flag status (SET or RESET).
  2202. * @param Timeout Timeout duration
  2203. * @retval HAL status
  2204. */
  2205. static HAL_StatusTypeDef FMPSMBUS_WaitOnFlagUntilTimeout(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint32_t Flag, FlagStatus Status,
  2206. uint32_t Timeout)
  2207. {
  2208. uint32_t tickstart = HAL_GetTick();
  2209. /* Wait until flag is set */
  2210. while ((FlagStatus)(__HAL_FMPSMBUS_GET_FLAG(hfmpsmbus, Flag)) == Status)
  2211. {
  2212. /* Check for the Timeout */
  2213. if (Timeout != HAL_MAX_DELAY)
  2214. {
  2215. if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
  2216. {
  2217. hfmpsmbus->PreviousState = hfmpsmbus->State;
  2218. hfmpsmbus->State = HAL_FMPSMBUS_STATE_READY;
  2219. /* Update FMPSMBUS error code */
  2220. hfmpsmbus->ErrorCode |= HAL_FMPSMBUS_ERROR_HALTIMEOUT;
  2221. /* Process Unlocked */
  2222. __HAL_UNLOCK(hfmpsmbus);
  2223. return HAL_ERROR;
  2224. }
  2225. }
  2226. }
  2227. return HAL_OK;
  2228. }
  2229. /**
  2230. * @brief Handle FMPSMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
  2231. * @param hfmpsmbus FMPSMBUS handle.
  2232. * @param DevAddress specifies the slave address to be programmed.
  2233. * @param Size specifies the number of bytes to be programmed.
  2234. * This parameter must be a value between 0 and 255.
  2235. * @param Mode New state of the FMPSMBUS START condition generation.
  2236. * This parameter can be one or a combination of the following values:
  2237. * @arg @ref FMPSMBUS_RELOAD_MODE Enable Reload mode.
  2238. * @arg @ref FMPSMBUS_AUTOEND_MODE Enable Automatic end mode.
  2239. * @arg @ref FMPSMBUS_SOFTEND_MODE Enable Software end mode and Reload mode.
  2240. * @arg @ref FMPSMBUS_SENDPEC_MODE Enable Packet Error Calculation mode.
  2241. * @param Request New state of the FMPSMBUS START condition generation.
  2242. * This parameter can be one of the following values:
  2243. * @arg @ref FMPSMBUS_NO_STARTSTOP Don't Generate stop and start condition.
  2244. * @arg @ref FMPSMBUS_GENERATE_STOP Generate stop condition (Size should be set to 0).
  2245. * @arg @ref FMPSMBUS_GENERATE_START_READ Generate Restart for read request.
  2246. * @arg @ref FMPSMBUS_GENERATE_START_WRITE Generate Restart for write request.
  2247. * @retval None
  2248. */
  2249. static void FMPSMBUS_TransferConfig(FMPSMBUS_HandleTypeDef *hfmpsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode,
  2250. uint32_t Request)
  2251. {
  2252. /* Check the parameters */
  2253. assert_param(IS_FMPSMBUS_ALL_INSTANCE(hfmpsmbus->Instance));
  2254. assert_param(IS_FMPSMBUS_TRANSFER_MODE(Mode));
  2255. assert_param(IS_FMPSMBUS_TRANSFER_REQUEST(Request));
  2256. /* update CR2 register */
  2257. MODIFY_REG(hfmpsmbus->Instance->CR2,
  2258. ((FMPI2C_CR2_SADD | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_AUTOEND | \
  2259. (FMPI2C_CR2_RD_WRN & (uint32_t)(Request >> (31UL - FMPI2C_CR2_RD_WRN_Pos))) | \
  2260. FMPI2C_CR2_START | FMPI2C_CR2_STOP | FMPI2C_CR2_PECBYTE)), \
  2261. (uint32_t)(((uint32_t)DevAddress & FMPI2C_CR2_SADD) | \
  2262. (((uint32_t)Size << FMPI2C_CR2_NBYTES_Pos) & FMPI2C_CR2_NBYTES) | (uint32_t)Mode | (uint32_t)Request));
  2263. }
  2264. /**
  2265. * @brief Convert FMPSMBUSx OTHER_xxx XferOptions to functional XferOptions.
  2266. * @param hfmpsmbus FMPSMBUS handle.
  2267. * @retval None
  2268. */
  2269. static void FMPSMBUS_ConvertOtherXferOptions(FMPSMBUS_HandleTypeDef *hfmpsmbus)
  2270. {
  2271. /* if user set XferOptions to FMPSMBUS_OTHER_FRAME_NO_PEC */
  2272. /* it request implicitly to generate a restart condition */
  2273. /* set XferOptions to FMPSMBUS_FIRST_FRAME */
  2274. if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_FRAME_NO_PEC)
  2275. {
  2276. hfmpsmbus->XferOptions = FMPSMBUS_FIRST_FRAME;
  2277. }
  2278. /* else if user set XferOptions to FMPSMBUS_OTHER_FRAME_WITH_PEC */
  2279. /* it request implicitly to generate a restart condition */
  2280. /* set XferOptions to FMPSMBUS_FIRST_FRAME | FMPSMBUS_SENDPEC_MODE */
  2281. else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_FRAME_WITH_PEC)
  2282. {
  2283. hfmpsmbus->XferOptions = FMPSMBUS_FIRST_FRAME | FMPSMBUS_SENDPEC_MODE;
  2284. }
  2285. /* else if user set XferOptions to FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC */
  2286. /* it request implicitly to generate a restart condition */
  2287. /* then generate a stop condition at the end of transfer */
  2288. /* set XferOptions to FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC */
  2289. else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_AND_LAST_FRAME_NO_PEC)
  2290. {
  2291. hfmpsmbus->XferOptions = FMPSMBUS_FIRST_AND_LAST_FRAME_NO_PEC;
  2292. }
  2293. /* else if user set XferOptions to FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC */
  2294. /* it request implicitly to generate a restart condition */
  2295. /* then generate a stop condition at the end of transfer */
  2296. /* set XferOptions to FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC */
  2297. else if (hfmpsmbus->XferOptions == FMPSMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)
  2298. {
  2299. hfmpsmbus->XferOptions = FMPSMBUS_FIRST_AND_LAST_FRAME_WITH_PEC;
  2300. }
  2301. else
  2302. {
  2303. /* Nothing to do */
  2304. }
  2305. }
  2306. /**
  2307. * @}
  2308. */
  2309. #endif /* FMPI2C_CR1_PE */
  2310. #endif /* HAL_FMPSMBUS_MODULE_ENABLED */
  2311. /**
  2312. * @}
  2313. */
  2314. /**
  2315. * @}
  2316. */
  2317. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/