stm32f4xx_ll_dma2d.h 74 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F4xx_LL_DMA2D_H
  21. #define STM32F4xx_LL_DMA2D_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f4xx.h"
  27. /** @addtogroup STM32F4xx_LL_Driver
  28. * @{
  29. */
  30. #if defined (DMA2D)
  31. /** @defgroup DMA2D_LL DMA2D
  32. * @{
  33. */
  34. /* Private types -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private constants ---------------------------------------------------------*/
  37. /* Private macros ------------------------------------------------------------*/
  38. #if defined(USE_FULL_LL_DRIVER)
  39. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  40. * @{
  41. */
  42. /**
  43. * @}
  44. */
  45. #endif /*USE_FULL_LL_DRIVER*/
  46. /* Exported types ------------------------------------------------------------*/
  47. #if defined(USE_FULL_LL_DRIVER)
  48. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  49. * @{
  50. */
  51. /**
  52. * @brief LL DMA2D Init Structure Definition
  53. */
  54. typedef struct
  55. {
  56. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  57. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  58. This parameter can be modified afterwards,
  59. using unitary function @ref LL_DMA2D_SetMode(). */
  60. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  61. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  62. This parameter can be modified afterwards using,
  63. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  64. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  65. - This parameter must be a number between:
  66. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  67. - This parameter must be a number between:
  68. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  69. - This parameter must be a number between:
  70. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  71. - This parameter must be a number between:
  72. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  73. - This parameter must be a number between:
  74. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  75. This parameter can be modified afterwards,
  76. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  77. function @ref LL_DMA2D_ConfigOutputColor(). */
  78. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  79. - This parameter must be a number between:
  80. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  81. - This parameter must be a number between:
  82. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  83. - This parameter must be a number between:
  84. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  85. - This parameter must be a number between:
  86. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  87. - This parameter must be a number between:
  88. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  89. This parameter can be modified afterwards
  90. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  91. function @ref LL_DMA2D_ConfigOutputColor(). */
  92. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  93. - This parameter must be a number between:
  94. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  95. - This parameter must be a number between:
  96. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  97. - This parameter must be a number between:
  98. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  99. - This parameter must be a number between:
  100. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  101. - This parameter must be a number between:
  102. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  103. This parameter can be modified afterwards
  104. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  105. function @ref LL_DMA2D_ConfigOutputColor(). */
  106. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  107. - This parameter must be a number between:
  108. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  109. - This parameter must be a number between:
  110. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  111. - This parameter must be a number between:
  112. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  113. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  114. This parameter can be modified afterwards using,
  115. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  116. function @ref LL_DMA2D_ConfigOutputColor(). */
  117. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  118. - This parameter must be a number between:
  119. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  120. This parameter can be modified afterwards,
  121. using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  122. uint32_t LineOffset; /*!< Specifies the output line offset value.
  123. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  124. This parameter can be modified afterwards,
  125. using unitary function @ref LL_DMA2D_SetLineOffset(). */
  126. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  127. - This parameter must be a number between:
  128. Min_Data = 0x0000 and Max_Data = 0xFFFF.
  129. This parameter can be modified afterwards,
  130. using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  131. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transferred.
  132. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  133. This parameter can be modified afterwards using,
  134. unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  135. } LL_DMA2D_InitTypeDef;
  136. /**
  137. * @brief LL DMA2D Layer Configuration Structure Definition
  138. */
  139. typedef struct
  140. {
  141. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  142. - This parameter must be a number between:
  143. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  144. This parameter can be modified afterwards using unitary functions
  145. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  146. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  147. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  148. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  149. This parameter can be modified afterwards using unitary functions
  150. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  151. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  152. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  153. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  154. This parameter can be modified afterwards using unitary functions
  155. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  156. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  157. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  158. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  159. This parameter can be modified afterwards using unitary functions
  160. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  161. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  162. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  163. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  164. This parameter can be modified afterwards using unitary functions
  165. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  166. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  167. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  168. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  169. This parameter can be modified afterwards using unitary functions
  170. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  171. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  172. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  173. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  174. This parameter can be modified afterwards using unitary functions
  175. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  176. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  177. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  178. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  179. This parameter can be modified afterwards using unitary functions
  180. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  181. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  182. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  183. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  184. This parameter can be modified afterwards using unitary functions
  185. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  186. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  187. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  188. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  189. This parameter can be modified afterwards using unitary functions
  190. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  191. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  192. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  193. - This parameter must be a number between:
  194. Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  195. This parameter can be modified afterwards using unitary functions
  196. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  197. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  198. } LL_DMA2D_LayerCfgTypeDef;
  199. /**
  200. * @brief LL DMA2D Output Color Structure Definition
  201. */
  202. typedef struct
  203. {
  204. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  205. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  206. This parameter can be modified afterwards using
  207. unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  208. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  209. - This parameter must be a number between:
  210. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  211. - This parameter must be a number between:
  212. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  213. - This parameter must be a number between:
  214. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  215. - This parameter must be a number between:
  216. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  217. - This parameter must be a number between:
  218. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  219. This parameter can be modified afterwards using,
  220. unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  221. function @ref LL_DMA2D_ConfigOutputColor(). */
  222. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  223. - This parameter must be a number between:
  224. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  225. - This parameter must be a number between
  226. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  227. - This parameter must be a number between:
  228. Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  229. - This parameter must be a number between:
  230. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  231. - This parameter must be a number between:
  232. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  233. This parameter can be modified afterwards,
  234. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  235. function @ref LL_DMA2D_ConfigOutputColor(). */
  236. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  237. - This parameter must be a number between:
  238. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  239. - This parameter must be a number between:
  240. Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  241. - This parameter must be a number between:
  242. Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  243. - This parameter must be a number between:
  244. Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  245. - This parameter must be a number between:
  246. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  247. This parameter can be modified afterwards,
  248. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  249. function @ref LL_DMA2D_ConfigOutputColor(). */
  250. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  251. - This parameter must be a number between:
  252. Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  253. - This parameter must be a number between:
  254. Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  255. - This parameter must be a number between:
  256. Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  257. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  258. This parameter can be modified afterwards,
  259. using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  260. function @ref LL_DMA2D_ConfigOutputColor(). */
  261. } LL_DMA2D_ColorTypeDef;
  262. /**
  263. * @}
  264. */
  265. #endif /* USE_FULL_LL_DRIVER */
  266. /* Exported constants --------------------------------------------------------*/
  267. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  268. * @{
  269. */
  270. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  271. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  272. * @{
  273. */
  274. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  275. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  276. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  277. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  278. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  279. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  280. /**
  281. * @}
  282. */
  283. /** @defgroup DMA2D_LL_EC_IT IT Defines
  284. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  285. * @{
  286. */
  287. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  288. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  289. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  290. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  291. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  292. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  293. /**
  294. * @}
  295. */
  296. /** @defgroup DMA2D_LL_EC_MODE Mode
  297. * @{
  298. */
  299. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  300. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  301. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  302. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  303. /**
  304. * @}
  305. */
  306. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  307. * @{
  308. */
  309. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  310. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  311. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  312. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  313. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  314. /**
  315. * @}
  316. */
  317. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  318. * @{
  319. */
  320. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  321. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  322. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  323. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  324. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  325. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  326. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  327. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  328. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  329. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  330. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  331. /**
  332. * @}
  333. */
  334. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  335. * @{
  336. */
  337. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  338. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by
  339. programmed alpha value */
  340. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by
  341. programmed alpha value with,
  342. original alpha channel value */
  343. /**
  344. * @}
  345. */
  346. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  347. * @{
  348. */
  349. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  350. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  351. /**
  352. * @}
  353. */
  354. /**
  355. * @}
  356. */
  357. /* Exported macro ------------------------------------------------------------*/
  358. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  359. * @{
  360. */
  361. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  362. * @{
  363. */
  364. /**
  365. * @brief Write a value in DMA2D register.
  366. * @param __INSTANCE__ DMA2D Instance
  367. * @param __REG__ Register to be written
  368. * @param __VALUE__ Value to be written in the register
  369. * @retval None
  370. */
  371. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  372. /**
  373. * @brief Read a value in DMA2D register.
  374. * @param __INSTANCE__ DMA2D Instance
  375. * @param __REG__ Register to be read
  376. * @retval Register value
  377. */
  378. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  379. /**
  380. * @}
  381. */
  382. /**
  383. * @}
  384. */
  385. /* Exported functions --------------------------------------------------------*/
  386. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  387. * @{
  388. */
  389. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  390. * @{
  391. */
  392. /**
  393. * @brief Start a DMA2D transfer.
  394. * @rmtoll CR START LL_DMA2D_Start
  395. * @param DMA2Dx DMA2D Instance
  396. * @retval None
  397. */
  398. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  399. {
  400. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  401. }
  402. /**
  403. * @brief Indicate if a DMA2D transfer is ongoing.
  404. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  405. * @param DMA2Dx DMA2D Instance
  406. * @retval State of bit (1 or 0).
  407. */
  408. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  409. {
  410. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  411. }
  412. /**
  413. * @brief Suspend DMA2D transfer.
  414. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  415. * @rmtoll CR SUSP LL_DMA2D_Suspend
  416. * @param DMA2Dx DMA2D Instance
  417. * @retval None
  418. */
  419. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  420. {
  421. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  422. }
  423. /**
  424. * @brief Resume DMA2D transfer.
  425. * @note This API can be used to resume automatic foreground or background CLUT loading.
  426. * @rmtoll CR SUSP LL_DMA2D_Resume
  427. * @param DMA2Dx DMA2D Instance
  428. * @retval None
  429. */
  430. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  431. {
  432. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  433. }
  434. /**
  435. * @brief Indicate if DMA2D transfer is suspended.
  436. * @note This API can be used to indicate whether or not automatic foreground or
  437. * background CLUT loading is suspended.
  438. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  439. * @param DMA2Dx DMA2D Instance
  440. * @retval State of bit (1 or 0).
  441. */
  442. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  443. {
  444. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  445. }
  446. /**
  447. * @brief Abort DMA2D transfer.
  448. * @note This API can be used to abort automatic foreground or background CLUT loading.
  449. * @rmtoll CR ABORT LL_DMA2D_Abort
  450. * @param DMA2Dx DMA2D Instance
  451. * @retval None
  452. */
  453. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  454. {
  455. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  456. }
  457. /**
  458. * @brief Indicate if DMA2D transfer is aborted.
  459. * @note This API can be used to indicate whether or not automatic foreground or
  460. * background CLUT loading is aborted.
  461. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  462. * @param DMA2Dx DMA2D Instance
  463. * @retval State of bit (1 or 0).
  464. */
  465. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  466. {
  467. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  468. }
  469. /**
  470. * @brief Set DMA2D mode.
  471. * @rmtoll CR MODE LL_DMA2D_SetMode
  472. * @param DMA2Dx DMA2D Instance
  473. * @param Mode This parameter can be one of the following values:
  474. * @arg @ref LL_DMA2D_MODE_M2M
  475. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  476. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  477. * @arg @ref LL_DMA2D_MODE_R2M
  478. * @retval None
  479. */
  480. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  481. {
  482. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  483. }
  484. /**
  485. * @brief Return DMA2D mode
  486. * @rmtoll CR MODE LL_DMA2D_GetMode
  487. * @param DMA2Dx DMA2D Instance
  488. * @retval Returned value can be one of the following values:
  489. * @arg @ref LL_DMA2D_MODE_M2M
  490. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  491. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  492. * @arg @ref LL_DMA2D_MODE_R2M
  493. */
  494. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  495. {
  496. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  497. }
  498. /**
  499. * @brief Set DMA2D output color mode.
  500. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  501. * @param DMA2Dx DMA2D Instance
  502. * @param ColorMode This parameter can be one of the following values:
  503. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  504. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  505. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  506. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  507. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  508. * @retval None
  509. */
  510. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  511. {
  512. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  513. }
  514. /**
  515. * @brief Return DMA2D output color mode.
  516. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  517. * @param DMA2Dx DMA2D Instance
  518. * @retval Returned value can be one of the following values:
  519. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  520. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  521. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  522. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  523. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  524. */
  525. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  526. {
  527. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  528. }
  529. /**
  530. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  531. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  532. * @param DMA2Dx DMA2D Instance
  533. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  534. * @retval None
  535. */
  536. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  537. {
  538. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  539. }
  540. /**
  541. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  542. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  543. * @param DMA2Dx DMA2D Instance
  544. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  545. */
  546. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  547. {
  548. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  549. }
  550. /**
  551. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  552. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  553. * @param DMA2Dx DMA2D Instance
  554. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  555. * @retval None
  556. */
  557. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  558. {
  559. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  560. }
  561. /**
  562. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  563. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  564. * @param DMA2Dx DMA2D Instance
  565. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  566. */
  567. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  568. {
  569. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  570. }
  571. /**
  572. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  573. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  574. * @param DMA2Dx DMA2D Instance
  575. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  576. * @retval None
  577. */
  578. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  579. {
  580. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  581. }
  582. /**
  583. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  584. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  585. * @param DMA2Dx DMA2D Instance
  586. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  587. */
  588. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  589. {
  590. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  591. }
  592. /**
  593. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  594. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  595. * @param DMA2Dx DMA2D Instance
  596. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  597. * @retval None
  598. */
  599. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  600. {
  601. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  602. }
  603. /**
  604. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  605. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  606. * @param DMA2Dx DMA2D Instance
  607. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  608. */
  609. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  610. {
  611. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  612. }
  613. /**
  614. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  615. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  616. * RGB565, ARGB1555 or ARGB4444.
  617. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  618. * with respect to color mode is not done by the user code.
  619. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  620. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  621. * OCOLR RED LL_DMA2D_SetOutputColor\n
  622. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  623. * @param DMA2Dx DMA2D Instance
  624. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  625. * @retval None
  626. */
  627. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  628. {
  629. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  630. OutputColor);
  631. }
  632. /**
  633. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  634. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  635. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  636. * as set by @ref LL_DMA2D_SetOutputColorMode.
  637. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  638. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  639. * OCOLR RED LL_DMA2D_GetOutputColor\n
  640. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  641. * @param DMA2Dx DMA2D Instance
  642. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  643. */
  644. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  645. {
  646. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  647. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  648. }
  649. /**
  650. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  651. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  652. * @param DMA2Dx DMA2D Instance
  653. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  654. * @retval None
  655. */
  656. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  657. {
  658. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  659. }
  660. /**
  661. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  662. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  663. * @param DMA2Dx DMA2D Instance
  664. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  665. */
  666. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  667. {
  668. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  669. }
  670. /**
  671. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  672. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  673. * @param DMA2Dx DMA2D Instance
  674. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  675. * @retval None
  676. */
  677. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  678. {
  679. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  680. }
  681. /**
  682. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  683. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  684. * @param DMA2Dx DMA2D Instance
  685. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  686. */
  687. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  688. {
  689. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  690. }
  691. /**
  692. * @brief Enable DMA2D dead time functionality.
  693. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  694. * @param DMA2Dx DMA2D Instance
  695. * @retval None
  696. */
  697. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  698. {
  699. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  700. }
  701. /**
  702. * @brief Disable DMA2D dead time functionality.
  703. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  704. * @param DMA2Dx DMA2D Instance
  705. * @retval None
  706. */
  707. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  708. {
  709. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  710. }
  711. /**
  712. * @brief Indicate if DMA2D dead time functionality is enabled.
  713. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  714. * @param DMA2Dx DMA2D Instance
  715. * @retval State of bit (1 or 0).
  716. */
  717. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  718. {
  719. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  720. }
  721. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  722. * @{
  723. */
  724. /**
  725. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  726. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  727. * @param DMA2Dx DMA2D Instance
  728. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  729. * @retval None
  730. */
  731. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  732. {
  733. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  734. }
  735. /**
  736. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  737. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  738. * @param DMA2Dx DMA2D Instance
  739. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  740. */
  741. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  742. {
  743. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  744. }
  745. /**
  746. * @brief Enable DMA2D foreground CLUT loading.
  747. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  748. * @param DMA2Dx DMA2D Instance
  749. * @retval None
  750. */
  751. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  752. {
  753. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  754. }
  755. /**
  756. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  757. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  758. * @param DMA2Dx DMA2D Instance
  759. * @retval State of bit (1 or 0).
  760. */
  761. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  762. {
  763. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  764. }
  765. /**
  766. * @brief Set DMA2D foreground color mode.
  767. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  768. * @param DMA2Dx DMA2D Instance
  769. * @param ColorMode This parameter can be one of the following values:
  770. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  771. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  772. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  773. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  774. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  775. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  776. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  777. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  778. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  779. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  780. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  781. * @retval None
  782. */
  783. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  784. {
  785. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  786. }
  787. /**
  788. * @brief Return DMA2D foreground color mode.
  789. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  790. * @param DMA2Dx DMA2D Instance
  791. * @retval Returned value can be one of the following values:
  792. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  793. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  794. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  795. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  796. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  797. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  798. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  799. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  800. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  801. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  802. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  803. */
  804. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  805. {
  806. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  807. }
  808. /**
  809. * @brief Set DMA2D foreground alpha mode.
  810. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  811. * @param DMA2Dx DMA2D Instance
  812. * @param AphaMode This parameter can be one of the following values:
  813. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  814. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  815. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  816. * @retval None
  817. */
  818. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  819. {
  820. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  821. }
  822. /**
  823. * @brief Return DMA2D foreground alpha mode.
  824. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  825. * @param DMA2Dx DMA2D Instance
  826. * @retval Returned value can be one of the following values:
  827. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  828. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  829. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  830. */
  831. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  832. {
  833. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  834. }
  835. /**
  836. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  837. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  838. * @param DMA2Dx DMA2D Instance
  839. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  840. * @retval None
  841. */
  842. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  843. {
  844. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  845. }
  846. /**
  847. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  848. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  849. * @param DMA2Dx DMA2D Instance
  850. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  851. */
  852. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  853. {
  854. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  855. }
  856. /**
  857. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  858. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  859. * @param DMA2Dx DMA2D Instance
  860. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  861. * @retval None
  862. */
  863. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  864. {
  865. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  866. }
  867. /**
  868. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  869. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  870. * @param DMA2Dx DMA2D Instance
  871. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  872. */
  873. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  874. {
  875. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  876. }
  877. /**
  878. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  879. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  880. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  881. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  882. * @param DMA2Dx DMA2D Instance
  883. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  884. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  885. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  886. * @retval None
  887. */
  888. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  889. {
  890. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  891. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  892. }
  893. /**
  894. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  895. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  896. * @param DMA2Dx DMA2D Instance
  897. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  898. * @retval None
  899. */
  900. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  901. {
  902. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  903. }
  904. /**
  905. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  906. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  907. * @param DMA2Dx DMA2D Instance
  908. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  909. */
  910. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  911. {
  912. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  913. }
  914. /**
  915. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  916. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  917. * @param DMA2Dx DMA2D Instance
  918. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  919. * @retval None
  920. */
  921. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  922. {
  923. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  924. }
  925. /**
  926. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  927. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  928. * @param DMA2Dx DMA2D Instance
  929. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  930. */
  931. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  932. {
  933. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  934. }
  935. /**
  936. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  937. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  938. * @param DMA2Dx DMA2D Instance
  939. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  940. * @retval None
  941. */
  942. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  943. {
  944. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  945. }
  946. /**
  947. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  948. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  949. * @param DMA2Dx DMA2D Instance
  950. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  951. */
  952. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  953. {
  954. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  955. }
  956. /**
  957. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  958. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  959. * @param DMA2Dx DMA2D Instance
  960. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  961. * @retval None
  962. */
  963. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  964. {
  965. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  966. }
  967. /**
  968. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  969. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  970. * @param DMA2Dx DMA2D Instance
  971. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  972. */
  973. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  974. {
  975. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  976. }
  977. /**
  978. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  979. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  980. * @param DMA2Dx DMA2D Instance
  981. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  982. * @retval None
  983. */
  984. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  985. {
  986. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  987. }
  988. /**
  989. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  990. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  991. * @param DMA2Dx DMA2D Instance
  992. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  993. */
  994. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  995. {
  996. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  997. }
  998. /**
  999. * @brief Set DMA2D foreground CLUT color mode.
  1000. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  1001. * @param DMA2Dx DMA2D Instance
  1002. * @param CLUTColorMode This parameter can be one of the following values:
  1003. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1004. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1005. * @retval None
  1006. */
  1007. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1008. {
  1009. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  1010. }
  1011. /**
  1012. * @brief Return DMA2D foreground CLUT color mode.
  1013. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  1014. * @param DMA2Dx DMA2D Instance
  1015. * @retval Returned value can be one of the following values:
  1016. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1017. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1018. */
  1019. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1020. {
  1021. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  1022. }
  1023. /**
  1024. * @}
  1025. */
  1026. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  1027. * @{
  1028. */
  1029. /**
  1030. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1031. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  1032. * @param DMA2Dx DMA2D Instance
  1033. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1034. * @retval None
  1035. */
  1036. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  1037. {
  1038. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  1039. }
  1040. /**
  1041. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1042. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1043. * @param DMA2Dx DMA2D Instance
  1044. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1045. */
  1046. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1047. {
  1048. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1049. }
  1050. /**
  1051. * @brief Enable DMA2D background CLUT loading.
  1052. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1053. * @param DMA2Dx DMA2D Instance
  1054. * @retval None
  1055. */
  1056. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1057. {
  1058. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1059. }
  1060. /**
  1061. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1062. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1063. * @param DMA2Dx DMA2D Instance
  1064. * @retval State of bit (1 or 0).
  1065. */
  1066. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1067. {
  1068. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1069. }
  1070. /**
  1071. * @brief Set DMA2D background color mode.
  1072. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1073. * @param DMA2Dx DMA2D Instance
  1074. * @param ColorMode This parameter can be one of the following values:
  1075. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1076. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1077. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1078. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1079. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1080. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1081. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1082. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1083. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1084. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1085. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1086. * @retval None
  1087. */
  1088. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1089. {
  1090. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1091. }
  1092. /**
  1093. * @brief Return DMA2D background color mode.
  1094. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1095. * @param DMA2Dx DMA2D Instance
  1096. * @retval Returned value can be one of the following values:
  1097. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1098. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1099. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1100. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1101. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1102. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1103. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1104. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1105. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1106. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1107. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1108. */
  1109. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1110. {
  1111. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1112. }
  1113. /**
  1114. * @brief Set DMA2D background alpha mode.
  1115. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1116. * @param DMA2Dx DMA2D Instance
  1117. * @param AphaMode This parameter can be one of the following values:
  1118. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1119. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1120. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1121. * @retval None
  1122. */
  1123. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1124. {
  1125. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1126. }
  1127. /**
  1128. * @brief Return DMA2D background alpha mode.
  1129. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1130. * @param DMA2Dx DMA2D Instance
  1131. * @retval Returned value can be one of the following values:
  1132. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1133. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1134. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1135. */
  1136. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1137. {
  1138. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1139. }
  1140. /**
  1141. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1142. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1143. * @param DMA2Dx DMA2D Instance
  1144. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1145. * @retval None
  1146. */
  1147. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1148. {
  1149. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1150. }
  1151. /**
  1152. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1153. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1154. * @param DMA2Dx DMA2D Instance
  1155. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1156. */
  1157. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1158. {
  1159. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1160. }
  1161. /**
  1162. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1163. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1164. * @param DMA2Dx DMA2D Instance
  1165. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1166. * @retval None
  1167. */
  1168. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1169. {
  1170. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1171. }
  1172. /**
  1173. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1174. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1175. * @param DMA2Dx DMA2D Instance
  1176. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1177. */
  1178. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1179. {
  1180. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1181. }
  1182. /**
  1183. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1184. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1185. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1186. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1187. * @param DMA2Dx DMA2D Instance
  1188. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1189. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1190. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1191. * @retval None
  1192. */
  1193. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1194. {
  1195. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1196. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1197. }
  1198. /**
  1199. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1200. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1201. * @param DMA2Dx DMA2D Instance
  1202. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1203. * @retval None
  1204. */
  1205. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1206. {
  1207. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1208. }
  1209. /**
  1210. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1211. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1212. * @param DMA2Dx DMA2D Instance
  1213. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1214. */
  1215. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1216. {
  1217. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1218. }
  1219. /**
  1220. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1221. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1222. * @param DMA2Dx DMA2D Instance
  1223. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1224. * @retval None
  1225. */
  1226. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1227. {
  1228. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1229. }
  1230. /**
  1231. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1232. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1233. * @param DMA2Dx DMA2D Instance
  1234. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1235. */
  1236. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1237. {
  1238. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1239. }
  1240. /**
  1241. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1242. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1243. * @param DMA2Dx DMA2D Instance
  1244. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1245. * @retval None
  1246. */
  1247. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1248. {
  1249. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1250. }
  1251. /**
  1252. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1253. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1254. * @param DMA2Dx DMA2D Instance
  1255. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1256. */
  1257. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1258. {
  1259. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1260. }
  1261. /**
  1262. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1263. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1264. * @param DMA2Dx DMA2D Instance
  1265. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1266. * @retval None
  1267. */
  1268. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1269. {
  1270. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1271. }
  1272. /**
  1273. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1274. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1275. * @param DMA2Dx DMA2D Instance
  1276. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1277. */
  1278. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1279. {
  1280. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1281. }
  1282. /**
  1283. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1284. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1285. * @param DMA2Dx DMA2D Instance
  1286. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1287. * @retval None
  1288. */
  1289. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1290. {
  1291. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1292. }
  1293. /**
  1294. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1295. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1296. * @param DMA2Dx DMA2D Instance
  1297. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1298. */
  1299. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1300. {
  1301. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1302. }
  1303. /**
  1304. * @brief Set DMA2D background CLUT color mode.
  1305. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1306. * @param DMA2Dx DMA2D Instance
  1307. * @param CLUTColorMode This parameter can be one of the following values:
  1308. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1309. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1310. * @retval None
  1311. */
  1312. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1313. {
  1314. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1315. }
  1316. /**
  1317. * @brief Return DMA2D background CLUT color mode.
  1318. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1319. * @param DMA2Dx DMA2D Instance
  1320. * @retval Returned value can be one of the following values:
  1321. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1322. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1323. */
  1324. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1325. {
  1326. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1327. }
  1328. /**
  1329. * @}
  1330. */
  1331. /**
  1332. * @}
  1333. */
  1334. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1335. * @{
  1336. */
  1337. /**
  1338. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1339. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1340. * @param DMA2Dx DMA2D Instance
  1341. * @retval State of bit (1 or 0).
  1342. */
  1343. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1344. {
  1345. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1346. }
  1347. /**
  1348. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1349. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1350. * @param DMA2Dx DMA2D Instance
  1351. * @retval State of bit (1 or 0).
  1352. */
  1353. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1354. {
  1355. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1356. }
  1357. /**
  1358. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1359. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1360. * @param DMA2Dx DMA2D Instance
  1361. * @retval State of bit (1 or 0).
  1362. */
  1363. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1364. {
  1365. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1366. }
  1367. /**
  1368. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1369. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1370. * @param DMA2Dx DMA2D Instance
  1371. * @retval State of bit (1 or 0).
  1372. */
  1373. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1374. {
  1375. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1376. }
  1377. /**
  1378. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1379. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1380. * @param DMA2Dx DMA2D Instance
  1381. * @retval State of bit (1 or 0).
  1382. */
  1383. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1384. {
  1385. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1386. }
  1387. /**
  1388. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1389. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1390. * @param DMA2Dx DMA2D Instance
  1391. * @retval State of bit (1 or 0).
  1392. */
  1393. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1394. {
  1395. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1396. }
  1397. /**
  1398. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1399. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1400. * @param DMA2Dx DMA2D Instance
  1401. * @retval None
  1402. */
  1403. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1404. {
  1405. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1406. }
  1407. /**
  1408. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1409. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1410. * @param DMA2Dx DMA2D Instance
  1411. * @retval None
  1412. */
  1413. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1414. {
  1415. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1416. }
  1417. /**
  1418. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1419. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1420. * @param DMA2Dx DMA2D Instance
  1421. * @retval None
  1422. */
  1423. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1424. {
  1425. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1426. }
  1427. /**
  1428. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1429. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1430. * @param DMA2Dx DMA2D Instance
  1431. * @retval None
  1432. */
  1433. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1434. {
  1435. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1436. }
  1437. /**
  1438. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1439. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1440. * @param DMA2Dx DMA2D Instance
  1441. * @retval None
  1442. */
  1443. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1444. {
  1445. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1446. }
  1447. /**
  1448. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1449. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1450. * @param DMA2Dx DMA2D Instance
  1451. * @retval None
  1452. */
  1453. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1454. {
  1455. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1456. }
  1457. /**
  1458. * @}
  1459. */
  1460. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1461. * @{
  1462. */
  1463. /**
  1464. * @brief Enable Configuration Error Interrupt
  1465. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1466. * @param DMA2Dx DMA2D Instance
  1467. * @retval None
  1468. */
  1469. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1470. {
  1471. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1472. }
  1473. /**
  1474. * @brief Enable CLUT Transfer Complete Interrupt
  1475. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1476. * @param DMA2Dx DMA2D Instance
  1477. * @retval None
  1478. */
  1479. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1480. {
  1481. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1482. }
  1483. /**
  1484. * @brief Enable CLUT Access Error Interrupt
  1485. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1486. * @param DMA2Dx DMA2D Instance
  1487. * @retval None
  1488. */
  1489. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1490. {
  1491. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1492. }
  1493. /**
  1494. * @brief Enable Transfer Watermark Interrupt
  1495. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1496. * @param DMA2Dx DMA2D Instance
  1497. * @retval None
  1498. */
  1499. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1500. {
  1501. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1502. }
  1503. /**
  1504. * @brief Enable Transfer Complete Interrupt
  1505. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1506. * @param DMA2Dx DMA2D Instance
  1507. * @retval None
  1508. */
  1509. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1510. {
  1511. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1512. }
  1513. /**
  1514. * @brief Enable Transfer Error Interrupt
  1515. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1516. * @param DMA2Dx DMA2D Instance
  1517. * @retval None
  1518. */
  1519. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1520. {
  1521. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1522. }
  1523. /**
  1524. * @brief Disable Configuration Error Interrupt
  1525. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1526. * @param DMA2Dx DMA2D Instance
  1527. * @retval None
  1528. */
  1529. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1530. {
  1531. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1532. }
  1533. /**
  1534. * @brief Disable CLUT Transfer Complete Interrupt
  1535. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1536. * @param DMA2Dx DMA2D Instance
  1537. * @retval None
  1538. */
  1539. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1540. {
  1541. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1542. }
  1543. /**
  1544. * @brief Disable CLUT Access Error Interrupt
  1545. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1546. * @param DMA2Dx DMA2D Instance
  1547. * @retval None
  1548. */
  1549. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1550. {
  1551. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1552. }
  1553. /**
  1554. * @brief Disable Transfer Watermark Interrupt
  1555. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1556. * @param DMA2Dx DMA2D Instance
  1557. * @retval None
  1558. */
  1559. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1560. {
  1561. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1562. }
  1563. /**
  1564. * @brief Disable Transfer Complete Interrupt
  1565. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1566. * @param DMA2Dx DMA2D Instance
  1567. * @retval None
  1568. */
  1569. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1570. {
  1571. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1572. }
  1573. /**
  1574. * @brief Disable Transfer Error Interrupt
  1575. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1576. * @param DMA2Dx DMA2D Instance
  1577. * @retval None
  1578. */
  1579. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1580. {
  1581. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1582. }
  1583. /**
  1584. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1585. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1586. * @param DMA2Dx DMA2D Instance
  1587. * @retval State of bit (1 or 0).
  1588. */
  1589. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1590. {
  1591. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1592. }
  1593. /**
  1594. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1595. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1596. * @param DMA2Dx DMA2D Instance
  1597. * @retval State of bit (1 or 0).
  1598. */
  1599. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1600. {
  1601. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1602. }
  1603. /**
  1604. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1605. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1606. * @param DMA2Dx DMA2D Instance
  1607. * @retval State of bit (1 or 0).
  1608. */
  1609. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1610. {
  1611. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1612. }
  1613. /**
  1614. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1615. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1616. * @param DMA2Dx DMA2D Instance
  1617. * @retval State of bit (1 or 0).
  1618. */
  1619. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1620. {
  1621. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1622. }
  1623. /**
  1624. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1625. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1626. * @param DMA2Dx DMA2D Instance
  1627. * @retval State of bit (1 or 0).
  1628. */
  1629. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1630. {
  1631. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1632. }
  1633. /**
  1634. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1635. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1636. * @param DMA2Dx DMA2D Instance
  1637. * @retval State of bit (1 or 0).
  1638. */
  1639. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1640. {
  1641. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1642. }
  1643. /**
  1644. * @}
  1645. */
  1646. #if defined(USE_FULL_LL_DRIVER)
  1647. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1648. * @{
  1649. */
  1650. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1651. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1652. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1653. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1654. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1655. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1656. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1657. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1658. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1659. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1660. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1661. /**
  1662. * @}
  1663. */
  1664. #endif /* USE_FULL_LL_DRIVER */
  1665. /**
  1666. * @}
  1667. */
  1668. /**
  1669. * @}
  1670. */
  1671. #endif /* defined (DMA2D) */
  1672. /**
  1673. * @}
  1674. */
  1675. #ifdef __cplusplus
  1676. }
  1677. #endif
  1678. #endif /* STM32F4xx_LL_DMA2D_H */
  1679. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/