stm32f4xx_ll_dma2d.h 72 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847
  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32F4xx_LL_DMA2D_H
  21. #define STM32F4xx_LL_DMA2D_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32f4xx.h"
  27. /** @addtogroup STM32F4xx_LL_Driver
  28. * @{
  29. */
  30. #if defined (DMA2D)
  31. /** @defgroup DMA2D_LL DMA2D
  32. * @{
  33. */
  34. /* Private types -------------------------------------------------------------*/
  35. /* Private variables ---------------------------------------------------------*/
  36. /* Private constants ---------------------------------------------------------*/
  37. /* Private macros ------------------------------------------------------------*/
  38. #if defined(USE_FULL_LL_DRIVER)
  39. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  40. * @{
  41. */
  42. /**
  43. * @}
  44. */
  45. #endif /*USE_FULL_LL_DRIVER*/
  46. /* Exported types ------------------------------------------------------------*/
  47. #if defined(USE_FULL_LL_DRIVER)
  48. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  49. * @{
  50. */
  51. /**
  52. * @brief LL DMA2D Init Structure Definition
  53. */
  54. typedef struct
  55. {
  56. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  57. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  58. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  59. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  60. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  61. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  62. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  63. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  64. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  65. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  66. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  67. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  68. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  69. function @ref LL_DMA2D_ConfigOutputColor(). */
  70. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  71. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  72. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  73. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  74. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  75. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  76. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  77. function @ref LL_DMA2D_ConfigOutputColor(). */
  78. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  90. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  91. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  92. function @ref LL_DMA2D_ConfigOutputColor(). */
  93. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  94. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  95. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  96. uint32_t LineOffset; /*!< Specifies the output line offset value.
  97. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  98. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  99. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  100. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  101. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  102. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  103. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  104. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  105. } LL_DMA2D_InitTypeDef;
  106. /**
  107. * @brief LL DMA2D Layer Configuration Structure Definition
  108. */
  109. typedef struct
  110. {
  111. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  112. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  113. This parameter can be modified afterwards using unitary functions
  114. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  115. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  116. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  117. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  118. This parameter can be modified afterwards using unitary functions
  119. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  120. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  121. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  122. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  123. This parameter can be modified afterwards using unitary functions
  124. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  125. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  126. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  127. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  128. This parameter can be modified afterwards using unitary functions
  129. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  130. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  131. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  132. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  133. This parameter can be modified afterwards using unitary functions
  134. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  135. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  136. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  137. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  138. This parameter can be modified afterwards using unitary functions
  139. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  140. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  141. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  142. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  143. This parameter can be modified afterwards using unitary functions
  144. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  145. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  146. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  147. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  148. This parameter can be modified afterwards using unitary functions
  149. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  150. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  151. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  152. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  153. This parameter can be modified afterwards using unitary functions
  154. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  155. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  156. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  157. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  158. This parameter can be modified afterwards using unitary functions
  159. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  160. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  161. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  162. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  163. This parameter can be modified afterwards using unitary functions
  164. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  165. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  166. } LL_DMA2D_LayerCfgTypeDef;
  167. /**
  168. * @brief LL DMA2D Output Color Structure Definition
  169. */
  170. typedef struct
  171. {
  172. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  173. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  174. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  175. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  176. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  177. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  178. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  179. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  180. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  181. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  182. function @ref LL_DMA2D_ConfigOutputColor(). */
  183. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  184. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  185. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  186. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  187. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  188. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  189. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  190. function @ref LL_DMA2D_ConfigOutputColor(). */
  191. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  192. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  193. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  194. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  195. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  196. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  197. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  198. function @ref LL_DMA2D_ConfigOutputColor(). */
  199. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  200. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  201. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  202. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  203. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  204. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  205. function @ref LL_DMA2D_ConfigOutputColor(). */
  206. } LL_DMA2D_ColorTypeDef;
  207. /**
  208. * @}
  209. */
  210. #endif /* USE_FULL_LL_DRIVER */
  211. /* Exported constants --------------------------------------------------------*/
  212. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  213. * @{
  214. */
  215. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  216. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  217. * @{
  218. */
  219. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  220. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  221. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  222. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  223. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  224. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  225. /**
  226. * @}
  227. */
  228. /** @defgroup DMA2D_LL_EC_IT IT Defines
  229. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  230. * @{
  231. */
  232. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  233. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  234. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  235. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  236. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  237. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  238. /**
  239. * @}
  240. */
  241. /** @defgroup DMA2D_LL_EC_MODE Mode
  242. * @{
  243. */
  244. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  245. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  246. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  247. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  248. /**
  249. * @}
  250. */
  251. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  252. * @{
  253. */
  254. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  255. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  256. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  257. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  258. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  259. /**
  260. * @}
  261. */
  262. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  263. * @{
  264. */
  265. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  266. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  267. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  268. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  269. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  270. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  271. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  272. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  273. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  274. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  275. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  276. /**
  277. * @}
  278. */
  279. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  280. * @{
  281. */
  282. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  283. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  284. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  285. with original alpha channel value */
  286. /**
  287. * @}
  288. */
  289. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  290. * @{
  291. */
  292. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  293. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  294. /**
  295. * @}
  296. */
  297. /**
  298. * @}
  299. */
  300. /* Exported macro ------------------------------------------------------------*/
  301. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  302. * @{
  303. */
  304. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  305. * @{
  306. */
  307. /**
  308. * @brief Write a value in DMA2D register.
  309. * @param __INSTANCE__ DMA2D Instance
  310. * @param __REG__ Register to be written
  311. * @param __VALUE__ Value to be written in the register
  312. * @retval None
  313. */
  314. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
  315. /**
  316. * @brief Read a value in DMA2D register.
  317. * @param __INSTANCE__ DMA2D Instance
  318. * @param __REG__ Register to be read
  319. * @retval Register value
  320. */
  321. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
  322. /**
  323. * @}
  324. */
  325. /**
  326. * @}
  327. */
  328. /* Exported functions --------------------------------------------------------*/
  329. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  330. * @{
  331. */
  332. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  333. * @{
  334. */
  335. /**
  336. * @brief Start a DMA2D transfer.
  337. * @rmtoll CR START LL_DMA2D_Start
  338. * @param DMA2Dx DMA2D Instance
  339. * @retval None
  340. */
  341. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  342. {
  343. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  344. }
  345. /**
  346. * @brief Indicate if a DMA2D transfer is ongoing.
  347. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  348. * @param DMA2Dx DMA2D Instance
  349. * @retval State of bit (1 or 0).
  350. */
  351. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  352. {
  353. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
  354. }
  355. /**
  356. * @brief Suspend DMA2D transfer.
  357. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  358. * @rmtoll CR SUSP LL_DMA2D_Suspend
  359. * @param DMA2Dx DMA2D Instance
  360. * @retval None
  361. */
  362. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  363. {
  364. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  365. }
  366. /**
  367. * @brief Resume DMA2D transfer.
  368. * @note This API can be used to resume automatic foreground or background CLUT loading.
  369. * @rmtoll CR SUSP LL_DMA2D_Resume
  370. * @param DMA2Dx DMA2D Instance
  371. * @retval None
  372. */
  373. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  374. {
  375. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  376. }
  377. /**
  378. * @brief Indicate if DMA2D transfer is suspended.
  379. * @note This API can be used to indicate whether or not automatic foreground or
  380. * background CLUT loading is suspended.
  381. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  382. * @param DMA2Dx DMA2D Instance
  383. * @retval State of bit (1 or 0).
  384. */
  385. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  386. {
  387. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
  388. }
  389. /**
  390. * @brief Abort DMA2D transfer.
  391. * @note This API can be used to abort automatic foreground or background CLUT loading.
  392. * @rmtoll CR ABORT LL_DMA2D_Abort
  393. * @param DMA2Dx DMA2D Instance
  394. * @retval None
  395. */
  396. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  397. {
  398. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  399. }
  400. /**
  401. * @brief Indicate if DMA2D transfer is aborted.
  402. * @note This API can be used to indicate whether or not automatic foreground or
  403. * background CLUT loading is aborted.
  404. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  405. * @param DMA2Dx DMA2D Instance
  406. * @retval State of bit (1 or 0).
  407. */
  408. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  409. {
  410. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
  411. }
  412. /**
  413. * @brief Set DMA2D mode.
  414. * @rmtoll CR MODE LL_DMA2D_SetMode
  415. * @param DMA2Dx DMA2D Instance
  416. * @param Mode This parameter can be one of the following values:
  417. * @arg @ref LL_DMA2D_MODE_M2M
  418. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  419. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  420. * @arg @ref LL_DMA2D_MODE_R2M
  421. * @retval None
  422. */
  423. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  424. {
  425. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  426. }
  427. /**
  428. * @brief Return DMA2D mode
  429. * @rmtoll CR MODE LL_DMA2D_GetMode
  430. * @param DMA2Dx DMA2D Instance
  431. * @retval Returned value can be one of the following values:
  432. * @arg @ref LL_DMA2D_MODE_M2M
  433. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  434. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  435. * @arg @ref LL_DMA2D_MODE_R2M
  436. */
  437. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  438. {
  439. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  440. }
  441. /**
  442. * @brief Set DMA2D output color mode.
  443. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  444. * @param DMA2Dx DMA2D Instance
  445. * @param ColorMode This parameter can be one of the following values:
  446. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  447. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  448. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  449. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  450. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  451. * @retval None
  452. */
  453. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  454. {
  455. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  456. }
  457. /**
  458. * @brief Return DMA2D output color mode.
  459. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  460. * @param DMA2Dx DMA2D Instance
  461. * @retval Returned value can be one of the following values:
  462. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  463. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  464. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  465. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  466. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  467. */
  468. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  469. {
  470. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  471. }
  472. /**
  473. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  474. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  475. * @param DMA2Dx DMA2D Instance
  476. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  477. * @retval None
  478. */
  479. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  480. {
  481. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  482. }
  483. /**
  484. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  485. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  486. * @param DMA2Dx DMA2D Instance
  487. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  488. */
  489. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  490. {
  491. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  492. }
  493. /**
  494. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  495. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  496. * @param DMA2Dx DMA2D Instance
  497. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  498. * @retval None
  499. */
  500. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  501. {
  502. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  503. }
  504. /**
  505. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  506. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  507. * @param DMA2Dx DMA2D Instance
  508. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  509. */
  510. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  511. {
  512. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  513. }
  514. /**
  515. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  516. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  517. * @param DMA2Dx DMA2D Instance
  518. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  519. * @retval None
  520. */
  521. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  522. {
  523. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  524. }
  525. /**
  526. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  527. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  528. * @param DMA2Dx DMA2D Instance
  529. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  530. */
  531. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  532. {
  533. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  534. }
  535. /**
  536. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  537. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  538. * @param DMA2Dx DMA2D Instance
  539. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  540. * @retval None
  541. */
  542. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  543. {
  544. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  545. }
  546. /**
  547. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  548. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  549. * @param DMA2Dx DMA2D Instance
  550. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  551. */
  552. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  553. {
  554. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  555. }
  556. /**
  557. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  558. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  559. * RGB565, ARGB1555 or ARGB4444.
  560. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  561. * with respect to color mode is not done by the user code.
  562. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  563. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  564. * OCOLR RED LL_DMA2D_SetOutputColor\n
  565. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  566. * @param DMA2Dx DMA2D Instance
  567. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  568. * @retval None
  569. */
  570. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  571. {
  572. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  573. OutputColor);
  574. }
  575. /**
  576. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  577. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  578. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  579. * as set by @ref LL_DMA2D_SetOutputColorMode.
  580. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  581. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  582. * OCOLR RED LL_DMA2D_GetOutputColor\n
  583. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  584. * @param DMA2Dx DMA2D Instance
  585. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  586. */
  587. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  588. {
  589. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  590. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  591. }
  592. /**
  593. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  594. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  595. * @param DMA2Dx DMA2D Instance
  596. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  597. * @retval None
  598. */
  599. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  600. {
  601. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  602. }
  603. /**
  604. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  605. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  606. * @param DMA2Dx DMA2D Instance
  607. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  608. */
  609. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  610. {
  611. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  612. }
  613. /**
  614. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  615. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  616. * @param DMA2Dx DMA2D Instance
  617. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  618. * @retval None
  619. */
  620. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  621. {
  622. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  623. }
  624. /**
  625. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  626. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  627. * @param DMA2Dx DMA2D Instance
  628. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  629. */
  630. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  631. {
  632. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  633. }
  634. /**
  635. * @brief Enable DMA2D dead time functionality.
  636. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  637. * @param DMA2Dx DMA2D Instance
  638. * @retval None
  639. */
  640. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  641. {
  642. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  643. }
  644. /**
  645. * @brief Disable DMA2D dead time functionality.
  646. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  647. * @param DMA2Dx DMA2D Instance
  648. * @retval None
  649. */
  650. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  651. {
  652. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  653. }
  654. /**
  655. * @brief Indicate if DMA2D dead time functionality is enabled.
  656. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  657. * @param DMA2Dx DMA2D Instance
  658. * @retval State of bit (1 or 0).
  659. */
  660. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  661. {
  662. return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
  663. }
  664. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  665. * @{
  666. */
  667. /**
  668. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  669. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  670. * @param DMA2Dx DMA2D Instance
  671. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  672. * @retval None
  673. */
  674. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  675. {
  676. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  677. }
  678. /**
  679. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  680. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  681. * @param DMA2Dx DMA2D Instance
  682. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  683. */
  684. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  685. {
  686. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  687. }
  688. /**
  689. * @brief Enable DMA2D foreground CLUT loading.
  690. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  691. * @param DMA2Dx DMA2D Instance
  692. * @retval None
  693. */
  694. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  695. {
  696. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  697. }
  698. /**
  699. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  700. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  701. * @param DMA2Dx DMA2D Instance
  702. * @retval State of bit (1 or 0).
  703. */
  704. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  705. {
  706. return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
  707. }
  708. /**
  709. * @brief Set DMA2D foreground color mode.
  710. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  711. * @param DMA2Dx DMA2D Instance
  712. * @param ColorMode This parameter can be one of the following values:
  713. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  714. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  715. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  716. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  717. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  718. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  719. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  720. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  721. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  722. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  723. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  724. * @retval None
  725. */
  726. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  727. {
  728. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  729. }
  730. /**
  731. * @brief Return DMA2D foreground color mode.
  732. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  733. * @param DMA2Dx DMA2D Instance
  734. * @retval Returned value can be one of the following values:
  735. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  736. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  737. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  738. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  739. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  740. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  741. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  742. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  743. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  744. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  745. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  746. */
  747. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  748. {
  749. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  750. }
  751. /**
  752. * @brief Set DMA2D foreground alpha mode.
  753. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  754. * @param DMA2Dx DMA2D Instance
  755. * @param AphaMode This parameter can be one of the following values:
  756. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  757. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  758. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  759. * @retval None
  760. */
  761. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  762. {
  763. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  764. }
  765. /**
  766. * @brief Return DMA2D foreground alpha mode.
  767. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  768. * @param DMA2Dx DMA2D Instance
  769. * @retval Returned value can be one of the following values:
  770. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  771. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  772. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  773. */
  774. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  775. {
  776. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  777. }
  778. /**
  779. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  780. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  781. * @param DMA2Dx DMA2D Instance
  782. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  783. * @retval None
  784. */
  785. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  786. {
  787. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  788. }
  789. /**
  790. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  791. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  792. * @param DMA2Dx DMA2D Instance
  793. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  794. */
  795. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  796. {
  797. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  798. }
  799. /**
  800. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  801. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  802. * @param DMA2Dx DMA2D Instance
  803. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  804. * @retval None
  805. */
  806. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  807. {
  808. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  809. }
  810. /**
  811. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  812. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  813. * @param DMA2Dx DMA2D Instance
  814. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  815. */
  816. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  817. {
  818. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  819. }
  820. /**
  821. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  822. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  823. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  824. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  825. * @param DMA2Dx DMA2D Instance
  826. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  827. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  828. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  829. * @retval None
  830. */
  831. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  832. {
  833. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  834. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  835. }
  836. /**
  837. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  838. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  839. * @param DMA2Dx DMA2D Instance
  840. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  841. * @retval None
  842. */
  843. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  844. {
  845. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  846. }
  847. /**
  848. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  849. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  850. * @param DMA2Dx DMA2D Instance
  851. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  852. */
  853. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  854. {
  855. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  856. }
  857. /**
  858. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  859. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  860. * @param DMA2Dx DMA2D Instance
  861. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  862. * @retval None
  863. */
  864. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  865. {
  866. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  867. }
  868. /**
  869. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  870. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  871. * @param DMA2Dx DMA2D Instance
  872. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  873. */
  874. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  875. {
  876. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  877. }
  878. /**
  879. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  880. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  881. * @param DMA2Dx DMA2D Instance
  882. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  883. * @retval None
  884. */
  885. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  886. {
  887. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  888. }
  889. /**
  890. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  891. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  892. * @param DMA2Dx DMA2D Instance
  893. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  894. */
  895. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  896. {
  897. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  898. }
  899. /**
  900. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  901. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  902. * @param DMA2Dx DMA2D Instance
  903. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  904. * @retval None
  905. */
  906. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  907. {
  908. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  909. }
  910. /**
  911. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  912. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  913. * @param DMA2Dx DMA2D Instance
  914. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  915. */
  916. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  917. {
  918. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  919. }
  920. /**
  921. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  922. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  923. * @param DMA2Dx DMA2D Instance
  924. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  925. * @retval None
  926. */
  927. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  928. {
  929. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  930. }
  931. /**
  932. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  933. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  934. * @param DMA2Dx DMA2D Instance
  935. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  936. */
  937. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  938. {
  939. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  940. }
  941. /**
  942. * @brief Set DMA2D foreground CLUT color mode.
  943. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  944. * @param DMA2Dx DMA2D Instance
  945. * @param CLUTColorMode This parameter can be one of the following values:
  946. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  947. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  948. * @retval None
  949. */
  950. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  951. {
  952. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  953. }
  954. /**
  955. * @brief Return DMA2D foreground CLUT color mode.
  956. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  957. * @param DMA2Dx DMA2D Instance
  958. * @retval Returned value can be one of the following values:
  959. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  960. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  961. */
  962. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  963. {
  964. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  965. }
  966. /**
  967. * @}
  968. */
  969. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  970. * @{
  971. */
  972. /**
  973. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  974. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  975. * @param DMA2Dx DMA2D Instance
  976. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  977. * @retval None
  978. */
  979. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  980. {
  981. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  982. }
  983. /**
  984. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  985. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  986. * @param DMA2Dx DMA2D Instance
  987. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  988. */
  989. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  990. {
  991. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  992. }
  993. /**
  994. * @brief Enable DMA2D background CLUT loading.
  995. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  996. * @param DMA2Dx DMA2D Instance
  997. * @retval None
  998. */
  999. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1000. {
  1001. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1002. }
  1003. /**
  1004. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1005. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1006. * @param DMA2Dx DMA2D Instance
  1007. * @retval State of bit (1 or 0).
  1008. */
  1009. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1010. {
  1011. return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
  1012. }
  1013. /**
  1014. * @brief Set DMA2D background color mode.
  1015. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1016. * @param DMA2Dx DMA2D Instance
  1017. * @param ColorMode This parameter can be one of the following values:
  1018. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1019. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1020. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1021. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1022. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1023. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1024. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1025. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1026. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1027. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1028. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1029. * @retval None
  1030. */
  1031. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1032. {
  1033. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1034. }
  1035. /**
  1036. * @brief Return DMA2D background color mode.
  1037. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1038. * @param DMA2Dx DMA2D Instance
  1039. * @retval Returned value can be one of the following values:
  1040. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1041. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1042. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1043. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1044. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1045. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1046. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1047. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1048. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1049. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1050. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1051. */
  1052. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1053. {
  1054. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1055. }
  1056. /**
  1057. * @brief Set DMA2D background alpha mode.
  1058. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1059. * @param DMA2Dx DMA2D Instance
  1060. * @param AphaMode This parameter can be one of the following values:
  1061. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1062. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1063. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1064. * @retval None
  1065. */
  1066. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1067. {
  1068. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1069. }
  1070. /**
  1071. * @brief Return DMA2D background alpha mode.
  1072. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1073. * @param DMA2Dx DMA2D Instance
  1074. * @retval Returned value can be one of the following values:
  1075. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1076. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1077. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1078. */
  1079. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1080. {
  1081. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1082. }
  1083. /**
  1084. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1085. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1086. * @param DMA2Dx DMA2D Instance
  1087. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1088. * @retval None
  1089. */
  1090. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1091. {
  1092. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1093. }
  1094. /**
  1095. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1096. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1097. * @param DMA2Dx DMA2D Instance
  1098. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1099. */
  1100. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1101. {
  1102. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1103. }
  1104. /**
  1105. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1106. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1107. * @param DMA2Dx DMA2D Instance
  1108. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1109. * @retval None
  1110. */
  1111. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1112. {
  1113. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1114. }
  1115. /**
  1116. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1117. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1118. * @param DMA2Dx DMA2D Instance
  1119. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1120. */
  1121. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1122. {
  1123. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1124. }
  1125. /**
  1126. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1127. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1128. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1129. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1130. * @param DMA2Dx DMA2D Instance
  1131. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1132. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1133. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1134. * @retval None
  1135. */
  1136. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1137. {
  1138. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1139. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1140. }
  1141. /**
  1142. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1143. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1144. * @param DMA2Dx DMA2D Instance
  1145. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1146. * @retval None
  1147. */
  1148. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1149. {
  1150. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1151. }
  1152. /**
  1153. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1154. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1155. * @param DMA2Dx DMA2D Instance
  1156. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1157. */
  1158. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1159. {
  1160. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1161. }
  1162. /**
  1163. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1164. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1165. * @param DMA2Dx DMA2D Instance
  1166. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1167. * @retval None
  1168. */
  1169. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1170. {
  1171. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1172. }
  1173. /**
  1174. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1175. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1176. * @param DMA2Dx DMA2D Instance
  1177. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1178. */
  1179. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1180. {
  1181. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1182. }
  1183. /**
  1184. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1185. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1186. * @param DMA2Dx DMA2D Instance
  1187. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1188. * @retval None
  1189. */
  1190. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1191. {
  1192. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1193. }
  1194. /**
  1195. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1196. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1197. * @param DMA2Dx DMA2D Instance
  1198. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1199. */
  1200. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1201. {
  1202. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1203. }
  1204. /**
  1205. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1206. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1207. * @param DMA2Dx DMA2D Instance
  1208. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1209. * @retval None
  1210. */
  1211. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1212. {
  1213. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1214. }
  1215. /**
  1216. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1217. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1218. * @param DMA2Dx DMA2D Instance
  1219. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1220. */
  1221. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1222. {
  1223. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1224. }
  1225. /**
  1226. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1227. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1228. * @param DMA2Dx DMA2D Instance
  1229. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1230. * @retval None
  1231. */
  1232. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1233. {
  1234. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1235. }
  1236. /**
  1237. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1238. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1239. * @param DMA2Dx DMA2D Instance
  1240. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1241. */
  1242. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1243. {
  1244. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1245. }
  1246. /**
  1247. * @brief Set DMA2D background CLUT color mode.
  1248. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1249. * @param DMA2Dx DMA2D Instance
  1250. * @param CLUTColorMode This parameter can be one of the following values:
  1251. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1252. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1253. * @retval None
  1254. */
  1255. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1256. {
  1257. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1258. }
  1259. /**
  1260. * @brief Return DMA2D background CLUT color mode.
  1261. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1262. * @param DMA2Dx DMA2D Instance
  1263. * @retval Returned value can be one of the following values:
  1264. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1265. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1266. */
  1267. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1268. {
  1269. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1270. }
  1271. /**
  1272. * @}
  1273. */
  1274. /**
  1275. * @}
  1276. */
  1277. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1278. * @{
  1279. */
  1280. /**
  1281. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1282. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1283. * @param DMA2Dx DMA2D Instance
  1284. * @retval State of bit (1 or 0).
  1285. */
  1286. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1287. {
  1288. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
  1289. }
  1290. /**
  1291. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1292. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1293. * @param DMA2Dx DMA2D Instance
  1294. * @retval State of bit (1 or 0).
  1295. */
  1296. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1297. {
  1298. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
  1299. }
  1300. /**
  1301. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1302. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1303. * @param DMA2Dx DMA2D Instance
  1304. * @retval State of bit (1 or 0).
  1305. */
  1306. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1307. {
  1308. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
  1309. }
  1310. /**
  1311. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1312. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1313. * @param DMA2Dx DMA2D Instance
  1314. * @retval State of bit (1 or 0).
  1315. */
  1316. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1317. {
  1318. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
  1319. }
  1320. /**
  1321. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1322. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1323. * @param DMA2Dx DMA2D Instance
  1324. * @retval State of bit (1 or 0).
  1325. */
  1326. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1327. {
  1328. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
  1329. }
  1330. /**
  1331. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1332. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1333. * @param DMA2Dx DMA2D Instance
  1334. * @retval State of bit (1 or 0).
  1335. */
  1336. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1337. {
  1338. return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
  1339. }
  1340. /**
  1341. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1342. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1343. * @param DMA2Dx DMA2D Instance
  1344. * @retval None
  1345. */
  1346. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1347. {
  1348. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1349. }
  1350. /**
  1351. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1352. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1353. * @param DMA2Dx DMA2D Instance
  1354. * @retval None
  1355. */
  1356. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1357. {
  1358. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1359. }
  1360. /**
  1361. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1362. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1363. * @param DMA2Dx DMA2D Instance
  1364. * @retval None
  1365. */
  1366. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1367. {
  1368. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1369. }
  1370. /**
  1371. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1372. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1373. * @param DMA2Dx DMA2D Instance
  1374. * @retval None
  1375. */
  1376. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1377. {
  1378. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1379. }
  1380. /**
  1381. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1382. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1383. * @param DMA2Dx DMA2D Instance
  1384. * @retval None
  1385. */
  1386. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1387. {
  1388. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1389. }
  1390. /**
  1391. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1392. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1393. * @param DMA2Dx DMA2D Instance
  1394. * @retval None
  1395. */
  1396. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1397. {
  1398. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1399. }
  1400. /**
  1401. * @}
  1402. */
  1403. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1404. * @{
  1405. */
  1406. /**
  1407. * @brief Enable Configuration Error Interrupt
  1408. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1409. * @param DMA2Dx DMA2D Instance
  1410. * @retval None
  1411. */
  1412. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1413. {
  1414. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1415. }
  1416. /**
  1417. * @brief Enable CLUT Transfer Complete Interrupt
  1418. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1419. * @param DMA2Dx DMA2D Instance
  1420. * @retval None
  1421. */
  1422. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1423. {
  1424. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1425. }
  1426. /**
  1427. * @brief Enable CLUT Access Error Interrupt
  1428. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1429. * @param DMA2Dx DMA2D Instance
  1430. * @retval None
  1431. */
  1432. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1433. {
  1434. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1435. }
  1436. /**
  1437. * @brief Enable Transfer Watermark Interrupt
  1438. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1439. * @param DMA2Dx DMA2D Instance
  1440. * @retval None
  1441. */
  1442. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1443. {
  1444. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1445. }
  1446. /**
  1447. * @brief Enable Transfer Complete Interrupt
  1448. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1449. * @param DMA2Dx DMA2D Instance
  1450. * @retval None
  1451. */
  1452. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1453. {
  1454. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1455. }
  1456. /**
  1457. * @brief Enable Transfer Error Interrupt
  1458. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1459. * @param DMA2Dx DMA2D Instance
  1460. * @retval None
  1461. */
  1462. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1463. {
  1464. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1465. }
  1466. /**
  1467. * @brief Disable Configuration Error Interrupt
  1468. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1469. * @param DMA2Dx DMA2D Instance
  1470. * @retval None
  1471. */
  1472. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1473. {
  1474. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1475. }
  1476. /**
  1477. * @brief Disable CLUT Transfer Complete Interrupt
  1478. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1479. * @param DMA2Dx DMA2D Instance
  1480. * @retval None
  1481. */
  1482. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1483. {
  1484. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1485. }
  1486. /**
  1487. * @brief Disable CLUT Access Error Interrupt
  1488. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1489. * @param DMA2Dx DMA2D Instance
  1490. * @retval None
  1491. */
  1492. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1493. {
  1494. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1495. }
  1496. /**
  1497. * @brief Disable Transfer Watermark Interrupt
  1498. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1499. * @param DMA2Dx DMA2D Instance
  1500. * @retval None
  1501. */
  1502. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1503. {
  1504. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1505. }
  1506. /**
  1507. * @brief Disable Transfer Complete Interrupt
  1508. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1509. * @param DMA2Dx DMA2D Instance
  1510. * @retval None
  1511. */
  1512. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1513. {
  1514. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1515. }
  1516. /**
  1517. * @brief Disable Transfer Error Interrupt
  1518. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1519. * @param DMA2Dx DMA2D Instance
  1520. * @retval None
  1521. */
  1522. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1523. {
  1524. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1525. }
  1526. /**
  1527. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1528. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1529. * @param DMA2Dx DMA2D Instance
  1530. * @retval State of bit (1 or 0).
  1531. */
  1532. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1533. {
  1534. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
  1535. }
  1536. /**
  1537. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1538. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1539. * @param DMA2Dx DMA2D Instance
  1540. * @retval State of bit (1 or 0).
  1541. */
  1542. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1543. {
  1544. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
  1545. }
  1546. /**
  1547. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1548. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1549. * @param DMA2Dx DMA2D Instance
  1550. * @retval State of bit (1 or 0).
  1551. */
  1552. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1553. {
  1554. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
  1555. }
  1556. /**
  1557. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1558. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1559. * @param DMA2Dx DMA2D Instance
  1560. * @retval State of bit (1 or 0).
  1561. */
  1562. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1563. {
  1564. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
  1565. }
  1566. /**
  1567. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1568. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1569. * @param DMA2Dx DMA2D Instance
  1570. * @retval State of bit (1 or 0).
  1571. */
  1572. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1573. {
  1574. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
  1575. }
  1576. /**
  1577. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1578. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1579. * @param DMA2Dx DMA2D Instance
  1580. * @retval State of bit (1 or 0).
  1581. */
  1582. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1583. {
  1584. return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
  1585. }
  1586. /**
  1587. * @}
  1588. */
  1589. #if defined(USE_FULL_LL_DRIVER)
  1590. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1591. * @{
  1592. */
  1593. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1594. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1595. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1596. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1597. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1598. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1599. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1600. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1601. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1602. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1603. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1604. /**
  1605. * @}
  1606. */
  1607. #endif /* USE_FULL_LL_DRIVER */
  1608. /**
  1609. * @}
  1610. */
  1611. /**
  1612. * @}
  1613. */
  1614. #endif /* defined (DMA2D) */
  1615. /**
  1616. * @}
  1617. */
  1618. #ifdef __cplusplus
  1619. }
  1620. #endif
  1621. #endif /* STM32F4xx_LL_DMA2D_H */
  1622. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/