mach64_drm.h 7.7 KB

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  1. /* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
  2. * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com
  3. */
  4. /*
  5. * Copyright 2000 Gareth Hughes
  6. * Copyright 2002 Frank C. Earl
  7. * Copyright 2002-2003 Leif Delgass
  8. * All Rights Reserved.
  9. *
  10. * Permission is hereby granted, free of charge, to any person obtaining a
  11. * copy of this software and associated documentation files (the "Software"),
  12. * to deal in the Software without restriction, including without limitation
  13. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  14. * and/or sell copies of the Software, and to permit persons to whom the
  15. * Software is furnished to do so, subject to the following conditions:
  16. *
  17. * The above copyright notice and this permission notice (including the next
  18. * paragraph) shall be included in all copies or substantial portions of the
  19. * Software.
  20. *
  21. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  24. * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  25. * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  26. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27. *
  28. * Authors:
  29. * Gareth Hughes <gareth@valinux.com>
  30. * Frank C. Earl <fearl@airmail.net>
  31. * Leif Delgass <ldelgass@retinalburn.net>
  32. */
  33. #ifndef __MACH64_DRM_H__
  34. #define __MACH64_DRM_H__
  35. /* WARNING: If you change any of these defines, make sure to change the
  36. * defines in the Xserver file (mach64_sarea.h)
  37. */
  38. #ifndef __MACH64_SAREA_DEFINES__
  39. #define __MACH64_SAREA_DEFINES__
  40. /* What needs to be changed for the current vertex buffer?
  41. * GH: We're going to be pedantic about this. We want the card to do as
  42. * little as possible, so let's avoid having it fetch a whole bunch of
  43. * register values that don't change all that often, if at all.
  44. */
  45. #define MACH64_UPLOAD_DST_OFF_PITCH 0x0001
  46. #define MACH64_UPLOAD_Z_OFF_PITCH 0x0002
  47. #define MACH64_UPLOAD_Z_ALPHA_CNTL 0x0004
  48. #define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008
  49. #define MACH64_UPLOAD_DP_FOG_CLR 0x0010
  50. #define MACH64_UPLOAD_DP_WRITE_MASK 0x0020
  51. #define MACH64_UPLOAD_DP_PIX_WIDTH 0x0040
  52. #define MACH64_UPLOAD_SETUP_CNTL 0x0080
  53. #define MACH64_UPLOAD_MISC 0x0100
  54. #define MACH64_UPLOAD_TEXTURE 0x0200
  55. #define MACH64_UPLOAD_TEX0IMAGE 0x0400
  56. #define MACH64_UPLOAD_TEX1IMAGE 0x0800
  57. #define MACH64_UPLOAD_CLIPRECTS 0x1000 /* handled client-side */
  58. #define MACH64_UPLOAD_CONTEXT 0x00ff
  59. #define MACH64_UPLOAD_ALL 0x1fff
  60. /* DMA buffer size
  61. */
  62. #define MACH64_BUFFER_SIZE 16384
  63. /* Max number of swaps allowed on the ring
  64. * before the client must wait
  65. */
  66. #define MACH64_MAX_QUEUED_FRAMES 3U
  67. /* Byte offsets for host blit buffer data
  68. */
  69. #define MACH64_HOSTDATA_BLIT_OFFSET 104
  70. /* Keep these small for testing.
  71. */
  72. #define MACH64_NR_SAREA_CLIPRECTS 8
  73. #define MACH64_CARD_HEAP 0
  74. #define MACH64_AGP_HEAP 1
  75. #define MACH64_NR_TEX_HEAPS 2
  76. #define MACH64_NR_TEX_REGIONS 64
  77. #define MACH64_LOG_TEX_GRANULARITY 16
  78. #define MACH64_TEX_MAXLEVELS 1
  79. #define MACH64_NR_CONTEXT_REGS 15
  80. #define MACH64_NR_TEXTURE_REGS 4
  81. #endif /* __MACH64_SAREA_DEFINES__ */
  82. typedef struct {
  83. unsigned int dst_off_pitch;
  84. unsigned int z_off_pitch;
  85. unsigned int z_cntl;
  86. unsigned int alpha_tst_cntl;
  87. unsigned int scale_3d_cntl;
  88. unsigned int sc_left_right;
  89. unsigned int sc_top_bottom;
  90. unsigned int dp_fog_clr;
  91. unsigned int dp_write_mask;
  92. unsigned int dp_pix_width;
  93. unsigned int dp_mix;
  94. unsigned int dp_src;
  95. unsigned int clr_cmp_cntl;
  96. unsigned int gui_traj_cntl;
  97. unsigned int setup_cntl;
  98. unsigned int tex_size_pitch;
  99. unsigned int tex_cntl;
  100. unsigned int secondary_tex_off;
  101. unsigned int tex_offset;
  102. } drm_mach64_context_regs_t;
  103. typedef struct drm_mach64_sarea {
  104. /* The channel for communication of state information to the kernel
  105. * on firing a vertex dma buffer.
  106. */
  107. drm_mach64_context_regs_t context_state;
  108. unsigned int dirty;
  109. unsigned int vertsize;
  110. /* The current cliprects, or a subset thereof.
  111. */
  112. struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS];
  113. unsigned int nbox;
  114. /* Counters for client-side throttling of rendering clients.
  115. */
  116. unsigned int frames_queued;
  117. /* Texture memory LRU.
  118. */
  119. struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
  120. 1];
  121. unsigned int tex_age[MACH64_NR_TEX_HEAPS];
  122. int ctx_owner;
  123. } drm_mach64_sarea_t;
  124. /* WARNING: If you change any of these defines, make sure to change the
  125. * defines in the Xserver file (mach64_common.h)
  126. */
  127. /* Mach64 specific ioctls
  128. * The device specific ioctl range is 0x40 to 0x79.
  129. */
  130. #define DRM_MACH64_INIT 0x00
  131. #define DRM_MACH64_IDLE 0x01
  132. #define DRM_MACH64_RESET 0x02
  133. #define DRM_MACH64_SWAP 0x03
  134. #define DRM_MACH64_CLEAR 0x04
  135. #define DRM_MACH64_VERTEX 0x05
  136. #define DRM_MACH64_BLIT 0x06
  137. #define DRM_MACH64_FLUSH 0x07
  138. #define DRM_MACH64_GETPARAM 0x08
  139. #define DRM_IOCTL_MACH64_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
  140. #define DRM_IOCTL_MACH64_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_IDLE )
  141. #define DRM_IOCTL_MACH64_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_RESET )
  142. #define DRM_IOCTL_MACH64_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_SWAP )
  143. #define DRM_IOCTL_MACH64_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
  144. #define DRM_IOCTL_MACH64_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
  145. #define DRM_IOCTL_MACH64_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
  146. #define DRM_IOCTL_MACH64_FLUSH DRM_IO( DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
  147. #define DRM_IOCTL_MACH64_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
  148. /* Buffer flags for clears
  149. */
  150. #define MACH64_FRONT 0x1
  151. #define MACH64_BACK 0x2
  152. #define MACH64_DEPTH 0x4
  153. /* Primitive types for vertex buffers
  154. */
  155. #define MACH64_PRIM_POINTS 0x00000000
  156. #define MACH64_PRIM_LINES 0x00000001
  157. #define MACH64_PRIM_LINE_LOOP 0x00000002
  158. #define MACH64_PRIM_LINE_STRIP 0x00000003
  159. #define MACH64_PRIM_TRIANGLES 0x00000004
  160. #define MACH64_PRIM_TRIANGLE_STRIP 0x00000005
  161. #define MACH64_PRIM_TRIANGLE_FAN 0x00000006
  162. #define MACH64_PRIM_QUADS 0x00000007
  163. #define MACH64_PRIM_QUAD_STRIP 0x00000008
  164. #define MACH64_PRIM_POLYGON 0x00000009
  165. typedef enum _drm_mach64_dma_mode_t {
  166. MACH64_MODE_DMA_ASYNC,
  167. MACH64_MODE_DMA_SYNC,
  168. MACH64_MODE_MMIO
  169. } drm_mach64_dma_mode_t;
  170. typedef struct drm_mach64_init {
  171. enum {
  172. DRM_MACH64_INIT_DMA = 0x01,
  173. DRM_MACH64_CLEANUP_DMA = 0x02
  174. } func;
  175. unsigned long sarea_priv_offset;
  176. int is_pci;
  177. drm_mach64_dma_mode_t dma_mode;
  178. unsigned int fb_bpp;
  179. unsigned int front_offset, front_pitch;
  180. unsigned int back_offset, back_pitch;
  181. unsigned int depth_bpp;
  182. unsigned int depth_offset, depth_pitch;
  183. unsigned long fb_offset;
  184. unsigned long mmio_offset;
  185. unsigned long ring_offset;
  186. unsigned long buffers_offset;
  187. unsigned long agp_textures_offset;
  188. } drm_mach64_init_t;
  189. typedef struct drm_mach64_clear {
  190. unsigned int flags;
  191. int x, y, w, h;
  192. unsigned int clear_color;
  193. unsigned int clear_depth;
  194. } drm_mach64_clear_t;
  195. typedef struct drm_mach64_vertex {
  196. int prim;
  197. void *buf; /* Address of vertex buffer */
  198. unsigned long used; /* Number of bytes in buffer */
  199. int discard; /* Client finished with buffer? */
  200. } drm_mach64_vertex_t;
  201. typedef struct drm_mach64_blit {
  202. void *buf;
  203. int pitch;
  204. int offset;
  205. int format;
  206. unsigned short x, y;
  207. unsigned short width, height;
  208. } drm_mach64_blit_t;
  209. typedef struct drm_mach64_getparam {
  210. enum {
  211. MACH64_PARAM_FRAMES_QUEUED = 0x01,
  212. MACH64_PARAM_IRQ_NR = 0x02
  213. } param;
  214. void *value;
  215. } drm_mach64_getparam_t;
  216. #endif