drm_mode.h 17 KB

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  1. /*
  2. * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  3. * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
  4. * Copyright (c) 2008 Red Hat Inc.
  5. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  6. * Copyright (c) 2007-2008 Intel Corporation
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24. * IN THE SOFTWARE.
  25. */
  26. #ifndef _DRM_MODE_H
  27. #define _DRM_MODE_H
  28. #include "drm.h"
  29. #define DRM_DISPLAY_INFO_LEN 32
  30. #define DRM_CONNECTOR_NAME_LEN 32
  31. #define DRM_DISPLAY_MODE_LEN 32
  32. #define DRM_PROP_NAME_LEN 32
  33. #define DRM_MODE_TYPE_BUILTIN (1<<0)
  34. #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  35. #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  36. #define DRM_MODE_TYPE_PREFERRED (1<<3)
  37. #define DRM_MODE_TYPE_DEFAULT (1<<4)
  38. #define DRM_MODE_TYPE_USERDEF (1<<5)
  39. #define DRM_MODE_TYPE_DRIVER (1<<6)
  40. /* Video mode flags */
  41. /* bit compatible with the xorg definitions. */
  42. #define DRM_MODE_FLAG_PHSYNC (1<<0)
  43. #define DRM_MODE_FLAG_NHSYNC (1<<1)
  44. #define DRM_MODE_FLAG_PVSYNC (1<<2)
  45. #define DRM_MODE_FLAG_NVSYNC (1<<3)
  46. #define DRM_MODE_FLAG_INTERLACE (1<<4)
  47. #define DRM_MODE_FLAG_DBLSCAN (1<<5)
  48. #define DRM_MODE_FLAG_CSYNC (1<<6)
  49. #define DRM_MODE_FLAG_PCSYNC (1<<7)
  50. #define DRM_MODE_FLAG_NCSYNC (1<<8)
  51. #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
  52. #define DRM_MODE_FLAG_BCAST (1<<10)
  53. #define DRM_MODE_FLAG_PIXMUX (1<<11)
  54. #define DRM_MODE_FLAG_DBLCLK (1<<12)
  55. #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
  56. /*
  57. * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  58. * (define not exposed to user space).
  59. */
  60. #define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
  61. #define DRM_MODE_FLAG_3D_NONE (0<<14)
  62. #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
  63. #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
  64. #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
  65. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
  66. #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
  67. #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
  68. #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
  69. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
  70. /* DPMS flags */
  71. /* bit compatible with the xorg definitions. */
  72. #define DRM_MODE_DPMS_ON 0
  73. #define DRM_MODE_DPMS_STANDBY 1
  74. #define DRM_MODE_DPMS_SUSPEND 2
  75. #define DRM_MODE_DPMS_OFF 3
  76. /* Scaling mode options */
  77. #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
  78. software can still scale) */
  79. #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
  80. #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
  81. #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
  82. /* Picture aspect ratio options */
  83. #define DRM_MODE_PICTURE_ASPECT_NONE 0
  84. #define DRM_MODE_PICTURE_ASPECT_4_3 1
  85. #define DRM_MODE_PICTURE_ASPECT_16_9 2
  86. /* Dithering mode options */
  87. #define DRM_MODE_DITHERING_OFF 0
  88. #define DRM_MODE_DITHERING_ON 1
  89. #define DRM_MODE_DITHERING_AUTO 2
  90. /* Dirty info options */
  91. #define DRM_MODE_DIRTY_OFF 0
  92. #define DRM_MODE_DIRTY_ON 1
  93. #define DRM_MODE_DIRTY_ANNOTATE 2
  94. struct drm_mode_modeinfo {
  95. __u32 clock;
  96. __u16 hdisplay;
  97. __u16 hsync_start;
  98. __u16 hsync_end;
  99. __u16 htotal;
  100. __u16 hskew;
  101. __u16 vdisplay;
  102. __u16 vsync_start;
  103. __u16 vsync_end;
  104. __u16 vtotal;
  105. __u16 vscan;
  106. __u32 vrefresh;
  107. __u32 flags;
  108. __u32 type;
  109. char name[DRM_DISPLAY_MODE_LEN];
  110. };
  111. struct drm_mode_card_res {
  112. __u64 fb_id_ptr;
  113. __u64 crtc_id_ptr;
  114. __u64 connector_id_ptr;
  115. __u64 encoder_id_ptr;
  116. __u32 count_fbs;
  117. __u32 count_crtcs;
  118. __u32 count_connectors;
  119. __u32 count_encoders;
  120. __u32 min_width;
  121. __u32 max_width;
  122. __u32 min_height;
  123. __u32 max_height;
  124. };
  125. struct drm_mode_crtc {
  126. __u64 set_connectors_ptr;
  127. __u32 count_connectors;
  128. __u32 crtc_id; /**< Id */
  129. __u32 fb_id; /**< Id of framebuffer */
  130. __u32 x; /**< x Position on the framebuffer */
  131. __u32 y; /**< y Position on the framebuffer */
  132. __u32 gamma_size;
  133. __u32 mode_valid;
  134. struct drm_mode_modeinfo mode;
  135. };
  136. #define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
  137. #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
  138. /* Planes blend with or override other bits on the CRTC */
  139. struct drm_mode_set_plane {
  140. __u32 plane_id;
  141. __u32 crtc_id;
  142. __u32 fb_id; /* fb object contains surface format type */
  143. __u32 flags; /* see above flags */
  144. /* Signed dest location allows it to be partially off screen */
  145. __s32 crtc_x;
  146. __s32 crtc_y;
  147. __u32 crtc_w;
  148. __u32 crtc_h;
  149. /* Source values are 16.16 fixed point */
  150. __u32 src_x;
  151. __u32 src_y;
  152. __u32 src_h;
  153. __u32 src_w;
  154. };
  155. struct drm_mode_get_plane {
  156. __u32 plane_id;
  157. __u32 crtc_id;
  158. __u32 fb_id;
  159. __u32 possible_crtcs;
  160. __u32 gamma_size;
  161. __u32 count_format_types;
  162. __u64 format_type_ptr;
  163. };
  164. struct drm_mode_get_plane_res {
  165. __u64 plane_id_ptr;
  166. __u32 count_planes;
  167. };
  168. #define DRM_MODE_ENCODER_NONE 0
  169. #define DRM_MODE_ENCODER_DAC 1
  170. #define DRM_MODE_ENCODER_TMDS 2
  171. #define DRM_MODE_ENCODER_LVDS 3
  172. #define DRM_MODE_ENCODER_TVDAC 4
  173. #define DRM_MODE_ENCODER_VIRTUAL 5
  174. #define DRM_MODE_ENCODER_DSI 6
  175. #define DRM_MODE_ENCODER_DPMST 7
  176. struct drm_mode_get_encoder {
  177. __u32 encoder_id;
  178. __u32 encoder_type;
  179. __u32 crtc_id; /**< Id of crtc */
  180. __u32 possible_crtcs;
  181. __u32 possible_clones;
  182. };
  183. /* This is for connectors with multiple signal types. */
  184. /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
  185. #define DRM_MODE_SUBCONNECTOR_Automatic 0
  186. #define DRM_MODE_SUBCONNECTOR_Unknown 0
  187. #define DRM_MODE_SUBCONNECTOR_DVID 3
  188. #define DRM_MODE_SUBCONNECTOR_DVIA 4
  189. #define DRM_MODE_SUBCONNECTOR_Composite 5
  190. #define DRM_MODE_SUBCONNECTOR_SVIDEO 6
  191. #define DRM_MODE_SUBCONNECTOR_Component 8
  192. #define DRM_MODE_SUBCONNECTOR_SCART 9
  193. #define DRM_MODE_CONNECTOR_Unknown 0
  194. #define DRM_MODE_CONNECTOR_VGA 1
  195. #define DRM_MODE_CONNECTOR_DVII 2
  196. #define DRM_MODE_CONNECTOR_DVID 3
  197. #define DRM_MODE_CONNECTOR_DVIA 4
  198. #define DRM_MODE_CONNECTOR_Composite 5
  199. #define DRM_MODE_CONNECTOR_SVIDEO 6
  200. #define DRM_MODE_CONNECTOR_LVDS 7
  201. #define DRM_MODE_CONNECTOR_Component 8
  202. #define DRM_MODE_CONNECTOR_9PinDIN 9
  203. #define DRM_MODE_CONNECTOR_DisplayPort 10
  204. #define DRM_MODE_CONNECTOR_HDMIA 11
  205. #define DRM_MODE_CONNECTOR_HDMIB 12
  206. #define DRM_MODE_CONNECTOR_TV 13
  207. #define DRM_MODE_CONNECTOR_eDP 14
  208. #define DRM_MODE_CONNECTOR_VIRTUAL 15
  209. #define DRM_MODE_CONNECTOR_DSI 16
  210. struct drm_mode_get_connector {
  211. __u64 encoders_ptr;
  212. __u64 modes_ptr;
  213. __u64 props_ptr;
  214. __u64 prop_values_ptr;
  215. __u32 count_modes;
  216. __u32 count_props;
  217. __u32 count_encoders;
  218. __u32 encoder_id; /**< Current Encoder */
  219. __u32 connector_id; /**< Id */
  220. __u32 connector_type;
  221. __u32 connector_type_id;
  222. __u32 connection;
  223. __u32 mm_width; /**< width in millimeters */
  224. __u32 mm_height; /**< height in millimeters */
  225. __u32 subpixel;
  226. __u32 pad;
  227. };
  228. #define DRM_MODE_PROP_PENDING (1<<0)
  229. #define DRM_MODE_PROP_RANGE (1<<1)
  230. #define DRM_MODE_PROP_IMMUTABLE (1<<2)
  231. #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
  232. #define DRM_MODE_PROP_BLOB (1<<4)
  233. #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
  234. /* non-extended types: legacy bitmask, one bit per type: */
  235. #define DRM_MODE_PROP_LEGACY_TYPE ( \
  236. DRM_MODE_PROP_RANGE | \
  237. DRM_MODE_PROP_ENUM | \
  238. DRM_MODE_PROP_BLOB | \
  239. DRM_MODE_PROP_BITMASK)
  240. /* extended-types: rather than continue to consume a bit per type,
  241. * grab a chunk of the bits to use as integer type id.
  242. */
  243. #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0
  244. #define DRM_MODE_PROP_TYPE(n) ((n) << 6)
  245. #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1)
  246. #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2)
  247. /* the PROP_ATOMIC flag is used to hide properties from userspace that
  248. * is not aware of atomic properties. This is mostly to work around
  249. * older userspace (DDX drivers) that read/write each prop they find,
  250. * witout being aware that this could be triggering a lengthy modeset.
  251. */
  252. #define DRM_MODE_PROP_ATOMIC 0x80000000
  253. struct drm_mode_property_enum {
  254. __u64 value;
  255. char name[DRM_PROP_NAME_LEN];
  256. };
  257. struct drm_mode_get_property {
  258. __u64 values_ptr; /* values and blob lengths */
  259. __u64 enum_blob_ptr; /* enum and blob id ptrs */
  260. __u32 prop_id;
  261. __u32 flags;
  262. char name[DRM_PROP_NAME_LEN];
  263. __u32 count_values;
  264. /* This is only used to count enum values, not blobs. The _blobs is
  265. * simply because of a historical reason, i.e. backwards compat. */
  266. __u32 count_enum_blobs;
  267. };
  268. struct drm_mode_connector_set_property {
  269. __u64 value;
  270. __u32 prop_id;
  271. __u32 connector_id;
  272. };
  273. #define DRM_MODE_OBJECT_CRTC 0xcccccccc
  274. #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
  275. #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
  276. #define DRM_MODE_OBJECT_MODE 0xdededede
  277. #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
  278. #define DRM_MODE_OBJECT_FB 0xfbfbfbfb
  279. #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
  280. #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
  281. #define DRM_MODE_OBJECT_ANY 0
  282. struct drm_mode_obj_get_properties {
  283. __u64 props_ptr;
  284. __u64 prop_values_ptr;
  285. __u32 count_props;
  286. __u32 obj_id;
  287. __u32 obj_type;
  288. };
  289. struct drm_mode_obj_set_property {
  290. __u64 value;
  291. __u32 prop_id;
  292. __u32 obj_id;
  293. __u32 obj_type;
  294. };
  295. struct drm_mode_get_blob {
  296. __u32 blob_id;
  297. __u32 length;
  298. __u64 data;
  299. };
  300. struct drm_mode_fb_cmd {
  301. __u32 fb_id;
  302. __u32 width;
  303. __u32 height;
  304. __u32 pitch;
  305. __u32 bpp;
  306. __u32 depth;
  307. /* driver specific handle */
  308. __u32 handle;
  309. };
  310. #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
  311. #define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */
  312. struct drm_mode_fb_cmd2 {
  313. __u32 fb_id;
  314. __u32 width;
  315. __u32 height;
  316. __u32 pixel_format; /* fourcc code from drm_fourcc.h */
  317. __u32 flags; /* see above flags */
  318. /*
  319. * In case of planar formats, this ioctl allows up to 4
  320. * buffer objects with offsets and pitches per plane.
  321. * The pitch and offset order is dictated by the fourcc,
  322. * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
  323. *
  324. * YUV 4:2:0 image with a plane of 8 bit Y samples
  325. * followed by an interleaved U/V plane containing
  326. * 8 bit 2x2 subsampled colour difference samples.
  327. *
  328. * So it would consist of Y as offsets[0] and UV as
  329. * offsets[1]. Note that offsets[0] will generally
  330. * be 0 (but this is not required).
  331. *
  332. * To accommodate tiled, compressed, etc formats, a per-plane
  333. * modifier can be specified. The default value of zero
  334. * indicates "native" format as specified by the fourcc.
  335. * Vendor specific modifier token. This allows, for example,
  336. * different tiling/swizzling pattern on different planes.
  337. * See discussion above of DRM_FORMAT_MOD_xxx.
  338. */
  339. __u32 handles[4];
  340. __u32 pitches[4]; /* pitch for each plane */
  341. __u32 offsets[4]; /* offset of each plane */
  342. __u64 modifier[4]; /* ie, tiling, compressed (per plane) */
  343. };
  344. #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
  345. #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
  346. #define DRM_MODE_FB_DIRTY_FLAGS 0x03
  347. #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
  348. /*
  349. * Mark a region of a framebuffer as dirty.
  350. *
  351. * Some hardware does not automatically update display contents
  352. * as a hardware or software draw to a framebuffer. This ioctl
  353. * allows userspace to tell the kernel and the hardware what
  354. * regions of the framebuffer have changed.
  355. *
  356. * The kernel or hardware is free to update more then just the
  357. * region specified by the clip rects. The kernel or hardware
  358. * may also delay and/or coalesce several calls to dirty into a
  359. * single update.
  360. *
  361. * Userspace may annotate the updates, the annotates are a
  362. * promise made by the caller that the change is either a copy
  363. * of pixels or a fill of a single color in the region specified.
  364. *
  365. * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
  366. * the number of updated regions are half of num_clips given,
  367. * where the clip rects are paired in src and dst. The width and
  368. * height of each one of the pairs must match.
  369. *
  370. * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
  371. * promises that the region specified of the clip rects is filled
  372. * completely with a single color as given in the color argument.
  373. */
  374. struct drm_mode_fb_dirty_cmd {
  375. __u32 fb_id;
  376. __u32 flags;
  377. __u32 color;
  378. __u32 num_clips;
  379. __u64 clips_ptr;
  380. };
  381. struct drm_mode_mode_cmd {
  382. __u32 connector_id;
  383. struct drm_mode_modeinfo mode;
  384. };
  385. #define DRM_MODE_CURSOR_BO 0x01
  386. #define DRM_MODE_CURSOR_MOVE 0x02
  387. #define DRM_MODE_CURSOR_FLAGS 0x03
  388. /*
  389. * depending on the value in flags different members are used.
  390. *
  391. * CURSOR_BO uses
  392. * crtc_id
  393. * width
  394. * height
  395. * handle - if 0 turns the cursor off
  396. *
  397. * CURSOR_MOVE uses
  398. * crtc_id
  399. * x
  400. * y
  401. */
  402. struct drm_mode_cursor {
  403. __u32 flags;
  404. __u32 crtc_id;
  405. __s32 x;
  406. __s32 y;
  407. __u32 width;
  408. __u32 height;
  409. /* driver specific handle */
  410. __u32 handle;
  411. };
  412. struct drm_mode_cursor2 {
  413. __u32 flags;
  414. __u32 crtc_id;
  415. __s32 x;
  416. __s32 y;
  417. __u32 width;
  418. __u32 height;
  419. /* driver specific handle */
  420. __u32 handle;
  421. __s32 hot_x;
  422. __s32 hot_y;
  423. };
  424. struct drm_mode_crtc_lut {
  425. __u32 crtc_id;
  426. __u32 gamma_size;
  427. /* pointers to arrays */
  428. __u64 red;
  429. __u64 green;
  430. __u64 blue;
  431. };
  432. struct drm_color_ctm {
  433. /* Conversion matrix in S31.32 format. */
  434. __s64 matrix[9];
  435. };
  436. struct drm_color_lut {
  437. /*
  438. * Data is U0.16 fixed point format.
  439. */
  440. __u16 red;
  441. __u16 green;
  442. __u16 blue;
  443. __u16 reserved;
  444. };
  445. #define DRM_MODE_PAGE_FLIP_EVENT 0x01
  446. #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
  447. #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
  448. /*
  449. * Request a page flip on the specified crtc.
  450. *
  451. * This ioctl will ask KMS to schedule a page flip for the specified
  452. * crtc. Once any pending rendering targeting the specified fb (as of
  453. * ioctl time) has completed, the crtc will be reprogrammed to display
  454. * that fb after the next vertical refresh. The ioctl returns
  455. * immediately, but subsequent rendering to the current fb will block
  456. * in the execbuffer ioctl until the page flip happens. If a page
  457. * flip is already pending as the ioctl is called, EBUSY will be
  458. * returned.
  459. *
  460. * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
  461. * event (see drm.h: struct drm_event_vblank) when the page flip is
  462. * done. The user_data field passed in with this ioctl will be
  463. * returned as the user_data field in the vblank event struct.
  464. *
  465. * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
  466. * 'as soon as possible', meaning that it not delay waiting for vblank.
  467. * This may cause tearing on the screen.
  468. *
  469. * The reserved field must be zero until we figure out something
  470. * clever to use it for.
  471. */
  472. struct drm_mode_crtc_page_flip {
  473. __u32 crtc_id;
  474. __u32 fb_id;
  475. __u32 flags;
  476. __u32 reserved;
  477. __u64 user_data;
  478. };
  479. /* create a dumb scanout buffer */
  480. struct drm_mode_create_dumb {
  481. __u32 height;
  482. __u32 width;
  483. __u32 bpp;
  484. __u32 flags;
  485. /* handle, pitch, size will be returned */
  486. __u32 handle;
  487. __u32 pitch;
  488. __u64 size;
  489. };
  490. /* set up for mmap of a dumb scanout buffer */
  491. struct drm_mode_map_dumb {
  492. /** Handle for the object being mapped. */
  493. __u32 handle;
  494. __u32 pad;
  495. /**
  496. * Fake offset to use for subsequent mmap call
  497. *
  498. * This is a fixed-size type for 32/64 compatibility.
  499. */
  500. __u64 offset;
  501. };
  502. struct drm_mode_destroy_dumb {
  503. __u32 handle;
  504. };
  505. /* page-flip flags are valid, plus: */
  506. #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
  507. #define DRM_MODE_ATOMIC_NONBLOCK 0x0200
  508. #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
  509. #define DRM_MODE_ATOMIC_FLAGS (\
  510. DRM_MODE_PAGE_FLIP_EVENT |\
  511. DRM_MODE_PAGE_FLIP_ASYNC |\
  512. DRM_MODE_ATOMIC_TEST_ONLY |\
  513. DRM_MODE_ATOMIC_NONBLOCK |\
  514. DRM_MODE_ATOMIC_ALLOW_MODESET)
  515. struct drm_mode_atomic {
  516. __u32 flags;
  517. __u32 count_objs;
  518. __u64 objs_ptr;
  519. __u64 count_props_ptr;
  520. __u64 props_ptr;
  521. __u64 prop_values_ptr;
  522. __u64 reserved;
  523. __u64 user_data;
  524. };
  525. /**
  526. * Create a new 'blob' data property, copying length bytes from data pointer,
  527. * and returning new blob ID.
  528. */
  529. struct drm_mode_create_blob {
  530. /** Pointer to data to copy. */
  531. __u64 data;
  532. /** Length of data to copy. */
  533. __u32 length;
  534. /** Return: new property ID. */
  535. __u32 blob_id;
  536. };
  537. /**
  538. * Destroy a user-created blob property.
  539. */
  540. struct drm_mode_destroy_blob {
  541. __u32 blob_id;
  542. };
  543. #endif