cache.c 1.4 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. /* Cache test
  9. *
  10. * This test verifies the CPU data and instruction cache using
  11. * several test scenarios.
  12. */
  13. #include <post.h>
  14. #include <watchdog.h>
  15. #if CONFIG_POST & CONFIG_SYS_POST_CACHE
  16. #define CACHE_POST_SIZE 1024
  17. extern int cache_post_test1 (char *, unsigned int);
  18. extern int cache_post_test2 (char *, unsigned int);
  19. extern int cache_post_test3 (char *, unsigned int);
  20. extern int cache_post_test4 (char *, unsigned int);
  21. extern int cache_post_test5 (void);
  22. extern int cache_post_test6 (void);
  23. int cache_post_test (int flags)
  24. {
  25. int ints = disable_interrupts ();
  26. int res = 0;
  27. static char ta[CACHE_POST_SIZE + 0xf];
  28. char *testarea = (char *) (((unsigned long) ta + 0xf) & ~0xf);
  29. WATCHDOG_RESET ();
  30. if (res == 0)
  31. res = cache_post_test1 (testarea, CACHE_POST_SIZE);
  32. WATCHDOG_RESET ();
  33. if (res == 0)
  34. res = cache_post_test2 (testarea, CACHE_POST_SIZE);
  35. WATCHDOG_RESET ();
  36. if (res == 0)
  37. res = cache_post_test3 (testarea, CACHE_POST_SIZE);
  38. WATCHDOG_RESET ();
  39. if (res == 0)
  40. res = cache_post_test4 (testarea, CACHE_POST_SIZE);
  41. WATCHDOG_RESET ();
  42. if (res == 0)
  43. res = cache_post_test5 ();
  44. WATCHDOG_RESET ();
  45. if (res == 0)
  46. res = cache_post_test6 ();
  47. WATCHDOG_RESET ();
  48. if (ints)
  49. enable_interrupts ();
  50. return res;
  51. }
  52. #endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */