xpedite1000.h 11 KB

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  1. /*
  2. * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. /*
  7. * config for XPedite1000 from XES Inc.
  8. * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
  9. * (C) Copyright 2003 Sandburst Corporation
  10. * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
  11. */
  12. #ifndef __CONFIG_H
  13. #define __CONFIG_H
  14. /* High Level Configuration Options */
  15. #define CONFIG_XPEDITE1000 1
  16. #define CONFIG_SYS_BOARD_NAME "XPedite1000"
  17. #define CONFIG_SYS_FORM_PMC 1
  18. #define CONFIG_440 1
  19. #define CONFIG_440GX 1 /* 440 GX */
  20. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
  21. #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
  22. #define CONFIG_SYS_TEXT_BASE 0xFFF80000
  23. /*
  24. * DDR config
  25. */
  26. #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
  27. #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
  28. #define CONFIG_VERY_BIG_RAM 1
  29. /*
  30. * Base addresses -- Note these are effective addresses where the
  31. * actual resources get mapped (not physical addresses)
  32. */
  33. #define CONFIG_SYS_SDRAM_BASE 0x00000000
  34. #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
  35. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
  36. #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
  37. #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
  38. #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
  39. #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
  40. #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
  41. /*
  42. * Diagnostics
  43. */
  44. #define CONFIG_SYS_ALT_MEMTEST
  45. #define CONFIG_SYS_MEMTEST_START 0x0400000
  46. #define CONFIG_SYS_MEMTEST_END 0x0C00000
  47. /* POST support */
  48. #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
  49. CONFIG_SYS_POST_I2C)
  50. /*
  51. * LED support
  52. */
  53. #define USR_LED0 0x00000080
  54. #define USR_LED1 0x00000100
  55. #define USR_LED2 0x00000200
  56. #define USR_LED3 0x00000400
  57. #ifndef __ASSEMBLY__
  58. extern unsigned long in32(unsigned int);
  59. extern void out32(unsigned int, unsigned long);
  60. #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
  61. #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
  62. #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
  63. #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
  64. #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
  65. #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
  66. #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
  67. #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
  68. #endif
  69. /*
  70. * Use internal SRAM for initial stack
  71. */
  72. #define CONFIG_SYS_TEMP_STACK_OCM 1
  73. #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
  74. #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
  75. #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
  76. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  77. #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
  78. #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 KB for Mon */
  79. #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
  80. /*
  81. * Serial Port
  82. */
  83. #define CONFIG_CONS_INDEX 1 /* Use UART0 */
  84. #define CONFIG_SYS_NS16550_SERIAL
  85. #define CONFIG_SYS_NS16550_REG_SIZE 1
  86. #define CONFIG_SYS_NS16550_CLK get_serial_clock()
  87. #define CONFIG_SYS_BAUDRATE_TABLE \
  88. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
  89. #define CONFIG_BAUDRATE 115200
  90. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  91. #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  92. /*
  93. * NOR flash configuration
  94. */
  95. #define CONFIG_SYS_MAX_FLASH_BANKS 3
  96. #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
  97. #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
  98. #define CONFIG_FLASH_CFI_DRIVER
  99. #define CONFIG_SYS_FLASH_CFI
  100. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  101. #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
  102. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  103. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  104. /*
  105. * I2C
  106. */
  107. #define CONFIG_SYS_I2C
  108. #define CONFIG_SYS_I2C_PPC4XX
  109. #define CONFIG_SYS_I2C_PPC4XX_CH0
  110. #define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
  111. #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7f
  112. /* I2C EEPROM */
  113. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
  114. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
  115. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
  116. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
  117. /* I2C RTC: STMicro M41T00 */
  118. #define CONFIG_RTC_M41T11 1
  119. #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  120. #define CONFIG_SYS_M41T11_BASE_YEAR 2000
  121. /*
  122. * PCI
  123. */
  124. /* General PCI */
  125. #define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
  126. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  127. #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
  128. /* Board-specific PCI */
  129. #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
  130. #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
  131. #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  132. #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
  133. /*
  134. * Networking options
  135. */
  136. #define CONFIG_PPC4xx_EMAC
  137. #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
  138. #define CONFIG_MII 1 /* MII PHY management */
  139. #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
  140. #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  141. #define CONFIG_ETHPRIME "ppc_4xx_eth2"
  142. #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
  143. #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
  144. #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
  145. #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
  146. #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
  147. /* BOOTP options */
  148. #define CONFIG_BOOTP_BOOTFILESIZE
  149. #define CONFIG_BOOTP_BOOTPATH
  150. #define CONFIG_BOOTP_GATEWAY
  151. #define CONFIG_BOOTP_HOSTNAME
  152. /*
  153. * Command configuration
  154. */
  155. #define CONFIG_CMD_DATE
  156. #define CONFIG_CMD_EEPROM
  157. #define CONFIG_CMD_IRQ
  158. #define CONFIG_CMD_JFFS2
  159. #define CONFIG_CMD_PCI
  160. /*
  161. * Miscellaneous configurable options
  162. */
  163. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  164. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
  165. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  166. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  167. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  168. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  169. #define CONFIG_CMDLINE_EDITING 1 /* Command-line editing */
  170. #define CONFIG_PANIC_HANG /* do not reset board on panic */
  171. #define CONFIG_PREBOOT /* enable preboot variable */
  172. #define CONFIG_INTEGRITY /* support booting INTEGRITY OS */
  173. #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  174. /*
  175. * For booting Linux, the board info and command line data
  176. * have to be in the first 8 MB of memory, since this is
  177. * the maximum mapped by the Linux kernel during initialization.
  178. */
  179. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  180. /*
  181. * Environment Configuration
  182. */
  183. #define CONFIG_ENV_IS_IN_FLASH 1
  184. #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
  185. #define CONFIG_ENV_SIZE 0x8000
  186. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
  187. /*
  188. * Flash memory map:
  189. * fff80000 - ffffffff U-Boot (512 KB)
  190. * fff40000 - fff7ffff U-Boot Environment (256 KB)
  191. * fff00000 - fff3ffff FDT (256KB)
  192. * ffc00000 - ffefffff OS image (3MB)
  193. * ff000000 - ffbfffff OS Use/Filesystem (12MB)
  194. */
  195. #define CONFIG_UBOOT_ENV_ADDR __stringify(CONFIG_SYS_TEXT_BASE)
  196. #define CONFIG_FDT_ENV_ADDR __stringify(0xfff00000)
  197. #define CONFIG_OS_ENV_ADDR __stringify(0xffc00000)
  198. #define CONFIG_PROG_UBOOT \
  199. "$download_cmd $loadaddr $ubootfile; " \
  200. "if test $? -eq 0; then " \
  201. "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  202. "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  203. "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
  204. "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
  205. "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
  206. "if test $? -ne 0; then " \
  207. "echo PROGRAM FAILED; " \
  208. "else; " \
  209. "echo PROGRAM SUCCEEDED; " \
  210. "fi; " \
  211. "else; " \
  212. "echo DOWNLOAD FAILED; " \
  213. "fi;"
  214. #define CONFIG_BOOT_OS_NET \
  215. "$download_cmd $osaddr $osfile; " \
  216. "if test $? -eq 0; then " \
  217. "if test -n $fdtaddr; then " \
  218. "$download_cmd $fdtaddr $fdtfile; " \
  219. "if test $? -eq 0; then " \
  220. "bootm $osaddr - $fdtaddr; " \
  221. "else; " \
  222. "echo FDT DOWNLOAD FAILED; " \
  223. "fi; " \
  224. "else; " \
  225. "bootm $osaddr; " \
  226. "fi; " \
  227. "else; " \
  228. "echo OS DOWNLOAD FAILED; " \
  229. "fi;"
  230. #define CONFIG_PROG_OS \
  231. "$download_cmd $osaddr $osfile; " \
  232. "if test $? -eq 0; then " \
  233. "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
  234. "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
  235. "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
  236. "if test $? -ne 0; then " \
  237. "echo OS PROGRAM FAILED; " \
  238. "else; " \
  239. "echo OS PROGRAM SUCCEEDED; " \
  240. "fi; " \
  241. "else; " \
  242. "echo OS DOWNLOAD FAILED; " \
  243. "fi;"
  244. #define CONFIG_PROG_FDT \
  245. "$download_cmd $fdtaddr $fdtfile; " \
  246. "if test $? -eq 0; then " \
  247. "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
  248. "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
  249. "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
  250. "if test $? -ne 0; then " \
  251. "echo FDT PROGRAM FAILED; " \
  252. "else; " \
  253. "echo FDT PROGRAM SUCCEEDED; " \
  254. "fi; " \
  255. "else; " \
  256. "echo FDT DOWNLOAD FAILED; " \
  257. "fi;"
  258. #define CONFIG_EXTRA_ENV_SETTINGS \
  259. "autoload=yes\0" \
  260. "download_cmd=tftp\0" \
  261. "console_args=console=ttyS0,115200\0" \
  262. "root_args=root=/dev/nfs rw\0" \
  263. "misc_args=ip=on\0" \
  264. "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
  265. "bootfile=/home/user/file\0" \
  266. "osfile=/home/user/board.uImage\0" \
  267. "fdtfile=/home/user/board.dtb\0" \
  268. "ubootfile=/home/user/u-boot.bin\0" \
  269. "fdtaddr=0x1e00000\0" \
  270. "osaddr=0x1000000\0" \
  271. "loadaddr=0x1000000\0" \
  272. "prog_uboot="CONFIG_PROG_UBOOT"\0" \
  273. "prog_os="CONFIG_PROG_OS"\0" \
  274. "prog_fdt="CONFIG_PROG_FDT"\0" \
  275. "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
  276. "bootcmd_flash=run set_bootargs; " \
  277. "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
  278. "bootcmd=run bootcmd_flash\0"
  279. #endif /* __CONFIG_H */