x86-chromebook.h 1.6 KB

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  1. /*
  2. * Copyright (c) 2015 Google, Inc
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef _X86_CHROMEBOOK_H
  7. #define _X86_CHROMEBOOK_H
  8. #define CONFIG_SYS_MONITOR_LEN (1 << 20)
  9. #define CONFIG_BOARD_EARLY_INIT_F
  10. #define CONFIG_MISC_INIT_R
  11. #define CONFIG_X86_MRC_ADDR 0xfffa0000
  12. #define CONFIG_X86_REFCODE_ADDR 0xffea0000
  13. #define CONFIG_X86_REFCODE_RUN_ADDR 0
  14. #define CONFIG_SCSI_DEV_LIST \
  15. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
  16. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
  17. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
  18. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
  19. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}, \
  20. {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_AHCI}
  21. #define CONFIG_PCI_MEM_BUS 0xe0000000
  22. #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
  23. #define CONFIG_PCI_MEM_SIZE 0x10000000
  24. #define CONFIG_PCI_PREF_BUS 0xd0000000
  25. #define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
  26. #define CONFIG_PCI_PREF_SIZE 0x10000000
  27. #define CONFIG_PCI_IO_BUS 0x1000
  28. #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
  29. #define CONFIG_PCI_IO_SIZE 0xefff
  30. #define CONFIG_BIOSEMU
  31. #define VIDEO_IO_OFFSET 0
  32. #define CONFIG_X86EMU_RAW_IO
  33. #define CONFIG_ARCH_EARLY_INIT_R
  34. #undef CONFIG_ENV_IS_NOWHERE
  35. #undef CONFIG_ENV_SIZE
  36. #define CONFIG_ENV_SIZE 0x1000
  37. #define CONFIG_ENV_SECT_SIZE 0x1000
  38. #define CONFIG_ENV_IS_IN_SPI_FLASH
  39. #define CONFIG_ENV_OFFSET 0x003f8000
  40. #define CONFIG_SYS_WHITE_ON_BLACK
  41. #define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,i8042-kbd,serial\0" \
  42. "stdout=vidconsole,serial\0" \
  43. "stderr=vidconsole,serial\0"
  44. #endif