warp7.h 4.1 KB

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  1. /*
  2. * Copyright (C) 2016 NXP Semiconductors
  3. *
  4. * Configuration settings for the i.MX7S Warp board.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __WARP7_CONFIG_H
  9. #define __WARP7_CONFIG_H
  10. #include "mx7_common.h"
  11. #define PHYS_SDRAM_SIZE SZ_512M
  12. #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
  13. /* Size of malloc() pool */
  14. #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M)
  15. #define CONFIG_BOARD_EARLY_INIT_F
  16. #define CONFIG_BOARD_LATE_INIT
  17. /* MMC Config*/
  18. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR
  19. #define CONFIG_SUPPORT_EMMC_BOOT
  20. #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
  21. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  22. #define CONFIG_PARTITION_UUIDS
  23. #define CONFIG_CMD_PART
  24. #define CONFIG_DFU_ENV_SETTINGS \
  25. "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \
  26. #define CONFIG_EXTRA_ENV_SETTINGS \
  27. CONFIG_DFU_ENV_SETTINGS \
  28. "script=boot.scr\0" \
  29. "image=zImage\0" \
  30. "console=ttymxc0\0" \
  31. "ethact=usb_ether\0" \
  32. "fdt_high=0xffffffff\0" \
  33. "initrd_high=0xffffffff\0" \
  34. "fdt_file=imx7s-warp.dtb\0" \
  35. "fdt_addr=0x83000000\0" \
  36. "boot_fdt=try\0" \
  37. "ip_dyn=yes\0" \
  38. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  39. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  40. "finduuid=part uuid mmc 0:2 uuid\0" \
  41. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  42. "root=PARTUUID=${uuid} rootwait rw\0" \
  43. "loadbootscript=" \
  44. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  45. "bootscript=echo Running bootscript from mmc ...; " \
  46. "source\0" \
  47. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  48. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  49. "mmcboot=echo Booting from mmc ...; " \
  50. "run finduuid; " \
  51. "run mmcargs; " \
  52. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  53. "if run loadfdt; then " \
  54. "bootz ${loadaddr} - ${fdt_addr}; " \
  55. "else " \
  56. "if test ${boot_fdt} = try; then " \
  57. "bootz; " \
  58. "else " \
  59. "echo WARN: Cannot load the DT; " \
  60. "fi; " \
  61. "fi; " \
  62. "else " \
  63. "bootz; " \
  64. "fi;\0" \
  65. #define CONFIG_BOOTCOMMAND \
  66. "mmc dev ${mmcdev};" \
  67. "mmc dev ${mmcdev}; if mmc rescan; then " \
  68. "if run loadbootscript; then " \
  69. "run bootscript; " \
  70. "else " \
  71. "if run loadimage; then " \
  72. "run mmcboot; " \
  73. "fi; " \
  74. "fi; " \
  75. "fi"
  76. #define CONFIG_SYS_MEMTEST_START 0x80000000
  77. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
  78. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  79. #define CONFIG_SYS_HZ 1000
  80. #define CONFIG_STACKSIZE SZ_128K
  81. /* Physical Memory Map */
  82. #define CONFIG_NR_DRAM_BANKS 1
  83. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  84. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  85. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  86. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  87. #define CONFIG_SYS_INIT_SP_OFFSET \
  88. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  89. #define CONFIG_SYS_INIT_SP_ADDR \
  90. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  91. /* I2C configs */
  92. #define CONFIG_SYS_I2C
  93. #define CONFIG_SYS_I2C_MXC
  94. #define CONFIG_SYS_I2C_MXC_I2C1
  95. #define CONFIG_SYS_I2C_SPEED 100000
  96. /* PMIC */
  97. #define CONFIG_POWER
  98. #define CONFIG_POWER_I2C
  99. #define CONFIG_POWER_PFUZE3000
  100. #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
  101. /* FLASH and environment organization */
  102. #define CONFIG_SYS_NO_FLASH
  103. #define CONFIG_ENV_SIZE SZ_8K
  104. #define CONFIG_ENV_IS_IN_MMC
  105. #define CONFIG_ENV_OFFSET (8 * SZ_64K)
  106. #define CONFIG_SYS_FSL_USDHC_NUM 1
  107. #define CONFIG_SYS_MMC_ENV_DEV 0
  108. #define CONFIG_SYS_MMC_ENV_PART 0
  109. /* USB Configs */
  110. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  111. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  112. #define CONFIG_MXC_USB_FLAGS 0
  113. #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Only OTG1 port enabled */
  114. #define CONFIG_IMX_THERMAL
  115. #define CONFIG_USBD_HS
  116. #define CONFIG_USB_FUNCTION_MASS_STORAGE
  117. /* USB Device Firmware Update support */
  118. #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_16M
  119. #define DFU_DEFAULT_POLL_TIMEOUT 300
  120. #define CONFIG_USB_ETHER
  121. #define CONFIG_USB_ETH_CDC
  122. #define CONFIG_USB_ETH_RNDIS
  123. #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
  124. #define CONFIG_USBNET_DEV_ADDR "de:ad:be:af:00:01"
  125. #endif