thunderx_88xx.h 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899
  1. /**
  2. * (C) Copyright 2014, Cavium Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. **/
  6. #ifndef __THUNDERX_88XX_H__
  7. #define __THUNDERX_88XX_H__
  8. #define CONFIG_REMAKE_ELF
  9. #define CONFIG_THUNDERX
  10. #define CONFIG_SYS_64BIT
  11. #define CONFIG_SYS_NO_FLASH
  12. #define MEM_BASE 0x00500000
  13. #define CONFIG_SYS_LOWMEM_BASE MEM_BASE
  14. /* Link Definitions */
  15. #define CONFIG_SYS_TEXT_BASE 0x00500000
  16. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  17. /* SMP Spin Table Definitions */
  18. #define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  19. /* Generic Timer Definitions */
  20. #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
  21. #define CONFIG_SYS_MEMTEST_START MEM_BASE
  22. #define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
  23. /* Size of malloc() pool */
  24. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  25. /* PL011 Serial Configuration */
  26. #define CONFIG_PL01X_SERIAL
  27. #define CONFIG_PL011_CLOCK 24000000
  28. #define CONFIG_CONS_INDEX 1
  29. /* Generic Interrupt Controller Definitions */
  30. #define GICD_BASE (0x801000000000)
  31. #define GICR_BASE (0x801000002000)
  32. #define CONFIG_SYS_SERIAL0 0x87e024000000
  33. #define CONFIG_SYS_SERIAL1 0x87e025000000
  34. #define CONFIG_BAUDRATE 115200
  35. /* BOOTP options */
  36. #define CONFIG_BOOTP_BOOTFILESIZE
  37. #define CONFIG_BOOTP_BOOTPATH
  38. #define CONFIG_BOOTP_GATEWAY
  39. #define CONFIG_BOOTP_HOSTNAME
  40. #define CONFIG_BOOTP_PXE
  41. /* Miscellaneous configurable options */
  42. #define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
  43. /* Physical Memory Map */
  44. #define CONFIG_NR_DRAM_BANKS 1
  45. #define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
  46. #define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
  47. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  48. /* Initial environment variables */
  49. #define UBOOT_IMG_HEAD_SIZE 0x40
  50. /* C80000 - 0x40 */
  51. #define CONFIG_EXTRA_ENV_SETTINGS \
  52. "kernel_addr=08007ffc0\0" \
  53. "fdt_addr=0x94C00000\0" \
  54. "fdt_high=0x9fffffff\0"
  55. #define CONFIG_BOOTARGS \
  56. "console=ttyAMA0,115200n8 " \
  57. "earlycon=pl011,0x87e024000000 " \
  58. "debug maxcpus=48 rootwait rw "\
  59. "root=/dev/sda2 coherent_pool=16M"
  60. /* Do not preserve environment */
  61. #define CONFIG_ENV_IS_NOWHERE 1
  62. #define CONFIG_ENV_SIZE 0x1000
  63. /* Monitor Command Prompt */
  64. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  65. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  66. sizeof(CONFIG_SYS_PROMPT) + 16)
  67. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  68. #define CONFIG_SYS_LONGHELP
  69. #define CONFIG_CMDLINE_EDITING 1
  70. #define CONFIG_SYS_MAXARGS 64 /* max command args */
  71. #define CONFIG_NO_RELOCATION 1
  72. #define CONFIG_LIB_RAND
  73. #define PLL_REF_CLK 50000000 /* 50 MHz */
  74. #define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
  75. #endif /* __THUNDERX_88XX_H__ */