stout.h 2.7 KB

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  1. /*
  2. * include/configs/stout.h
  3. * This file is Stout board configuration.
  4. *
  5. * Copyright (C) 2015 Renesas Electronics Europe GmbH
  6. * Copyright (C) 2015 Renesas Electronics Corporation
  7. * Copyright (C) 2015 Cogent Embedded, Inc.
  8. *
  9. * SPDX-License-Identifier: GPL-2.0
  10. */
  11. #ifndef __STOUT_H
  12. #define __STOUT_H
  13. #undef DEBUG
  14. #define CONFIG_R8A7790
  15. #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout"
  16. #include "rcar-gen2-common.h"
  17. /* #define CONFIG_BOARD_LATE_INIT */
  18. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
  19. #define CONFIG_SYS_TEXT_BASE 0xB0000000
  20. #else
  21. #define CONFIG_SYS_TEXT_BASE 0xE8080000
  22. #endif
  23. /* STACK */
  24. #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
  25. #define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
  26. #else
  27. #define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
  28. #endif
  29. #define STACK_AREA_SIZE 0xC000
  30. #define LOW_LEVEL_MERAM_STACK \
  31. (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
  32. /* MEMORY */
  33. #define RCAR_GEN2_SDRAM_BASE 0x40000000
  34. #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
  35. #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
  36. /* SCIF */
  37. #define CONFIG_SCIF_CONSOLE
  38. #define CONFIG_SCIF_A
  39. /* SPI */
  40. #define CONFIG_SPI
  41. #define CONFIG_SH_QSPI
  42. #define CONFIG_SPI_FLASH_QUAD
  43. #define CONFIG_SYS_NO_FLASH
  44. /* SH Ether */
  45. #define CONFIG_SH_ETHER
  46. #define CONFIG_SH_ETHER_USE_PORT 0
  47. #define CONFIG_SH_ETHER_PHY_ADDR 0x1
  48. #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
  49. #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
  50. #define CONFIG_SH_ETHER_CACHE_WRITEBACK
  51. #define CONFIG_SH_ETHER_CACHE_INVALIDATE
  52. #define CONFIG_PHYLIB
  53. #define CONFIG_PHY_MICREL
  54. #define CONFIG_BITBANGMII
  55. #define CONFIG_BITBANGMII_MULTI
  56. /* I2C */
  57. #define CONFIG_SYS_I2C
  58. #define CONFIG_SYS_I2C_RCAR
  59. #define CONFIG_SYS_RCAR_I2C0_SPEED 400000
  60. #define CONFIG_SYS_RCAR_I2C1_SPEED 400000
  61. #define CONFIG_SYS_RCAR_I2C2_SPEED 400000
  62. #define CONFIG_SYS_RCAR_I2C3_SPEED 400000
  63. #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
  64. #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
  65. /* Board Clock */
  66. #define RMOBILE_XTAL_CLK 20000000u
  67. #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
  68. #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
  69. #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
  70. #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
  71. #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
  72. #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
  73. #define CONFIG_SYS_TMU_CLK_DIV 4
  74. /* USB */
  75. #define CONFIG_USB_EHCI
  76. #define CONFIG_USB_EHCI_RMOBILE
  77. #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
  78. /* MMC */
  79. #define CONFIG_GENERIC_MMC
  80. /* Module stop status bits */
  81. /* INTC-RT */
  82. #define CONFIG_SMSTP0_ENA 0x00400000
  83. /* MSIF, SCIFA0 */
  84. #define CONFIG_SMSTP2_ENA 0x00002010
  85. /* INTC-SYS, IRQC */
  86. #define CONFIG_SMSTP4_ENA 0x00000180
  87. /* SDHI */
  88. #define CONFIG_SH_SDHI_FREQ 97500000
  89. #endif /* __STOUT_H */