mx7dsabresd.h 7.6 KB

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  1. /*
  2. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  3. *
  4. * Configuration settings for the Freescale i.MX7D SABRESD board.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __MX7D_SABRESD_CONFIG_H
  9. #define __MX7D_SABRESD_CONFIG_H
  10. #include "mx7_common.h"
  11. #define CONFIG_DBG_MONITOR
  12. #define PHYS_SDRAM_SIZE SZ_1G
  13. #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
  14. /* Size of malloc() pool */
  15. #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
  16. #define CONFIG_BOARD_EARLY_INIT_F
  17. #define CONFIG_BOARD_LATE_INIT
  18. /* Network */
  19. #define CONFIG_FEC_MXC
  20. #define CONFIG_MII
  21. #define CONFIG_FEC_XCV_TYPE RGMII
  22. #define CONFIG_ETHPRIME "FEC"
  23. #define CONFIG_FEC_MXC_PHYADDR 0
  24. #define CONFIG_PHYLIB
  25. #define CONFIG_PHY_BROADCOM
  26. /* ENET1 */
  27. #define IMX_FEC_BASE ENET_IPS_BASE_ADDR
  28. /* MMC Config*/
  29. #define CONFIG_SYS_FSL_ESDHC_ADDR 0
  30. /* PMIC */
  31. #define CONFIG_POWER
  32. #define CONFIG_POWER_I2C
  33. #define CONFIG_POWER_PFUZE3000
  34. #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
  35. #undef CONFIG_BOOTM_NETBSD
  36. #undef CONFIG_BOOTM_PLAN9
  37. #undef CONFIG_BOOTM_RTEMS
  38. /* I2C configs */
  39. #define CONFIG_SYS_I2C
  40. #define CONFIG_SYS_I2C_MXC
  41. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  42. #define CONFIG_SYS_I2C_SPEED 100000
  43. #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
  44. #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
  45. #ifdef CONFIG_IMX_BOOTAUX
  46. /* Set to QSPI1 A flash at default */
  47. #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
  48. #define UPDATE_M4_ENV \
  49. "m4image=m4_qspi.bin\0" \
  50. "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
  51. "update_m4_from_sd=" \
  52. "if sf probe 0:0; then " \
  53. "if run loadm4image; then " \
  54. "setexpr fw_sz ${filesize} + 0xffff; " \
  55. "setexpr fw_sz ${fw_sz} / 0x10000; " \
  56. "setexpr fw_sz ${fw_sz} * 0x10000; " \
  57. "sf erase 0x0 ${fw_sz}; " \
  58. "sf write ${loadaddr} 0x0 ${filesize}; " \
  59. "fi; " \
  60. "fi\0" \
  61. "m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
  62. #else
  63. #define UPDATE_M4_ENV ""
  64. #endif
  65. #define CONFIG_MFG_ENV_SETTINGS \
  66. "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
  67. "rdinit=/linuxrc " \
  68. "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
  69. "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
  70. "g_mass_storage.iSerialNumber=\"\" "\
  71. "clk_ignore_unused "\
  72. "\0" \
  73. "initrd_addr=0x83800000\0" \
  74. "initrd_high=0xffffffff\0" \
  75. "bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
  76. #define CONFIG_DFU_ENV_SETTINGS \
  77. "dfu_alt_info=image raw 0 0x800000;"\
  78. "u-boot raw 0 0x4000;"\
  79. "bootimg part 0 1;"\
  80. "rootfs part 0 2\0" \
  81. #define CONFIG_EXTRA_ENV_SETTINGS \
  82. UPDATE_M4_ENV \
  83. CONFIG_MFG_ENV_SETTINGS \
  84. CONFIG_DFU_ENV_SETTINGS \
  85. "script=boot.scr\0" \
  86. "image=zImage\0" \
  87. "console=ttymxc0\0" \
  88. "fdt_high=0xffffffff\0" \
  89. "initrd_high=0xffffffff\0" \
  90. "fdt_file=imx7d-sdb.dtb\0" \
  91. "fdt_addr=0x83000000\0" \
  92. "boot_fdt=try\0" \
  93. "ip_dyn=yes\0" \
  94. "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
  95. "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
  96. "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
  97. "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  98. "mmcautodetect=yes\0" \
  99. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  100. "root=${mmcroot}\0" \
  101. "loadbootscript=" \
  102. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  103. "bootscript=echo Running bootscript from mmc ...; " \
  104. "source\0" \
  105. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  106. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  107. "mmcboot=echo Booting from mmc ...; " \
  108. "run mmcargs; " \
  109. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  110. "if run loadfdt; then " \
  111. "bootz ${loadaddr} - ${fdt_addr}; " \
  112. "else " \
  113. "if test ${boot_fdt} = try; then " \
  114. "bootz; " \
  115. "else " \
  116. "echo WARN: Cannot load the DT; " \
  117. "fi; " \
  118. "fi; " \
  119. "else " \
  120. "bootz; " \
  121. "fi;\0" \
  122. "netargs=setenv bootargs console=${console},${baudrate} " \
  123. "root=/dev/nfs " \
  124. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  125. "netboot=echo Booting from net ...; " \
  126. "run netargs; " \
  127. "if test ${ip_dyn} = yes; then " \
  128. "setenv get_cmd dhcp; " \
  129. "else " \
  130. "setenv get_cmd tftp; " \
  131. "fi; " \
  132. "${get_cmd} ${image}; " \
  133. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  134. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  135. "bootz ${loadaddr} - ${fdt_addr}; " \
  136. "else " \
  137. "if test ${boot_fdt} = try; then " \
  138. "bootz; " \
  139. "else " \
  140. "echo WARN: Cannot load the DT; " \
  141. "fi; " \
  142. "fi; " \
  143. "else " \
  144. "bootz; " \
  145. "fi;\0"
  146. #define CONFIG_BOOTCOMMAND \
  147. "mmc dev ${mmcdev};" \
  148. "mmc dev ${mmcdev}; if mmc rescan; then " \
  149. "if run loadbootscript; then " \
  150. "run bootscript; " \
  151. "else " \
  152. "if run loadimage; then " \
  153. "run mmcboot; " \
  154. "else run netboot; " \
  155. "fi; " \
  156. "fi; " \
  157. "else run netboot; fi"
  158. #define CONFIG_SYS_MEMTEST_START 0x80000000
  159. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
  160. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  161. #define CONFIG_SYS_HZ 1000
  162. #define CONFIG_STACKSIZE SZ_128K
  163. /* Physical Memory Map */
  164. #define CONFIG_NR_DRAM_BANKS 1
  165. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  166. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  167. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  168. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  169. #define CONFIG_SYS_INIT_SP_OFFSET \
  170. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  171. #define CONFIG_SYS_INIT_SP_ADDR \
  172. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  173. /* FLASH and environment organization */
  174. #define CONFIG_SYS_NO_FLASH
  175. #define CONFIG_ENV_SIZE SZ_8K
  176. #define CONFIG_ENV_IS_IN_MMC
  177. /* MXC SPI driver support */
  178. #define CONFIG_MXC_SPI
  179. /*
  180. * If want to use nand, define CONFIG_NAND_MXS and rework board
  181. * to support nand, since emmc has pin conflicts with nand
  182. */
  183. #ifdef CONFIG_NAND_MXS
  184. #define CONFIG_CMD_NAND
  185. #define CONFIG_CMD_NAND_TRIMFFS
  186. /* NAND stuff */
  187. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  188. #define CONFIG_SYS_NAND_BASE 0x40000000
  189. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  190. #define CONFIG_SYS_NAND_ONFI_DETECTION
  191. /* DMA stuff, needed for GPMI/MXS NAND support */
  192. #define CONFIG_APBH_DMA
  193. #define CONFIG_APBH_DMA_BURST
  194. #define CONFIG_APBH_DMA_BURST8
  195. #endif
  196. #define CONFIG_ENV_OFFSET (8 * SZ_64K)
  197. #ifdef CONFIG_NAND_MXS
  198. #define CONFIG_SYS_FSL_USDHC_NUM 1
  199. #else
  200. #define CONFIG_SYS_FSL_USDHC_NUM 2
  201. #endif
  202. #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
  203. #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
  204. #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
  205. /* USB Configs */
  206. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  207. #define CONFIG_USB_HOST_ETHER
  208. #define CONFIG_USB_ETHER_ASIX
  209. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  210. #define CONFIG_MXC_USB_FLAGS 0
  211. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  212. #define CONFIG_IMX_THERMAL
  213. #define CONFIG_USBD_HS
  214. #define CONFIG_USB_FUNCTION_MASS_STORAGE
  215. #ifdef CONFIG_VIDEO
  216. #define CONFIG_VIDEO_MXS
  217. #define CONFIG_VIDEO_LOGO
  218. #define CONFIG_SPLASH_SCREEN
  219. #define CONFIG_SPLASH_SCREEN_ALIGN
  220. #define CONFIG_CMD_BMP
  221. #define CONFIG_BMP_16BPP
  222. #define CONFIG_VIDEO_BMP_RLE8
  223. #define CONFIG_VIDEO_BMP_LOGO
  224. #endif
  225. #ifdef CONFIG_FSL_QSPI
  226. #define CONFIG_SPI_FLASH
  227. #define CONFIG_SPI_FLASH_MACRONIX
  228. #define CONFIG_SPI_FLASH_BAR
  229. #define CONFIG_SF_DEFAULT_BUS 0
  230. #define CONFIG_SF_DEFAULT_CS 0
  231. #define CONFIG_SF_DEFAULT_SPEED 40000000
  232. #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
  233. #define FSL_QSPI_FLASH_NUM 1
  234. #define FSL_QSPI_FLASH_SIZE SZ_64M
  235. #define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
  236. #define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
  237. #endif
  238. #endif /* __CONFIG_H */