mx6sxsabresd.h 6.0 KB

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  1. /*
  2. * Copyright 2014 Freescale Semiconductor, Inc.
  3. *
  4. * Configuration settings for the Freescale i.MX6SX Sabresd board.
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. #include "mx6_common.h"
  11. #ifdef CONFIG_SPL
  12. #include "imx6_spl.h"
  13. #endif
  14. /* Size of malloc() pool */
  15. #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
  16. #define CONFIG_BOARD_EARLY_INIT_F
  17. #define CONFIG_MXC_UART
  18. #define CONFIG_MXC_UART_BASE UART1_BASE
  19. #ifdef CONFIG_IMX_BOOTAUX
  20. /* Set to QSPI2 B flash at default */
  21. #define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
  22. #define UPDATE_M4_ENV \
  23. "m4image=m4_qspi.bin\0" \
  24. "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
  25. "update_m4_from_sd=" \
  26. "if sf probe 1:0; then " \
  27. "if run loadm4image; then " \
  28. "setexpr fw_sz ${filesize} + 0xffff; " \
  29. "setexpr fw_sz ${fw_sz} / 0x10000; " \
  30. "setexpr fw_sz ${fw_sz} * 0x10000; " \
  31. "sf erase 0x0 ${fw_sz}; " \
  32. "sf write ${loadaddr} 0x0 ${filesize}; " \
  33. "fi; " \
  34. "fi\0" \
  35. "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
  36. #else
  37. #define UPDATE_M4_ENV ""
  38. #endif
  39. #define CONFIG_EXTRA_ENV_SETTINGS \
  40. UPDATE_M4_ENV \
  41. "script=boot.scr\0" \
  42. "image=zImage\0" \
  43. "console=ttymxc0\0" \
  44. "fdt_high=0xffffffff\0" \
  45. "initrd_high=0xffffffff\0" \
  46. "fdt_file=imx6sx-sdb.dtb\0" \
  47. "fdt_addr=0x88000000\0" \
  48. "boot_fdt=try\0" \
  49. "ip_dyn=yes\0" \
  50. "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
  51. "mmcdev=2\0" \
  52. "mmcpart=1\0" \
  53. "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
  54. "mmcargs=setenv bootargs console=${console},${baudrate} " \
  55. "root=${mmcroot}\0" \
  56. "loadbootscript=" \
  57. "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  58. "bootscript=echo Running bootscript from mmc ...; " \
  59. "source\0" \
  60. "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
  61. "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
  62. "mmcboot=echo Booting from mmc ...; " \
  63. "run mmcargs; " \
  64. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  65. "if run loadfdt; then " \
  66. "bootz ${loadaddr} - ${fdt_addr}; " \
  67. "else " \
  68. "if test ${boot_fdt} = try; then " \
  69. "bootz; " \
  70. "else " \
  71. "echo WARN: Cannot load the DT; " \
  72. "fi; " \
  73. "fi; " \
  74. "else " \
  75. "bootz; " \
  76. "fi;\0" \
  77. "netargs=setenv bootargs console=${console},${baudrate} " \
  78. "root=/dev/nfs " \
  79. "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
  80. "netboot=echo Booting from net ...; " \
  81. "run netargs; " \
  82. "if test ${ip_dyn} = yes; then " \
  83. "setenv get_cmd dhcp; " \
  84. "else " \
  85. "setenv get_cmd tftp; " \
  86. "fi; " \
  87. "${get_cmd} ${image}; " \
  88. "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
  89. "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
  90. "bootz ${loadaddr} - ${fdt_addr}; " \
  91. "else " \
  92. "if test ${boot_fdt} = try; then " \
  93. "bootz; " \
  94. "else " \
  95. "echo WARN: Cannot load the DT; " \
  96. "fi; " \
  97. "fi; " \
  98. "else " \
  99. "bootz; " \
  100. "fi;\0"
  101. #define CONFIG_BOOTCOMMAND \
  102. "mmc dev ${mmcdev};" \
  103. "mmc dev ${mmcdev}; if mmc rescan; then " \
  104. "if run loadbootscript; then " \
  105. "run bootscript; " \
  106. "else " \
  107. "if run loadimage; then " \
  108. "run mmcboot; " \
  109. "else run netboot; " \
  110. "fi; " \
  111. "fi; " \
  112. "else run netboot; fi"
  113. /* Miscellaneous configurable options */
  114. #define CONFIG_SYS_MEMTEST_START 0x80000000
  115. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000)
  116. #define CONFIG_STACKSIZE SZ_128K
  117. /* Physical Memory Map */
  118. #define CONFIG_NR_DRAM_BANKS 1
  119. #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
  120. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
  121. #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
  122. #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
  123. #define CONFIG_SYS_INIT_SP_OFFSET \
  124. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  125. #define CONFIG_SYS_INIT_SP_ADDR \
  126. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  127. /* MMC Configuration */
  128. #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
  129. /* I2C Configs */
  130. #define CONFIG_SYS_I2C
  131. #define CONFIG_SYS_I2C_MXC
  132. #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
  133. #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
  134. #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
  135. #define CONFIG_SYS_I2C_SPEED 100000
  136. /* PMIC */
  137. #define CONFIG_POWER
  138. #define CONFIG_POWER_I2C
  139. #define CONFIG_POWER_PFUZE100
  140. #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
  141. /* Network */
  142. #define CONFIG_FEC_MXC
  143. #define CONFIG_MII
  144. #define IMX_FEC_BASE ENET_BASE_ADDR
  145. #define CONFIG_FEC_MXC_PHYADDR 0x1
  146. #define CONFIG_FEC_XCV_TYPE RGMII
  147. #define CONFIG_ETHPRIME "FEC"
  148. #define CONFIG_PHYLIB
  149. #define CONFIG_PHY_ATHEROS
  150. #ifdef CONFIG_CMD_USB
  151. #define CONFIG_USB_EHCI
  152. #define CONFIG_USB_EHCI_MX6
  153. #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  154. #define CONFIG_USB_HOST_ETHER
  155. #define CONFIG_USB_ETHER_ASIX
  156. #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
  157. #define CONFIG_MXC_USB_FLAGS 0
  158. #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  159. #endif
  160. #define CONFIG_CMD_PCI
  161. #ifdef CONFIG_CMD_PCI
  162. #define CONFIG_PCI_SCAN_SHOW
  163. #define CONFIG_PCIE_IMX
  164. #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 0)
  165. #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 1)
  166. #endif
  167. #define CONFIG_IMX_THERMAL
  168. #ifdef CONFIG_FSL_QSPI
  169. #define CONFIG_SYS_FSL_QSPI_LE
  170. #define CONFIG_SYS_FSL_QSPI_AHB
  171. #ifdef CONFIG_MX6SX_SABRESD_REVA
  172. #define FSL_QSPI_FLASH_SIZE SZ_16M
  173. #else
  174. #define FSL_QSPI_FLASH_SIZE SZ_32M
  175. #endif
  176. #define FSL_QSPI_FLASH_NUM 2
  177. #endif
  178. #ifndef CONFIG_SPL_BUILD
  179. #ifdef CONFIG_VIDEO
  180. #define CONFIG_VIDEO_MXS
  181. #define CONFIG_VIDEO_LOGO
  182. #define CONFIG_SPLASH_SCREEN
  183. #define CONFIG_SPLASH_SCREEN_ALIGN
  184. #define CONFIG_CMD_BMP
  185. #define CONFIG_BMP_16BPP
  186. #define CONFIG_VIDEO_BMP_RLE8
  187. #define CONFIG_VIDEO_BMP_LOGO
  188. #define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
  189. #endif
  190. #endif
  191. #define CONFIG_ENV_OFFSET (8 * SZ_64K)
  192. #define CONFIG_ENV_SIZE SZ_8K
  193. #define CONFIG_ENV_IS_IN_MMC
  194. #define CONFIG_SYS_FSL_USDHC_NUM 3
  195. #if defined(CONFIG_ENV_IS_IN_MMC)
  196. #define CONFIG_SYS_MMC_ENV_DEV 2 /*USDHC4*/
  197. #endif
  198. #endif /* __CONFIG_H */