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csu3_am335x
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board-support
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u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04
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include
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configs
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gose.h

gose.h 2.3 KB
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  1. /*
    2. 

  2.  * include/configs/gose.h
    3. 

  3.  *
    4. 

  4.  * Copyright (C) 2014 Renesas Electronics Corporation
    5. 

  5.  *
    6. 

  6.  * SPDX-License-Identifier: GPL-2.0
    7. 

  7.  */
    8. 

  8. 

  9. #ifndef __GOSE_H
    10. 

  10. #define __GOSE_H
    11. 

  11. 

  12. #undef DEBUG
    13. 

  13. #define CONFIG_R8A7793
    14. 

  14. #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose"
    15. 

  15. 

  16. #include "rcar-gen2-common.h"
    17. 

  17. 

  18. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
    19. 

  19. #define CONFIG_SYS_TEXT_BASE	0x70000000
    20. 

  20. #else
    21. 

  21. #define CONFIG_SYS_TEXT_BASE	0xE6304000
    22. 

  22. #endif
    23. 

  23. 

  24. /* STACK */
    25. 

  25. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
    26. 

  26. #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
    27. 

  27. #else
    28. 

  28. #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
    29. 

  29. #endif
    30. 

  30. 

  31. #define STACK_AREA_SIZE			0xC000
    32. 

  32. #define LOW_LEVEL_MERAM_STACK	\
    33. 

  33. 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
    34. 

  34. 

  35. /* MEMORY */
    36. 

  36. #define RCAR_GEN2_SDRAM_BASE		0x40000000
    37. 

  37. #define RCAR_GEN2_SDRAM_SIZE		0x40000000
    38. 

  38. #define RCAR_GEN2_UBOOT_SDRAM_SIZE	0x20000000
    39. 

  39. 

  40. /* SCIF */
    41. 

  41. #define CONFIG_SCIF_CONSOLE
    42. 

  42. 

  43. /* FLASH */
    44. 

  44. #define CONFIG_SYS_NO_FLASH
    45. 

  45. #define CONFIG_SPI
    46. 

  46. #define CONFIG_SH_QSPI
    47. 

  47. 

  48. /* SH Ether */
    49. 

  49. #define CONFIG_SH_ETHER
    50. 

  50. #define CONFIG_SH_ETHER_USE_PORT	0
    51. 

  51. #define CONFIG_SH_ETHER_PHY_ADDR	0x1
    52. 

  52. #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
    53. 

  53. #define CONFIG_SH_ETHER_CACHE_WRITEBACK
    54. 

  54. #define CONFIG_SH_ETHER_CACHE_INVALIDATE
    55. 

  55. #define CONFIG_PHYLIB
    56. 

  56. #define CONFIG_PHY_MICREL
    57. 

  57. #define CONFIG_BITBANGMII
    58. 

  58. #define CONFIG_BITBANGMII_MULTI
    59. 

  59. #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
    60. 

  60. 

  61. /* Board Clock */
    62. 

  62. #define RMOBILE_XTAL_CLK	20000000u
    63. 

  63. #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
    64. 

  64. #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
    65. 

  65. #define CONFIG_SYS_TMU_CLK_DIV	4
    66. 

  66. 

  67. /* I2C */
    68. 

  68. #define CONFIG_SYS_I2C
    69. 

  69. #define CONFIG_SYS_I2C_SH
    70. 

  70. #define CONFIG_SYS_I2C_SLAVE	0x7F
    71. 

  71. #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
    72. 

  72. #define CONFIG_SYS_I2C_SH_SPEED0	400000
    73. 

  73. #define CONFIG_SYS_I2C_SH_SPEED1	400000
    74. 

  74. #define CONFIG_SYS_I2C_SH_SPEED2	400000
    75. 

  75. #define CONFIG_SH_I2C_DATA_HIGH	4
    76. 

  76. #define CONFIG_SH_I2C_DATA_LOW	5
    77. 

  77. #define CONFIG_SH_I2C_CLOCK	10000000
    78. 

  78. 

  79. #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
    80. 

  80. 

  81. /* USB */
    82. 

  82. #define CONFIG_USB_EHCI
    83. 

  83. #define CONFIG_USB_EHCI_RMOBILE
    84. 

  84. #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
    85. 

  85. 

  86. /* Module stop status bits */
    87. 

  87. /* INTC-RT */
    88. 

  88. #define CONFIG_SMSTP0_ENA	0x00400000
    89. 

  89. /* MSIF */
    90. 

  90. #define CONFIG_SMSTP2_ENA	0x00002000
    91. 

  91. /* INTC-SYS, IRQC */
    92. 

  92. #define CONFIG_SMSTP4_ENA	0x00000180
    93. 

  93. /* SCIF0 */
    94. 

  94. #define CONFIG_SMSTP7_ENA	0x00200000
    95. 

  95. 

  96. /* SDHI */
    97. 

  97. #define CONFIG_GENERIC_MMC
    98. 

  98. #define CONFIG_SH_SDHI_FREQ		97500000
    99. 

  99. 

  100. #endif	/* __GOSE_H */
    101.