dbau1x00.h 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202
  1. /*
  2. * (C) Copyright 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. /*
  8. * This file contains the configuration parameters for the dbau1x00 board.
  9. */
  10. #ifndef __CONFIG_H
  11. #define __CONFIG_H
  12. #define CONFIG_DBAU1X00 1
  13. #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */
  14. #ifdef CONFIG_DBAU1000
  15. /* Also known as Merlot */
  16. #define CONFIG_SOC_AU1000 1
  17. #else
  18. #ifdef CONFIG_DBAU1100
  19. #define CONFIG_SOC_AU1100 1
  20. #else
  21. #ifdef CONFIG_DBAU1500
  22. #define CONFIG_SOC_AU1500 1
  23. #else
  24. #ifdef CONFIG_DBAU1550
  25. /* Cabernet */
  26. #define CONFIG_SOC_AU1550 1
  27. #else
  28. #error "No valid board set"
  29. #endif
  30. #endif
  31. #endif
  32. #endif
  33. #define CONFIG_BAUDRATE 115200
  34. /* valid baudrates */
  35. #define CONFIG_TIMESTAMP /* Print image info with timestamp */
  36. #undef CONFIG_BOOTARGS
  37. #define CONFIG_EXTRA_ENV_SETTINGS \
  38. "addmisc=setenv bootargs ${bootargs} " \
  39. "console=ttyS0,${baudrate} " \
  40. "panic=1\0" \
  41. "bootfile=/tftpboot/vmlinux.srec\0" \
  42. "load=tftp 80500000 ${u-boot}\0" \
  43. ""
  44. #ifdef CONFIG_DBAU1550
  45. /* Boot from flash by default, revert to bootp */
  46. #define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
  47. #else /* CONFIG_DBAU1550 */
  48. #define CONFIG_BOOTCOMMAND "bootp;bootm"
  49. #endif /* CONFIG_DBAU1550 */
  50. /*
  51. * BOOTP options
  52. */
  53. #define CONFIG_BOOTP_BOOTFILESIZE
  54. #define CONFIG_BOOTP_BOOTPATH
  55. #define CONFIG_BOOTP_GATEWAY
  56. #define CONFIG_BOOTP_HOSTNAME
  57. /*
  58. * Command line configuration.
  59. */
  60. #undef CONFIG_CMD_BEDBUG
  61. #ifdef CONFIG_DBAU1550
  62. #undef CONFIG_CMD_IDE
  63. #undef CONFIG_CMD_PCMCIA
  64. #else
  65. #define CONFIG_CMD_IDE
  66. #endif
  67. /*
  68. * Miscellaneous configurable options
  69. */
  70. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  71. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  72. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  73. #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/
  74. #define CONFIG_SYS_MALLOC_LEN 128*1024
  75. #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
  76. #define CONFIG_SYS_MHZ 396
  77. #if (CONFIG_SYS_MHZ % 12) != 0
  78. #error "Invalid CPU frequency - must be multiple of 12!"
  79. #endif
  80. #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
  81. #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
  82. #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */
  83. #define CONFIG_SYS_MEMTEST_START 0x80100000
  84. #define CONFIG_SYS_MEMTEST_END 0x80800000
  85. /*-----------------------------------------------------------------------
  86. * FLASH and environment organization
  87. */
  88. #ifdef CONFIG_DBAU1550
  89. #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
  90. #define CONFIG_SYS_MAX_FLASH_SECT (512) /* max number of sectors on one chip */
  91. #define PHYS_FLASH_1 0xb8000000 /* Flash Bank #1 */
  92. #define PHYS_FLASH_2 0xbc000000 /* Flash Bank #2 */
  93. #else /* CONFIG_DBAU1550 */
  94. #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */
  95. #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
  96. #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */
  97. #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */
  98. #endif /* CONFIG_DBAU1550 */
  99. #define CONFIG_SYS_FLASH_BANKS_LIST {PHYS_FLASH_1, PHYS_FLASH_2}
  100. #define CONFIG_SYS_FLASH_CFI 1
  101. #define CONFIG_FLASH_CFI_DRIVER 1
  102. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  103. #define CONFIG_SYS_MONITOR_LEN (192 << 10)
  104. #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
  105. /* We boot from this flash, selected with dip switch */
  106. #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2
  107. /* timeout values are in ticks */
  108. #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */
  109. #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */
  110. #define CONFIG_ENV_IS_NOWHERE 1
  111. /* Address and size of Primary Environment Sector */
  112. #define CONFIG_ENV_ADDR 0xB0030000
  113. #define CONFIG_ENV_SIZE 0x10000
  114. #define CONFIG_FLASH_16BIT
  115. #define CONFIG_NR_DRAM_BANKS 2
  116. #ifdef CONFIG_DBAU1550
  117. #define MEM_SIZE 192
  118. #else
  119. #define MEM_SIZE 64
  120. #endif
  121. #define CONFIG_MEMSIZE_IN_BYTES
  122. #ifndef CONFIG_DBAU1550
  123. /*---ATA PCMCIA ------------------------------------*/
  124. #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */
  125. #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000
  126. #define CONFIG_PCMCIA_SLOT_A
  127. #define CONFIG_ATAPI 1
  128. #define CONFIG_MAC_PARTITION 1
  129. /* We run CF in "true ide" mode or a harddrive via pcmcia */
  130. #define CONFIG_IDE_PCMCIA 1
  131. /* We only support one slot for now */
  132. #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
  133. #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
  134. #undef CONFIG_IDE_LED /* LED for ide not supported */
  135. #undef CONFIG_IDE_RESET /* reset for ide not supported */
  136. #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
  137. #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR
  138. /* Offset for data I/O */
  139. #define CONFIG_SYS_ATA_DATA_OFFSET 8
  140. /* Offset for normal register accesses */
  141. #define CONFIG_SYS_ATA_REG_OFFSET 0
  142. /* Offset for alternate registers */
  143. #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
  144. #endif /* CONFIG_DBAU1550 */
  145. #endif /* __CONFIG_H */