bf533-ezkit.h 2.8 KB

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  1. /*
  2. * U-Boot - Configuration file for BF533 EZKIT board
  3. */
  4. #ifndef __CONFIG_BF533_EZKIT_H__
  5. #define __CONFIG_BF533_EZKIT_H__
  6. #include <asm/config-pre.h>
  7. /*
  8. * Processor Settings
  9. */
  10. #define CONFIG_BFIN_CPU bf533-0.3
  11. #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
  12. /*
  13. * Clock Settings
  14. * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  15. * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  16. */
  17. /* CONFIG_CLKIN_HZ is any value in Hz */
  18. #define CONFIG_CLKIN_HZ 27000000
  19. /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
  20. /* 1 = CLKIN / 2 */
  21. #define CONFIG_CLKIN_HALF 0
  22. /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
  23. /* 1 = bypass PLL */
  24. #define CONFIG_PLL_BYPASS 0
  25. /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
  26. /* Values can range from 0-63 (where 0 means 64) */
  27. #define CONFIG_VCO_MULT 22
  28. /* CCLK_DIV controls the core clock divider */
  29. /* Values can be 1, 2, 4, or 8 ONLY */
  30. #define CONFIG_CCLK_DIV 1
  31. /* SCLK_DIV controls the system clock divider */
  32. /* Values can range from 1-15 */
  33. #define CONFIG_SCLK_DIV 5
  34. /*
  35. * Memory Settings
  36. */
  37. #define CONFIG_MEM_SIZE 32
  38. /* Early EZKITs had 32megs, but later have 64megs */
  39. #if (CONFIG_MEM_SIZE == 64)
  40. # define CONFIG_MEM_ADD_WDTH 10
  41. #else
  42. # define CONFIG_MEM_ADD_WDTH 9
  43. #endif
  44. #define CONFIG_EBIU_SDRRC_VAL 0x398
  45. #define CONFIG_EBIU_SDGCTL_VAL 0x91118d
  46. #define CONFIG_EBIU_AMGCTL_VAL 0xFF
  47. #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
  48. #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
  49. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  50. #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
  51. /*
  52. * Network Settings
  53. */
  54. #define ADI_CMDS_NETWORK 1
  55. #define CONFIG_SMC91111 1
  56. #define CONFIG_SMC91111_BASE 0x20310300
  57. #define SMC91111_EEPROM_INIT() \
  58. do { \
  59. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
  60. bfin_write_FIO_FLAG_C(PF1); \
  61. bfin_write_FIO_FLAG_S(PF0); \
  62. SSYNC(); \
  63. } while (0)
  64. #define CONFIG_HOSTNAME bf533-ezkit
  65. /*
  66. * Flash Settings
  67. */
  68. #define CONFIG_SYS_FLASH_BASE 0x20000000
  69. #define CONFIG_SYS_MAX_FLASH_BANKS 3
  70. #define CONFIG_SYS_MAX_FLASH_SECT 40
  71. #define CONFIG_ENV_IS_IN_FLASH
  72. #define CONFIG_ENV_ADDR 0x20030000
  73. #define CONFIG_ENV_SECT_SIZE 0x10000
  74. #define FLASH_TOT_SECT 40
  75. /*
  76. * I2C Settings
  77. */
  78. #define CONFIG_SYS_I2C_SOFT
  79. #ifdef CONFIG_SYS_I2C_SOFT
  80. #define CONFIG_SYS_I2C
  81. #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
  82. #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
  83. #define CONFIG_SYS_I2C_SOFT_SPEED 50000
  84. #define CONFIG_SYS_I2C_SOFT_SLAVE 0
  85. #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
  86. #endif
  87. /*
  88. * Misc Settings
  89. */
  90. #define CONFIG_MISC_INIT_R
  91. #define CONFIG_RTC_BFIN
  92. #define CONFIG_UART_CONSOLE 0
  93. /*
  94. * Pull in common ADI header for remaining command/environment setup
  95. */
  96. #include <configs/bfin_adi_common.h>
  97. #endif