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csu3_am335x
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board-support
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u-boot-2017.01+gitAUTOINC+340fb36f04-g340fb36f04
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include
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configs
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alt.h

alt.h 2.7 KB
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  1. /*
    2. 

  2.  * include/configs/alt.h
    3. 

  3.  *     This file is alt board configuration.
    4. 

  4.  *
    5. 

  5.  * Copyright (C) 2014 Renesas Electronics Corporation
    6. 

  6.  *
    7. 

  7.  * SPDX-License-Identifier: GPL-2.0
    8. 

  8.  */
    9. 

  9. 

  10. #ifndef __ALT_H
    11. 

  11. #define __ALT_H
    12. 

  12. 

  13. #undef DEBUG
    14. 

  14. #define CONFIG_R8A7794
    15. 

  15. #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Alt"
    16. 

  16. 

  17. #include "rcar-gen2-common.h"
    18. 

  18. 

  19. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
    20. 

  20. #define CONFIG_SYS_TEXT_BASE	0x70000000
    21. 

  21. #else
    22. 

  22. #define CONFIG_SYS_TEXT_BASE	0xE6304000
    23. 

  23. #endif
    24. 

  24. 

  25. #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
    26. 

  26. #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
    27. 

  27. #else
    28. 

  28. #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
    29. 

  29. #endif
    30. 

  30. #define STACK_AREA_SIZE			0xC000
    31. 

  31. #define LOW_LEVEL_MERAM_STACK \
    32. 

  32. 		(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
    33. 

  33. 

  34. /* MEMORY */
    35. 

  35. #define RCAR_GEN2_SDRAM_BASE		0x40000000
    36. 

  36. #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
    37. 

  37. #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
    38. 

  38. 

  39. /* SCIF */
    40. 

  40. #define CONFIG_SCIF_CONSOLE
    41. 

  41. 

  42. /* FLASH */
    43. 

  43. #define CONFIG_SPI
    44. 

  44. #define CONFIG_SH_QSPI
    45. 

  45. #define CONFIG_SPI_FLASH_QUAD
    46. 

  46. #define CONFIG_SYS_NO_FLASH
    47. 

  47. 

  48. /* SH Ether */
    49. 

  49. #define CONFIG_SH_ETHER
    50. 

  50. #define CONFIG_SH_ETHER_USE_PORT	0
    51. 

  51. #define CONFIG_SH_ETHER_PHY_ADDR	0x1
    52. 

  52. #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
    53. 

  53. #define CONFIG_SH_ETHER_CACHE_WRITEBACK
    54. 

  54. #define CONFIG_SH_ETHER_CACHE_INVALIDATE
    55. 

  55. #define CONFIG_SH_ETHER_ALIGNE_SIZE 64
    56. 

  56. #define CONFIG_PHYLIB
    57. 

  57. #define CONFIG_PHY_MICREL
    58. 

  58. #define CONFIG_BITBANGMII
    59. 

  59. #define CONFIG_BITBANGMII_MULTI
    60. 

  60. 

  61. /* Board Clock */
    62. 

  62. #define RMOBILE_XTAL_CLK        20000000u
    63. 

  63. #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
    64. 

  64. #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
    65. 

  65. #define CONFIG_PLL1_CLK_FREQ    (CONFIG_SYS_CLK_FREQ * 156 / 2)
    66. 

  66. #define CONFIG_P_CLK_FREQ	(CONFIG_PLL1_CLK_FREQ / 24)
    67. 

  67. 

  68. #define CONFIG_SYS_TMU_CLK_DIV  4
    69. 

  69. 

  70. /* i2c */
    71. 

  71. #define CONFIG_SYS_I2C
    72. 

  72. #define CONFIG_SYS_I2C_SH
    73. 

  73. #define CONFIG_SYS_I2C_SLAVE		0x7F
    74. 

  74. #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS       3
    75. 

  75. #define CONFIG_SYS_I2C_SH_SPEED0	400000
    76. 

  76. #define CONFIG_SYS_I2C_SH_SPEED1	400000
    77. 

  77. #define CONFIG_SYS_I2C_SH_SPEED2	400000
    78. 

  78. #define CONFIG_SH_I2C_DATA_HIGH		4
    79. 

  79. #define CONFIG_SH_I2C_DATA_LOW		5
    80. 

  80. #define CONFIG_SH_I2C_CLOCK		10000000
    81. 

  81. 

  82. #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
    83. 

  83. 

  84. /* USB */
    85. 

  85. #define CONFIG_USB_EHCI
    86. 

  86. #define CONFIG_USB_EHCI_RMOBILE
    87. 

  87. #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
    88. 

  88. 

  89. /* MMCIF */
    90. 

  90. #define CONFIG_GENERIC_MMC
    91. 

  91. 

  92. #define CONFIG_SH_MMCIF
    93. 

  93. #define CONFIG_SH_MMCIF_ADDR		0xee200000
    94. 

  94. #define CONFIG_SH_MMCIF_CLK		48000000
    95. 

  95. 

  96. /* Module stop status bits */
    97. 

  97. /* INTC-RT */
    98. 

  98. #define CONFIG_SMSTP0_ENA	0x00400000
    99. 

  99. /* MSIF */
    100. 

  100. #define CONFIG_SMSTP2_ENA	0x00002000
    101. 

  101. /* INTC-SYS, IRQC */
    102. 

  102. #define CONFIG_SMSTP4_ENA	0x00000180
    103. 

  103. /* SCIF2 */
    104. 

  104. #define CONFIG_SMSTP7_ENA	0x00080000
    105. 

  105. 

  106. /* SDHI */
    107. 

  107. #define CONFIG_SH_SDHI_FREQ		97500000
    108. 

  108. 

  109. #endif /* __ALT_H */
    110.