README.rockchip 9.9 KB

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  1. #
  2. # Copyright (C) 2015 Google. Inc
  3. # Written by Simon Glass <sjg@chromium.org>
  4. #
  5. # SPDX-License-Identifier: GPL-2.0+
  6. #
  7. U-Boot on Rockchip
  8. ==================
  9. There are several repositories available with versions of U-Boot that support
  10. many Rockchip devices [1] [2].
  11. The current mainline support is experimental only and is not useful for
  12. anything. It should provide a base on which to build.
  13. So far only support for the RK3288 and RK3036 is provided.
  14. Prerequisites
  15. =============
  16. You will need:
  17. - Firefly RK3288 board or something else with a supported RockChip SoC
  18. - Power connection to 5V using the supplied micro-USB power cable
  19. - Separate USB serial cable attached to your computer and the Firefly
  20. (connect to the micro-USB connector below the logo)
  21. - rkflashtool [3]
  22. - openssl (sudo apt-get install openssl)
  23. - Serial UART connection [4]
  24. - Suitable ARM cross compiler, e.g.:
  25. sudo apt-get install gcc-4.7-arm-linux-gnueabi
  26. Building
  27. ========
  28. At present seven RK3288 boards are supported:
  29. - EVB RK3288 - use evb-rk3288 configuration
  30. - Fennec RK3288 - use fennec-rk3288 configuration
  31. - Firefly RK3288 - use firefly-rk3288 configuration
  32. - Hisense Chromebook - use chromebook_jerry configuration
  33. - Miniarm RK3288 - use miniarm-rk3288 configuration
  34. - PopMetal RK3288 - use popmetal-rk3288 configuration
  35. - Radxa Rock 2 - use rock2 configuration
  36. Two RK3036 board are supported:
  37. - EVB RK3036 - use evb-rk3036 configuration
  38. - Kylin - use kylin_rk3036 configuration
  39. For example:
  40. CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
  41. (or you can use another cross compiler if you prefer)
  42. Writing to the board with USB
  43. =============================
  44. For USB to work you must get your board into ROM boot mode, either by erasing
  45. your MMC or (perhaps) holding the recovery button when you boot the board.
  46. To erase your MMC, you can boot into Linux and type (as root)
  47. dd if=/dev/zero of=/dev/mmcblk0 bs=1M
  48. Connect your board's OTG port to your computer.
  49. To create a suitable image and write it to the board:
  50. ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
  51. ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  52. cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
  53. If all goes well you should something like:
  54. U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
  55. Card did not respond to voltage select!
  56. spl: mmc init failed with error: -17
  57. ### ERROR ### Please RESET the board ###
  58. You will need to reset the board before each time you try. Yes, that's all
  59. it does so far. If support for the Rockchip USB protocol or DFU were added
  60. in SPL then we could in principle load U-Boot and boot to a prompt from USB
  61. as several other platforms do. However it does not seem to be possible to
  62. use the existing boot ROM code from SPL.
  63. Booting from an SD card
  64. =======================
  65. To write an image that boots from an SD card (assumed to be /dev/sdc):
  66. ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  67. firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  68. sudo dd if=out of=/dev/sdc seek=64 && \
  69. sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
  70. This puts the Rockchip header and SPL image first and then places the U-Boot
  71. image at block 256 (i.e. 128KB from the start of the SD card). This
  72. corresponds with this setting in U-Boot:
  73. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
  74. Put this SD (or micro-SD) card into your board and reset it. You should see
  75. something like:
  76. U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
  77. Model: Radxa Rock 2 Square
  78. DRAM: 2 GiB
  79. MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
  80. *** Warning - bad CRC, using default environment
  81. In: serial
  82. Out: vop@ff940000.vidconsole
  83. Err: serial
  84. Net: Net Initialization Skipped
  85. No ethernet found.
  86. Hit any key to stop autoboot: 0
  87. =>
  88. The rockchip bootrom can load and boot an initial spl, then continue to
  89. load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
  90. Therefore RK3288 has another loading sequence like RK3036. The option of
  91. U-Boot is controlled with this setting in U-Boot:
  92. #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
  93. You can create the image via the following operations:
  94. ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
  95. firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
  96. cat firefly-rk3288/u-boot-dtb.bin >> out && \
  97. sudo dd if=out of=/dev/sdc seek=64
  98. If you have an HDMI cable attached you should see a video console.
  99. For evb_rk3036 board:
  100. ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
  101. cat evb-rk3036/u-boot-dtb.bin >> out && \
  102. sudo dd if=out of=/dev/sdc seek=64
  103. Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
  104. debug uart must be disabled
  105. Using fastboot on rk3288
  106. ========================
  107. - Write GPT partition layout to mmc device which fastboot want to use it to
  108. store the image
  109. => gpt write mmc 1 $partitions
  110. - Invoke fastboot command to prepare
  111. => fastboot 1
  112. - Start fastboot request on PC
  113. fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin
  114. You should see something like:
  115. => fastboot 1
  116. WARNING: unknown variable: partition-type:loader
  117. Starting download of 357796 bytes
  118. ..
  119. downloading of 357796 bytes finished
  120. Flashing Raw Image
  121. ........ wrote 357888 bytes to 'loader'
  122. Booting from SPI
  123. ================
  124. To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
  125. ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
  126. -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
  127. dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
  128. cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
  129. dd if=out.bin of=out.bin.pad bs=4M conv=sync
  130. This converts the SPL image to the required SPI format by adding the Rockchip
  131. header and skipping every 2KB block. Then the U-Boot image is written at
  132. offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
  133. The position of U-Boot is controlled with this setting in U-Boot:
  134. #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
  135. If you have a Dediprog em100pro connected then you can write the image with:
  136. sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
  137. When booting you should see something like:
  138. U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
  139. U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
  140. Model: Google Jerry
  141. DRAM: 2 GiB
  142. MMC:
  143. Using default environment
  144. In: serial@ff690000
  145. Out: serial@ff690000
  146. Err: serial@ff690000
  147. =>
  148. Future work
  149. ===========
  150. Immediate priorities are:
  151. - USB host
  152. - USB device
  153. - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
  154. - Ethernet
  155. - NAND flash
  156. - Support for other Rockchip parts
  157. - Boot U-Boot proper over USB OTG (at present only SPL works)
  158. Development Notes
  159. =================
  160. There are plenty of patches in the links below to help with this work.
  161. [1] https://github.com/rkchrome/uboot.git
  162. [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
  163. [3] https://github.com/linux-rockchip/rkflashtool.git
  164. [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
  165. rkimage
  166. -------
  167. rkimage.c produces an SPL image suitable for sending directly to the boot ROM
  168. over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
  169. followed by u-boot-spl-dtb.bin.
  170. The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
  171. starts at 0xff700000 and extends to 0xff718000 where we put the stack.
  172. rksd
  173. ----
  174. rksd.c produces an image consisting of 32KB of empty space, a header and
  175. u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
  176. most of the fields are unused by U-Boot. We just need to specify the
  177. signature, a flag and the block offset and size of the SPL image.
  178. The header occupies a single block but we pad it out to 4 blocks. The header
  179. is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
  180. image can be encoded too but we don't do that.
  181. The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
  182. or 0x40 blocks. This is a severe and annoying limitation. There may be a way
  183. around this limitation, since there is plenty of SRAM, but at present the
  184. board refuses to boot if this limit is exceeded.
  185. The image produced is padded up to a block boundary (512 bytes). It should be
  186. written to the start of an SD card using dd.
  187. Since this image is set to load U-Boot from the SD card at block offset,
  188. CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
  189. u-boot-dtb.img to the SD card at that offset. See above for instructions.
  190. rkspi
  191. -----
  192. rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
  193. resulting image is then spread out so that only the first 2KB of each 4KB
  194. sector is used. The header is the same as with rksd and the maximum size is
  195. also 32KB (before spreading). The image should be written to the start of
  196. SPI flash.
  197. See above for instructions on how to write a SPI image.
  198. rkmux.py
  199. --------
  200. You can use this script to create #defines for SoC register access. See the
  201. script for usage.
  202. Device tree and driver model
  203. ----------------------------
  204. Where possible driver model is used to provide a structure to the
  205. functionality. Device tree is used for configuration. However these have an
  206. overhead and in SPL with a 32KB size limit some shortcuts have been taken.
  207. In general all Rockchip drivers should use these features, with SPL-specific
  208. modifications where required.
  209. GPT partition layout
  210. ----------------------------
  211. Rockchip use a unified GPT partition layout in open source support.
  212. With this GPT partition layout, uboot can be compatilbe with other components,
  213. like miniloader, trusted-os, arm-trust-firmware.
  214. There are some documents about partitions in the links below.
  215. http://rockchip.wikidot.com/partitions
  216. --
  217. Simon Glass <sjg@chromium.org>
  218. 24 June 2015