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- /*
- * (C) Copyright 2008
- * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
- * This work has been supported by: QTechnology http://qtec.com/
- * based on xparameters-ml507.h by Xilinx
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
- #ifndef XPARAMETER_H
- #define XPARAMETER_H
- #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000
- #define XPAR_IIC_EEPROM_BASEADDR 0x81600000
- #define XPAR_INTC_0_BASEADDR 0x81800000
- #define XPAR_SPI_0_BASEADDR 0x83400000
- #define XPAR_FLASH_MEM0_BASEADDR 0xFE000000
- #define XPAR_PLB_CLOCK_FREQ_HZ 100000000
- #define XPAR_CORE_CLOCK_FREQ_HZ 400000000
- #define XPAR_INTC_MAX_NUM_INTR_INPUTS 32
- #define XPAR_SPI_0_NUM_TRANSFER_BITS 8
- #define XPAR_UARTNS550_0_CLOCK_FREQ_HZ 100000000
- #endif
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