exynos5-dt.c 4.4 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <dwc3-uboot.h>
  9. #include <fdtdec.h>
  10. #include <asm/io.h>
  11. #include <errno.h>
  12. #include <i2c.h>
  13. #include <mmc.h>
  14. #include <netdev.h>
  15. #include <samsung-usb-phy-uboot.h>
  16. #include <spi.h>
  17. #include <usb.h>
  18. #include <video_bridge.h>
  19. #include <asm/gpio.h>
  20. #include <asm/arch/cpu.h>
  21. #include <asm/arch/dwmmc.h>
  22. #include <asm/arch/mmc.h>
  23. #include <asm/arch/pinmux.h>
  24. #include <asm/arch/power.h>
  25. #include <asm/arch/sromc.h>
  26. #include <power/pmic.h>
  27. #include <power/max77686_pmic.h>
  28. #include <power/regulator.h>
  29. #include <power/s2mps11.h>
  30. #include <power/s5m8767.h>
  31. #include <samsung/exynos5-dt-types.h>
  32. #include <samsung/misc.h>
  33. #include <tmu.h>
  34. DECLARE_GLOBAL_DATA_PTR;
  35. static void board_enable_audio_codec(void)
  36. {
  37. int node, ret;
  38. struct gpio_desc en_gpio;
  39. node = fdtdec_next_compatible(gd->fdt_blob, 0,
  40. COMPAT_SAMSUNG_EXYNOS5_SOUND);
  41. if (node <= 0)
  42. return;
  43. ret = gpio_request_by_name_nodev(gd->fdt_blob, node,
  44. "codec-enable-gpio", 0, &en_gpio,
  45. GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
  46. if (ret == -FDT_ERR_NOTFOUND)
  47. return;
  48. /* Turn on the GPIO which connects to the codec's "enable" line. */
  49. gpio_set_pull(gpio_get_number(&en_gpio), S5P_GPIO_PULL_NONE);
  50. #ifdef CONFIG_SOUND_MAX98095
  51. /* Enable MAX98095 Codec */
  52. gpio_request(EXYNOS5_GPIO_X17, "max98095_enable");
  53. gpio_direction_output(EXYNOS5_GPIO_X17, 1);
  54. gpio_set_pull(EXYNOS5_GPIO_X17, S5P_GPIO_PULL_NONE);
  55. #endif
  56. }
  57. int exynos_init(void)
  58. {
  59. board_enable_audio_codec();
  60. return 0;
  61. }
  62. static int exynos_set_regulator(const char *name, uint uv)
  63. {
  64. struct udevice *dev;
  65. int ret;
  66. ret = regulator_get_by_platname(name, &dev);
  67. if (ret) {
  68. debug("%s: Cannot find regulator %s\n", __func__, name);
  69. return ret;
  70. }
  71. ret = regulator_set_value(dev, uv);
  72. if (ret) {
  73. debug("%s: Cannot set regulator %s\n", __func__, name);
  74. return ret;
  75. }
  76. return 0;
  77. }
  78. int exynos_power_init(void)
  79. {
  80. struct udevice *dev;
  81. int ret;
  82. ret = pmic_get("max77686", &dev);
  83. if (!ret) {
  84. /* TODO(sjg@chromium.org): Move into the clock/pmic API */
  85. ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_32KHZ, 0,
  86. MAX77686_32KHCP_EN);
  87. if (ret)
  88. return ret;
  89. ret = pmic_clrsetbits(dev, MAX77686_REG_PMIC_BBAT, 0,
  90. MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V);
  91. if (ret)
  92. return ret;
  93. } else {
  94. ret = pmic_get("s5m8767-pmic", &dev);
  95. /* TODO(sjg@chromium.org): Use driver model to access clock */
  96. #ifdef CONFIG_PMIC_S5M8767
  97. if (!ret)
  98. s5m8767_enable_32khz_cp(dev);
  99. #endif
  100. }
  101. if (ret == -ENODEV)
  102. return 0;
  103. ret = regulators_enable_boot_on(false);
  104. if (ret)
  105. return ret;
  106. ret = exynos_set_regulator("vdd_mif", 1100000);
  107. if (ret)
  108. return ret;
  109. /*
  110. * This would normally be 1.3V, but since we are running slowly 1.1V
  111. * is enough. For spring it helps reduce CPU temperature and avoid
  112. * hangs with the case open. 1.1V is minimum voltage borderline for
  113. * chained bootloaders.
  114. */
  115. ret = exynos_set_regulator("vdd_arm", 1100000);
  116. if (ret)
  117. return ret;
  118. ret = exynos_set_regulator("vdd_int", 1012500);
  119. if (ret)
  120. return ret;
  121. ret = exynos_set_regulator("vdd_g3d", 1200000);
  122. if (ret)
  123. return ret;
  124. return 0;
  125. }
  126. int board_get_revision(void)
  127. {
  128. return 0;
  129. }
  130. #ifdef CONFIG_USB_DWC3
  131. static struct dwc3_device dwc3_device_data = {
  132. .maximum_speed = USB_SPEED_SUPER,
  133. .base = 0x12400000,
  134. .dr_mode = USB_DR_MODE_PERIPHERAL,
  135. .index = 0,
  136. };
  137. int usb_gadget_handle_interrupts(void)
  138. {
  139. dwc3_uboot_handle_interrupt(0);
  140. return 0;
  141. }
  142. int board_usb_init(int index, enum usb_init_type init)
  143. {
  144. struct exynos_usb3_phy *phy = (struct exynos_usb3_phy *)
  145. samsung_get_base_usb3_phy();
  146. if (!phy) {
  147. error("usb3 phy not supported");
  148. return -ENODEV;
  149. }
  150. set_usbdrd_phy_ctrl(POWER_USB_DRD_PHY_CTRL_EN);
  151. exynos5_usb3_phy_init(phy);
  152. return dwc3_uboot_init(&dwc3_device_data);
  153. }
  154. #endif
  155. #ifdef CONFIG_SET_DFU_ALT_INFO
  156. char *get_dfu_alt_system(char *interface, char *devstr)
  157. {
  158. char *info = "Not supported!";
  159. if (board_is_odroidxu4())
  160. return info;
  161. return getenv("dfu_alt_system");
  162. }
  163. char *get_dfu_alt_boot(char *interface, char *devstr)
  164. {
  165. char *info = "Not supported!";
  166. struct mmc *mmc;
  167. char *alt_boot;
  168. int dev_num;
  169. if (board_is_odroidxu4())
  170. return info;
  171. dev_num = simple_strtoul(devstr, NULL, 10);
  172. mmc = find_mmc_device(dev_num);
  173. if (!mmc)
  174. return NULL;
  175. if (mmc_init(mmc))
  176. return NULL;
  177. if (IS_SD(mmc))
  178. alt_boot = CONFIG_DFU_ALT_BOOT_SD;
  179. else
  180. alt_boot = CONFIG_DFU_ALT_BOOT_EMMC;
  181. return alt_boot;
  182. }
  183. #endif