k4h511638c.h 391 B

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  1. /*
  2. * Copyright (C) 2007 Semihalf
  3. * Written by Marian Balakowicz <m8@semihalf.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #define SDRAM_DDR 1 /* is DDR */
  8. /* Settings for XLB = 132 MHz */
  9. #define SDRAM_MODE 0x018D0000
  10. #define SDRAM_EMODE 0x40090000
  11. #define SDRAM_CONTROL 0x714F0F00
  12. #define SDRAM_CONFIG1 0x73722930
  13. #define SDRAM_CONFIG2 0x46770000
  14. #define SDRAM_TAPDELAY 0x10000000