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- /*
- * (C) Copyright 2009
- * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
- *
- * Based on board/amcc/canyonlands/init.S
- * (C) Copyright 2008
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
- #include <asm-offsets.h>
- #include <ppc_asm.tmpl>
- #include <config.h>
- #include <asm/mmu.h>
- /**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
- .section .bootpg,"ax"
- .globl tlbtab
- tlbtab:
- tlbtab_start
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to
- * use the speed up boot process. It is patched after relocation to
- * enable SA_I
- */
- tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR,
- 4, AC_RWX | SA_G) /* TLB 0 */
- /*
- * TLB entries for SDRAM are not needed on this platform.
- * They are dynamically generated in the SPD DDR(2) detection
- * routine.
- */
- #ifdef CONFIG_SYS_INIT_RAM_DCACHE
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR,
- 0, AC_RWX | SA_G)
- #endif
- tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC,
- AC_RW | SA_IG)
- tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC,
- AC_RW | SA_IG)
- /* TLB-entry for NVRAM */
- tlbentry(CONFIG_SYS_NVRAM_BASE, SZ_1M, CONFIG_SYS_NVRAM_BASE, 4,
- AC_RW | SA_IG)
- /* TLB-entry for UART */
- tlbentry(CONFIG_SYS_UART_BASE, SZ_16K, CONFIG_SYS_UART_BASE, 4,
- AC_RW | SA_IG)
- /* TLB-entry for IO */
- tlbentry(CONFIG_SYS_IO_BASE, SZ_16K, CONFIG_SYS_IO_BASE, 4,
- AC_RW | SA_IG)
- /* TLB-entry for OCM */
- tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4,
- AC_RWX | SA_I)
- /* TLB-entry for Local Configuration registers => peripherals */
- tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS,
- 4, AC_RWX | SA_IG)
- /* AHB: Internal USB Peripherals (USB, SATA) */
- tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4,
- AC_RWX | SA_IG)
- tlbtab_end
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