ddr.c 832 B

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #include <common.h>
  7. #include <fsl_ddr_sdram.h>
  8. #include <fsl_ddr_dimm_params.h>
  9. void fsl_ddr_board_options(memctl_options_t *popts,
  10. dimm_params_t *pdimm,
  11. unsigned int ctrl_num)
  12. {
  13. /*
  14. * Factors to consider for CPO:
  15. * - frequency
  16. * - ddr1 vs. ddr2
  17. */
  18. popts->cpo_override = 0;
  19. /*
  20. * Factors to consider for write data delay:
  21. * - number of DIMMs
  22. *
  23. * 1 = 1/4 clock delay
  24. * 2 = 1/2 clock delay
  25. * 3 = 3/4 clock delay
  26. * 4 = 1 clock delay
  27. * 5 = 5/4 clock delay
  28. * 6 = 3/2 clock delay
  29. */
  30. popts->write_data_delay = 3;
  31. /* 2T timing enable */
  32. popts->twot_en = 1;
  33. /*
  34. * Factors to consider for half-strength driver enable:
  35. * - number of DIMMs installed
  36. */
  37. popts->half_strength_driver_enable = 0;
  38. }