ddr.h 1007 B

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  1. /*
  2. * Copyright 2016 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __DDR_H__
  7. #define __DDR_H__
  8. void erratum_a008850_post(void);
  9. struct board_specific_parameters {
  10. u32 n_ranks;
  11. u32 datarate_mhz_high;
  12. u32 rank_gb;
  13. u32 clk_adjust;
  14. u32 wrlvl_start;
  15. u32 wrlvl_ctl_2;
  16. u32 wrlvl_ctl_3;
  17. };
  18. /*
  19. * These tables contain all valid speeds we want to override with board
  20. * specific parameters. datarate_mhz_high values need to be in ascending order
  21. * for each n_ranks group.
  22. */
  23. static const struct board_specific_parameters udimm0[] = {
  24. /*
  25. * memory controller 0
  26. * num| hi| rank| clk| wrlvl | wrlvl | wrlvl
  27. * ranks| mhz| GB |adjst| start | ctl2 | ctl3
  28. */
  29. {2, 1350, 0, 8, 6, 0x0708090B, 0x0C0D0E09,},
  30. {2, 1666, 0, 8, 7, 0x08090A0C, 0x0D0F100B,},
  31. {2, 1900, 0, 8, 7, 0x09090B0D, 0x0E10120B,},
  32. {2, 2300, 0, 8, 9, 0x0A0B0C10, 0x1213140E,},
  33. {}
  34. };
  35. static const struct board_specific_parameters *udimms[] = {
  36. udimm0,
  37. };
  38. #endif