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common
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pinmux-config-tamonten-ng.h

pinmux-config-tamonten-ng.h 17 KB
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  1. /*
    2. 

  2.  * (C) Copyright 2013
    3. 

  3.  * Avionic Design GmbH <www.avionic-design.de>
    4. 

  4.  *
    5. 

  5.  * SPDX-License-Identifier:	GPL-2.0+
    6. 

  6.  */
    7. 

  7. 

  8. #ifndef _PINMUX_CONFIG_TAMONTEN_NG_H_
    9. 

  9. #define _PINMUX_CONFIG_TAMONTEN_NG_H_
    10. 

  10. 

  11. #define DEFAULT_PINMUX(_pingrp, _mux, _pull, _tri, _io)		\
    12. 

  12. 	{							\
    13. 

  13. 		.pingrp		= PMUX_PINGRP_##_pingrp,	\
    14. 

  14. 		.func		= PMUX_FUNC_##_mux,		\
    15. 

  15. 		.pull		= PMUX_PULL_##_pull,		\
    16. 

  16. 		.tristate	= PMUX_TRI_##_tri,		\
    17. 

  17. 		.io		= PMUX_PIN_##_io,		\
    18. 

  18. 		.lock		= PMUX_PIN_LOCK_DEFAULT,	\
    19. 

  19. 		.od		= PMUX_PIN_OD_DEFAULT,		\
    20. 

  20. 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
    21. 

  21. 	}
    22. 

  22. 

  23. #define I2C_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _od)	\
    24. 

  24. 	{							\
    25. 

  25. 		.pingrp		= PMUX_PINGRP_##_pingrp,	\
    26. 

  26. 		.func		= PMUX_FUNC_##_mux,		\
    27. 

  27. 		.pull		= PMUX_PULL_##_pull,		\
    28. 

  28. 		.tristate	= PMUX_TRI_##_tri,		\
    29. 

  29. 		.io		= PMUX_PIN_##_io,		\
    30. 

  30. 		.lock		= PMUX_PIN_LOCK_##_lock,	\
    31. 

  31. 		.od		= PMUX_PIN_OD_##_od,		\
    32. 

  32. 		.ioreset	= PMUX_PIN_IO_RESET_DEFAULT,	\
    33. 

  33. 	}
    34. 

  34. 

  35. #define LV_PINMUX(_pingrp, _mux, _pull, _tri, _io, _lock, _ioreset) \
    36. 

  36. 	{							\
    37. 

  37. 		.pingrp		= PMUX_PINGRP_##_pingrp,	\
    38. 

  38. 		.func		= PMUX_FUNC_##_mux,		\
    39. 

  39. 		.pull		= PMUX_PULL_##_pull,		\
    40. 

  40. 		.tristate	= PMUX_TRI_##_tri,		\
    41. 

  41. 		.io		= PMUX_PIN_##_io,		\
    42. 

  42. 		.lock		= PMUX_PIN_LOCK_##_lock,	\
    43. 

  43. 		.od		= PMUX_PIN_OD_DEFAULT,		\
    44. 

  44. 		.ioreset	= PMUX_PIN_IO_RESET_##_ioreset	\
    45. 

  45. 	}
    46. 

  46. 

  47. #define DEFAULT_PADCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
    48. 

  48. 	{							\
    49. 

  49. 		.drvgrp		= PMUX_DRVGRP_##_drvgrp,	\
    50. 

  50. 		.slwf		= _slwf,			\
    51. 

  51. 		.slwr		= _slwr,			\
    52. 

  52. 		.drvup		= _drvup,			\
    53. 

  53. 		.drvdn		= _drvdn,			\
    54. 

  54. 		.lpmd		= PMUX_LPMD_##_lpmd,		\
    55. 

  55. 		.schmt		= PMUX_SCHMT_##_schmt,		\
    56. 

  56. 		.hsm		= PMUX_HSM_##_hsm,		\
    57. 

  57. 	}
    58. 

  58. 

  59. static struct pmux_pingrp_config tamonten_ng_pinmux_common[] = {
    60. 

  60. 	/* SDMMC1 pinmux */
    61. 

  61. 	DEFAULT_PINMUX(SDMMC1_CLK_PZ0,  SDMMC1, NORMAL, NORMAL, INPUT),
    62. 

  62. 	DEFAULT_PINMUX(SDMMC1_CMD_PZ1,  SDMMC1, UP,     NORMAL, INPUT),
    63. 

  63. 	DEFAULT_PINMUX(SDMMC1_DAT0_PY7, SDMMC1, UP,     NORMAL, INPUT),
    64. 

  64. 	DEFAULT_PINMUX(SDMMC1_DAT1_PY6, SDMMC1, UP,     NORMAL, INPUT),
    65. 

  65. 	DEFAULT_PINMUX(SDMMC1_DAT2_PY5, SDMMC1, UP,     NORMAL, INPUT),
    66. 

  66. 	DEFAULT_PINMUX(SDMMC1_DAT3_PY4, SDMMC1, UP,     NORMAL, INPUT),
    67. 

  67. 

  68. 	/* SDMMC3 pinmux */
    69. 

  69. 	DEFAULT_PINMUX(SDMMC3_CLK_PA6,  SDMMC3, NORMAL, NORMAL, INPUT),
    70. 

  70. 	DEFAULT_PINMUX(SDMMC3_CMD_PA7,  SDMMC3, UP,     NORMAL, INPUT),
    71. 

  71. 	DEFAULT_PINMUX(SDMMC3_DAT0_PB7, SDMMC3, UP,     NORMAL, INPUT),
    72. 

  72. 	DEFAULT_PINMUX(SDMMC3_DAT1_PB6, SDMMC3, UP,     NORMAL, INPUT),
    73. 

  73. 	DEFAULT_PINMUX(SDMMC3_DAT2_PB5, SDMMC3, UP,     NORMAL, INPUT),
    74. 

  74. 	DEFAULT_PINMUX(SDMMC3_DAT3_PB4, SDMMC3, UP,     NORMAL, INPUT),
    75. 

  75. 	DEFAULT_PINMUX(SDMMC3_DAT4_PD1, SDMMC3, UP,     NORMAL, INPUT),
    76. 

  76. 	DEFAULT_PINMUX(SDMMC3_DAT5_PD0, SDMMC3, UP,     NORMAL, INPUT),
    77. 

  77. 	DEFAULT_PINMUX(SDMMC3_DAT6_PD3, SDMMC3, UP,     NORMAL, INPUT),
    78. 

  78. 	DEFAULT_PINMUX(SDMMC3_DAT7_PD4, SDMMC3, UP,     NORMAL, INPUT),
    79. 

  79. 	DEFAULT_PINMUX(GMI_IORDY_PI5,   RSVD1,  UP,     NORMAL, INPUT),
    80. 

  80. 	DEFAULT_PINMUX(GMI_CS6_N_PI3,   RSVD1,  UP,     NORMAL, INPUT),
    81. 

  81. 

  82. 	/* SDMMC4 pinmux */
    83. 

  83. 	LV_PINMUX(SDMMC4_CLK_PCC4,   SDMMC4, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    84. 

  84. 	LV_PINMUX(SDMMC4_CMD_PT7,    SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    85. 

  85. 	LV_PINMUX(SDMMC4_DAT0_PAA0,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    86. 

  86. 	LV_PINMUX(SDMMC4_DAT1_PAA1,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    87. 

  87. 	LV_PINMUX(SDMMC4_DAT2_PAA2,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    88. 

  88. 	LV_PINMUX(SDMMC4_DAT3_PAA3,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    89. 

  89. 	LV_PINMUX(SDMMC4_DAT4_PAA4,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    90. 

  90. 	LV_PINMUX(SDMMC4_DAT5_PAA5,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    91. 

  91. 	LV_PINMUX(SDMMC4_DAT6_PAA6,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    92. 

  92. 	LV_PINMUX(SDMMC4_DAT7_PAA7,  SDMMC4, UP,     NORMAL, INPUT, DISABLE, DISABLE),
    93. 

  93. 	LV_PINMUX(SDMMC4_RST_N_PCC3, RSVD1,  DOWN,   NORMAL, INPUT, DISABLE, DISABLE),
    94. 

  94. 

  95. 	/* I2C1 pinmux */
    96. 

  96. 	I2C_PINMUX(GEN1_I2C_SCL_PC4, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    97. 

  97. 	I2C_PINMUX(GEN1_I2C_SDA_PC5, I2C1, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    98. 

  98. 

  99. 	/* I2C2 pinmux */
    100. 

  100. 	I2C_PINMUX(GEN2_I2C_SCL_PT5, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    101. 

  101. 	I2C_PINMUX(GEN2_I2C_SDA_PT6, I2C2, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    102. 

  102. 

  103. 	/* I2C3 pinmux */
    104. 

  104. 	I2C_PINMUX(CAM_I2C_SCL_PBB1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    105. 

  105. 	I2C_PINMUX(CAM_I2C_SDA_PBB2, I2C3, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    106. 

  106. 

  107. 	/* I2C4 pinmux */
    108. 

  108. 	I2C_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    109. 

  109. 	I2C_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    110. 

  110. 

  111. 	/* Power I2C pinmux */
    112. 

  112. 	I2C_PINMUX(PWR_I2C_SCL_PZ6, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    113. 

  113. 	I2C_PINMUX(PWR_I2C_SDA_PZ7, I2CPWR, NORMAL, NORMAL, INPUT, DISABLE, ENABLE),
    114. 

  114. 

  115. 	/* UART1 */
    116. 

  116. 	DEFAULT_PINMUX(ULPI_DATA0_PO1, UARTA, NORMAL, NORMAL, OUTPUT),
    117. 

  117. 	DEFAULT_PINMUX(ULPI_DATA1_PO2, UARTA, NORMAL, NORMAL, INPUT),
    118. 

  118. 

  119. 	/* UART2 */
    120. 

  120. 	DEFAULT_PINMUX(UART2_RXD_PC3,   UARTB, NORMAL, NORMAL, INPUT),
    121. 

  121. 	DEFAULT_PINMUX(UART2_TXD_PC2,   UARTB, NORMAL, NORMAL, OUTPUT),
    122. 

  122. 

  123. 	/* UART3 */
    124. 

  124. 	DEFAULT_PINMUX(UART3_TXD_PW6,   UARTC, NORMAL, NORMAL, OUTPUT),
    125. 

  125. 	DEFAULT_PINMUX(UART3_RXD_PW7,   UARTC, NORMAL, NORMAL, INPUT),
    126. 

  126. 	DEFAULT_PINMUX(UART3_CTS_N_PA1, UARTC, NORMAL, NORMAL, INPUT),
    127. 

  127. 	DEFAULT_PINMUX(UART3_RTS_N_PC0, UARTC, NORMAL, NORMAL, OUTPUT),
    128. 

  128. 

  129. 	/* UART4 */
    130. 

  130. 	DEFAULT_PINMUX(ULPI_CLK_PY0, UARTD, NORMAL, NORMAL, OUTPUT),
    131. 

  131. 	DEFAULT_PINMUX(ULPI_DIR_PY1, UARTD, UP,     NORMAL, INPUT),
    132. 

  132. 	DEFAULT_PINMUX(ULPI_NXT_PY2, UARTD, NORMAL, NORMAL, INPUT),
    133. 

  133. 	DEFAULT_PINMUX(ULPI_STP_PY3, UARTD, NORMAL, NORMAL, OUTPUT),
    134. 

  134. 

  135. 	/* DAP */
    136. 

  136. 	DEFAULT_PINMUX(CLK1_OUT_PW4, EXTPERIPH1, NORMAL, NORMAL, INPUT),
    137. 

  137. 

  138. 	/* I2S1 */
    139. 

  139. 	DEFAULT_PINMUX(DAP2_FS_PA2,   I2S1, NORMAL, NORMAL, INPUT),
    140. 

  140. 	DEFAULT_PINMUX(DAP2_DIN_PA4,  I2S1, NORMAL, NORMAL, INPUT),
    141. 

  141. 	DEFAULT_PINMUX(DAP2_DOUT_PA5, I2S1, NORMAL, NORMAL, INPUT),
    142. 

  142. 	DEFAULT_PINMUX(DAP2_SCLK_PA3, I2S1, NORMAL, NORMAL, INPUT),
    143. 

  143. 

  144. 	/* SPDIF */
    145. 

  145. 	DEFAULT_PINMUX(SPDIF_IN_PK6,  SPDIF, NORMAL, NORMAL, INPUT),
    146. 

  146. 	DEFAULT_PINMUX(SPDIF_OUT_PK5, SPDIF, NORMAL, NORMAL, OUTPUT),
    147. 

  147. 

  148. 	/* I2S2 */
    149. 

  149. 	DEFAULT_PINMUX(DAP3_FS_PP0,   I2S2, NORMAL, NORMAL, INPUT),
    150. 

  150. 	DEFAULT_PINMUX(DAP3_DIN_PP1,  I2S2, NORMAL, NORMAL, INPUT),
    151. 

  151. 	DEFAULT_PINMUX(DAP3_DOUT_PP2, I2S2, NORMAL, NORMAL, INPUT),
    152. 

  152. 	DEFAULT_PINMUX(DAP3_SCLK_PP3, I2S2, NORMAL, NORMAL, INPUT),
    153. 

  153. 

  154. 	/* DAP4 */
    155. 

  155. 	DEFAULT_PINMUX(DAP4_FS_PP4,   I2S3, NORMAL, NORMAL, INPUT),
    156. 

  156. 	DEFAULT_PINMUX(DAP4_DIN_PP5,  I2S3, NORMAL, NORMAL, INPUT),
    157. 

  157. 	DEFAULT_PINMUX(DAP4_SCLK_PP7, I2S3, NORMAL, NORMAL, INPUT),
    158. 

  158. 

  159. 	/* Tamonten GPIO */
    160. 

  160. 	DEFAULT_PINMUX(PV2,            RSVD1, NORMAL, NORMAL, OUTPUT),
    161. 

  161. 	DEFAULT_PINMUX(PV3,            RSVD1, NORMAL, NORMAL, INPUT),
    162. 

  162. 	DEFAULT_PINMUX(SPI2_CS1_N_PW2, RSVD1, NORMAL, NORMAL, INPUT),
    163. 

  163. 

  164. 	/* LCD */
    165. 

  165. 	DEFAULT_PINMUX(LCD_PWR1_PC1,  DISPLAYA, NORMAL, NORMAL, INPUT),
    166. 

  166. 	DEFAULT_PINMUX(LCD_PWR2_PC6,  DISPLAYA, NORMAL, NORMAL, INPUT),
    167. 

  167. 	DEFAULT_PINMUX(LCD_SDIN_PZ2,  DISPLAYA, NORMAL, NORMAL, INPUT),
    168. 

  168. 	DEFAULT_PINMUX(LCD_SDOUT_PN5, DISPLAYA, NORMAL, NORMAL, INPUT),
    169. 

  169. 	DEFAULT_PINMUX(LCD_WR_N_PZ3,  DISPLAYA, NORMAL, NORMAL, INPUT),
    170. 

  170. 	DEFAULT_PINMUX(LCD_CS0_N_PN4, DISPLAYA, NORMAL, NORMAL, INPUT),
    171. 

  171. 	DEFAULT_PINMUX(LCD_DC0_PN6,   DISPLAYA, NORMAL, NORMAL, INPUT),
    172. 

  172. 	DEFAULT_PINMUX(LCD_SCK_PZ4,   DISPLAYA, NORMAL, NORMAL, INPUT),
    173. 

  173. 	DEFAULT_PINMUX(LCD_PWR0_PB2,  DISPLAYA, NORMAL, NORMAL, INPUT),
    174. 

  174. 	DEFAULT_PINMUX(LCD_PCLK_PB3,  DISPLAYA, NORMAL, NORMAL, INPUT),
    175. 

  175. 	DEFAULT_PINMUX(LCD_DE_PJ1,    DISPLAYA, NORMAL, NORMAL, INPUT),
    176. 

  176. 	DEFAULT_PINMUX(LCD_HSYNC_PJ3, DISPLAYA, NORMAL, NORMAL, INPUT),
    177. 

  177. 	DEFAULT_PINMUX(LCD_VSYNC_PJ4, DISPLAYA, NORMAL, NORMAL, INPUT),
    178. 

  178. 	DEFAULT_PINMUX(LCD_D0_PE0,    DISPLAYA, NORMAL, NORMAL, INPUT),
    179. 

  179. 	DEFAULT_PINMUX(LCD_D1_PE1,    DISPLAYA, NORMAL, NORMAL, INPUT),
    180. 

  180. 	DEFAULT_PINMUX(LCD_D2_PE2,    DISPLAYA, NORMAL, NORMAL, INPUT),
    181. 

  181. 	DEFAULT_PINMUX(LCD_D3_PE3,    DISPLAYA, NORMAL, NORMAL, INPUT),
    182. 

  182. 	DEFAULT_PINMUX(LCD_D4_PE4,    DISPLAYA, NORMAL, NORMAL, INPUT),
    183. 

  183. 	DEFAULT_PINMUX(LCD_D5_PE5,    DISPLAYA, NORMAL, NORMAL, INPUT),
    184. 

  184. 	DEFAULT_PINMUX(LCD_D6_PE6,    DISPLAYA, NORMAL, NORMAL, INPUT),
    185. 

  185. 	DEFAULT_PINMUX(LCD_D7_PE7,    DISPLAYA, NORMAL, NORMAL, INPUT),
    186. 

  186. 	DEFAULT_PINMUX(LCD_D8_PF0,    DISPLAYA, NORMAL, NORMAL, INPUT),
    187. 

  187. 	DEFAULT_PINMUX(LCD_D9_PF1,    DISPLAYA, NORMAL, NORMAL, INPUT),
    188. 

  188. 	DEFAULT_PINMUX(LCD_D10_PF2,   DISPLAYA, NORMAL, NORMAL, INPUT),
    189. 

  189. 	DEFAULT_PINMUX(LCD_D11_PF3,   DISPLAYA, NORMAL, NORMAL, INPUT),
    190. 

  190. 	DEFAULT_PINMUX(LCD_D12_PF4,   DISPLAYA, NORMAL, NORMAL, INPUT),
    191. 

  191. 	DEFAULT_PINMUX(LCD_D13_PF5,   DISPLAYA, NORMAL, NORMAL, INPUT),
    192. 

  192. 	DEFAULT_PINMUX(LCD_D14_PF6,   DISPLAYA, NORMAL, NORMAL, INPUT),
    193. 

  193. 	DEFAULT_PINMUX(LCD_D15_PF7,   DISPLAYA, NORMAL, NORMAL, INPUT),
    194. 

  194. 	DEFAULT_PINMUX(LCD_D16_PM0,   DISPLAYA, NORMAL, NORMAL, INPUT),
    195. 

  195. 	DEFAULT_PINMUX(LCD_D17_PM1,   DISPLAYA, NORMAL, NORMAL, INPUT),
    196. 

  196. 	DEFAULT_PINMUX(LCD_D18_PM2,   DISPLAYA, NORMAL, NORMAL, INPUT),
    197. 

  197. 	DEFAULT_PINMUX(LCD_D19_PM3,   DISPLAYA, NORMAL, NORMAL, INPUT),
    198. 

  198. 	DEFAULT_PINMUX(LCD_D20_PM4,   DISPLAYA, NORMAL, NORMAL, INPUT),
    199. 

  199. 	DEFAULT_PINMUX(LCD_D21_PM5,   DISPLAYA, NORMAL, NORMAL, INPUT),
    200. 

  200. 	DEFAULT_PINMUX(LCD_D22_PM6,   DISPLAYA, NORMAL, NORMAL, INPUT),
    201. 

  201. 	DEFAULT_PINMUX(LCD_D23_PM7,   DISPLAYA, NORMAL, NORMAL, INPUT),
    202. 

  202. 	DEFAULT_PINMUX(LCD_CS1_N_PW0, DISPLAYA, NORMAL, NORMAL, INPUT),
    203. 

  203. 	DEFAULT_PINMUX(LCD_M1_PW1,    DISPLAYA, NORMAL, NORMAL, INPUT),
    204. 

  204. 	DEFAULT_PINMUX(LCD_DC1_PD2,   DISPLAYA, NORMAL, NORMAL, INPUT),
    205. 

  205. 	DEFAULT_PINMUX(CRT_HSYNC_PV6, CRT,   NORMAL, NORMAL, OUTPUT),
    206. 

  206. 	DEFAULT_PINMUX(CRT_VSYNC_PV7, CRT,   NORMAL, NORMAL, OUTPUT),
    207. 

  207. 

  208. 	/* BT656 */
    209. 

  209. 	LV_PINMUX(VI_MCLK_PT1,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    210. 

  210. 	LV_PINMUX(VI_PCLK_PT0,  VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    211. 

  211. 	LV_PINMUX(VI_HSYNC_PD7, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    212. 

  212. 	LV_PINMUX(VI_VSYNC_PD6, VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    213. 

  213. 	LV_PINMUX(VI_D2_PL0,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    214. 

  214. 	LV_PINMUX(VI_D3_PL1,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    215. 

  215. 	LV_PINMUX(VI_D4_PL2,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    216. 

  216. 	LV_PINMUX(VI_D5_PL3,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    217. 

  217. 	LV_PINMUX(VI_D6_PL4,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    218. 

  218. 	LV_PINMUX(VI_D7_PL5,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    219. 

  219. 	LV_PINMUX(VI_D8_PL6,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    220. 

  220. 	LV_PINMUX(VI_D9_PL7,    VI,    NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    221. 

  221. 	LV_PINMUX(VI_D11_PT3,   RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    222. 

  222. 

  223. 	/* GPIOs */
    224. 

  224. 	DEFAULT_PINMUX(PU5,          RSVD1, NORMAL, NORMAL, INPUT),
    225. 

  225. 	DEFAULT_PINMUX(PU6,          RSVD1, NORMAL, NORMAL, INPUT),
    226. 

  226. 	DEFAULT_PINMUX(GMI_AD12_PH4, RSVD1, NORMAL, NORMAL, INPUT),
    227. 

  227. 

  228. 	/* LCD BL */
    229. 

  229. 	DEFAULT_PINMUX(GMI_AD8_PH0,  PWM0,  NORMAL, NORMAL, OUTPUT),
    230. 

  230. 	DEFAULT_PINMUX(GMI_AD10_PH2, RSVD4, NORMAL, NORMAL, OUTPUT),
    231. 

  231. 

  232. 	/* SPI4 */
    233. 

  233. 	DEFAULT_PINMUX(GMI_A16_PJ7, SPI4, NORMAL, NORMAL, INPUT),
    234. 

  234. 	DEFAULT_PINMUX(GMI_A17_PB0, SPI4, NORMAL, NORMAL, INPUT),
    235. 

  235. 	DEFAULT_PINMUX(GMI_A18_PB1, SPI4, NORMAL, NORMAL, INPUT),
    236. 

  236. 	DEFAULT_PINMUX(GMI_A19_PK7, SPI4, NORMAL, NORMAL, INPUT),
    237. 

  237. 

  238. 	/* Video input GPIO */
    239. 

  239. 	DEFAULT_PINMUX(PCC1, RSVD1, NORMAL, NORMAL, INPUT),
    240. 

  240. 	DEFAULT_PINMUX(PBB0, RSVD1, NORMAL, NORMAL, INPUT),
    241. 

  241. 	DEFAULT_PINMUX(PBB7, RSVD1, NORMAL, NORMAL, INPUT),
    242. 

  242. 

  243. 	/* Sensor GPIO */
    244. 

  244. 	DEFAULT_PINMUX(PCC2, RSVD1, NORMAL, NORMAL, INPUT),
    245. 

  245. 

  246. 	/* JTAG */
    247. 

  247. 	DEFAULT_PINMUX(JTAG_RTCK_PU7, RTCK, NORMAL, NORMAL, OUTPUT),
    248. 

  248. 

  249. 	/* Power controls */
    250. 

  250. 	DEFAULT_PINMUX(GMI_CS2_N_PK3, RSVD1, NORMAL, NORMAL, INPUT),
    251. 

  251. 

  252. 	/* SPI1 */
    253. 

  253. 	DEFAULT_PINMUX(SPI1_MOSI_PX4,  SPI1, NORMAL, NORMAL, INPUT),
    254. 

  254. 	DEFAULT_PINMUX(SPI1_SCK_PX5,   SPI1, NORMAL, NORMAL, INPUT),
    255. 

  255. 	DEFAULT_PINMUX(SPI1_CS0_N_PX6, SPI1, NORMAL, NORMAL, INPUT),
    256. 

  256. 	DEFAULT_PINMUX(SPI1_MISO_PX7,  SPI1, NORMAL, NORMAL, INPUT),
    257. 

  257. 

  258. 	/* PMU */
    259. 

  259. 	DEFAULT_PINMUX(PV0,             RSVD1,  UP,     NORMAL, INPUT),
    260. 

  260. 	DEFAULT_PINMUX(SYS_CLK_REQ_PZ5, SYSCLK, NORMAL, NORMAL, OUTPUT),
    261. 

  261. 	DEFAULT_PINMUX(CLK_32K_IN,      SYSCLK, NORMAL, NORMAL, INPUT),
    262. 

  262. 

  263. 	/* PCI */
    264. 

  264. 	DEFAULT_PINMUX(PEX_L0_PRSNT_N_PDD0,  PCIE, NORMAL, NORMAL, INPUT),
    265. 

  265. 	DEFAULT_PINMUX(PEX_L0_RST_N_PDD1,    PCIE, NORMAL, NORMAL, OUTPUT),
    266. 

  266. 	DEFAULT_PINMUX(PEX_L0_CLKREQ_N_PDD2, PCIE, NORMAL, NORMAL, INPUT),
    267. 

  267. 	DEFAULT_PINMUX(PEX_WAKE_N_PDD3,      PCIE, NORMAL, NORMAL, INPUT),
    268. 

  268. 	DEFAULT_PINMUX(PEX_L1_PRSNT_N_PDD4,  PCIE, NORMAL, NORMAL, INPUT),
    269. 

  269. 	DEFAULT_PINMUX(PEX_L1_RST_N_PDD5,    PCIE, NORMAL, NORMAL, OUTPUT),
    270. 

  270. 	DEFAULT_PINMUX(PEX_L1_CLKREQ_N_PDD6, PCIE, NORMAL, NORMAL, INPUT),
    271. 

  271. 	DEFAULT_PINMUX(PEX_L2_PRSNT_N_PDD7,  PCIE, NORMAL, NORMAL, INPUT),
    272. 

  272. 	DEFAULT_PINMUX(PEX_L2_RST_N_PCC6,    PCIE, NORMAL, NORMAL, OUTPUT),
    273. 

  273. 	DEFAULT_PINMUX(PEX_L2_CLKREQ_N_PCC7, PCIE, NORMAL, NORMAL, INPUT),
    274. 

  274. 

  275. 	/* HDMI */
    276. 

  276. 	DEFAULT_PINMUX(HDMI_CEC_PEE3, CEC,   NORMAL, NORMAL, INPUT),
    277. 

  277. 	DEFAULT_PINMUX(HDMI_INT_PN7,  RSVD1, NORMAL, TRISTATE, INPUT),
    278. 

  278. };
    279. 

  279. 

  280. static struct pmux_pingrp_config unused_pins_lowpower[] = {
    281. 

  281. 	/* UART1 - NC */
    282. 

  282. 	DEFAULT_PINMUX(ULPI_DATA2_PO3, UARTA, NORMAL, NORMAL, INPUT),
    283. 

  283. 	DEFAULT_PINMUX(ULPI_DATA3_PO4, UARTA, NORMAL, NORMAL, INPUT),
    284. 

  284. 	DEFAULT_PINMUX(ULPI_DATA4_PO5, UARTA, NORMAL, NORMAL, INPUT),
    285. 

  285. 	DEFAULT_PINMUX(ULPI_DATA5_PO6, UARTA, NORMAL, NORMAL, INPUT),
    286. 

  286. 	DEFAULT_PINMUX(ULPI_DATA6_PO7, UARTA, NORMAL, NORMAL, INPUT),
    287. 

  287. 	DEFAULT_PINMUX(ULPI_DATA7_PO0, UARTA, NORMAL, NORMAL, INPUT),
    288. 

  288. 

  289. 	/* UART2 - NC */
    290. 

  290. 	DEFAULT_PINMUX(UART2_RTS_N_PJ6, UARTB, NORMAL, NORMAL, INPUT),
    291. 

  291. 	DEFAULT_PINMUX(UART2_CTS_N_PJ5, UARTB, NORMAL, NORMAL, INPUT),
    292. 

  292. 

  293. 	/* DAP - NC */
    294. 

  294. 	DEFAULT_PINMUX(CLK1_REQ_PEE2,  RSVD1, NORMAL, NORMAL, INPUT),
    295. 

  295. 	DEFAULT_PINMUX(CLK3_OUT_PEE0,  RSVD1, NORMAL, NORMAL, INPUT),
    296. 

  296. 	DEFAULT_PINMUX(CLK3_REQ_PEE1,  RSVD1, NORMAL, NORMAL, INPUT),
    297. 

  297. 

  298. 	/* DAP4 - NC */
    299. 

  299. 	DEFAULT_PINMUX(DAP4_DOUT_PP6, I2S3, NORMAL, NORMAL, INPUT),
    300. 

  300. 

  301. 	/* Tamonten GPIO - NC */
    302. 

  302. 	DEFAULT_PINMUX(CLK2_OUT_PW5,  EXTPERIPH2, NORMAL, NORMAL, INPUT),
    303. 

  303. 	DEFAULT_PINMUX(CLK2_REQ_PCC5, DAP,        NORMAL, NORMAL, INPUT),
    304. 

  304. 

  305. 	/* BT656 - NC */
    306. 

  306. 	LV_PINMUX(VI_D0_PT4,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    307. 

  307. 	LV_PINMUX(VI_D1_PD5,  RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    308. 

  308. 	LV_PINMUX(VI_D10_PT2, RSVD1, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
    309. 

  309. 

  310. 	/* GPIO - NC */
    311. 

  311. 	DEFAULT_PINMUX(PU0, RSVD1, NORMAL, NORMAL, INPUT),
    312. 

  312. 	DEFAULT_PINMUX(PU1, RSVD1, NORMAL, NORMAL, INPUT),
    313. 

  313. 	DEFAULT_PINMUX(PU2, RSVD1, NORMAL, NORMAL, INPUT),
    314. 

  314. 	DEFAULT_PINMUX(PU3, RSVD1, NORMAL, NORMAL, INPUT),
    315. 

  315. 	DEFAULT_PINMUX(PU4, RSVD1, NORMAL, NORMAL, INPUT),
    316. 

  316. 

  317. 	/* Video input - NC */
    318. 

  318. 	DEFAULT_PINMUX(CAM_MCLK_PCC0, RSVD1, NORMAL, NORMAL, INPUT),
    319. 

  319. 	DEFAULT_PINMUX(PBB3,          RSVD1, NORMAL, NORMAL, INPUT),
    320. 

  320. 	DEFAULT_PINMUX(PBB5,          RSVD1, NORMAL, NORMAL, INPUT),
    321. 

  321. 	DEFAULT_PINMUX(PBB6,          RSVD1, NORMAL, NORMAL, INPUT),
    322. 

  322. 	DEFAULT_PINMUX(KB_ROW11_PS3,  RSVD1, NORMAL, NORMAL, INPUT),
    323. 

  323. 

  324. 	/* KBC keys - NC */
    325. 

  325. 	DEFAULT_PINMUX(KB_ROW0_PR0,  KBC, UP, NORMAL, INPUT),
    326. 

  326. 	DEFAULT_PINMUX(KB_ROW1_PR1,  KBC, UP, NORMAL, INPUT),
    327. 

  327. 	DEFAULT_PINMUX(KB_ROW2_PR2,  KBC, UP, NORMAL, INPUT),
    328. 

  328. 	DEFAULT_PINMUX(KB_ROW3_PR3,  KBC, UP, NORMAL, INPUT),
    329. 

  329. 	DEFAULT_PINMUX(KB_ROW4_PR4,  KBC, UP, NORMAL, INPUT),
    330. 

  330. 	DEFAULT_PINMUX(KB_ROW5_PR5,  KBC, UP, NORMAL, INPUT),
    331. 

  331. 	DEFAULT_PINMUX(KB_ROW6_PR6,  KBC, UP, NORMAL, INPUT),
    332. 

  332. 	DEFAULT_PINMUX(KB_ROW7_PR7,  KBC, UP, NORMAL, INPUT),
    333. 

  333. 	DEFAULT_PINMUX(KB_ROW8_PS0,  KBC, UP, NORMAL, INPUT),
    334. 

  334. 	DEFAULT_PINMUX(KB_ROW9_PS1,  KBC, UP, NORMAL, INPUT),
    335. 

  335. 	DEFAULT_PINMUX(KB_ROW10_PS2, KBC, UP, NORMAL, INPUT),
    336. 

  336. 	DEFAULT_PINMUX(KB_ROW12_PS4, KBC, UP, NORMAL, INPUT),
    337. 

  337. 	DEFAULT_PINMUX(KB_ROW13_PS5, KBC, UP, NORMAL, INPUT),
    338. 

  338. 	DEFAULT_PINMUX(KB_ROW14_PS6, KBC, UP, NORMAL, INPUT),
    339. 

  339. 	DEFAULT_PINMUX(KB_ROW15_PS7, KBC, UP, NORMAL, INPUT),
    340. 

  340. 	DEFAULT_PINMUX(KB_COL0_PQ0,  KBC, UP, NORMAL, INPUT),
    341. 

  341. 	DEFAULT_PINMUX(KB_COL1_PQ1,  KBC, UP, NORMAL, INPUT),
    342. 

  342. 	DEFAULT_PINMUX(KB_COL2_PQ2,  KBC, UP, NORMAL, INPUT),
    343. 

  343. 	DEFAULT_PINMUX(KB_COL3_PQ3,  KBC, UP, NORMAL, INPUT),
    344. 

  344. 	DEFAULT_PINMUX(KB_COL4_PQ4,  KBC, UP, NORMAL, INPUT),
    345. 

  345. 	DEFAULT_PINMUX(KB_COL5_PQ5,  KBC, UP, NORMAL, INPUT),
    346. 

  346. 	DEFAULT_PINMUX(KB_COL6_PQ6,  KBC, UP, NORMAL, INPUT),
    347. 

  347. 	DEFAULT_PINMUX(KB_COL7_PQ7,  KBC, UP, NORMAL, INPUT),
    348. 

  348. 

  349. 	/* PMU - NC */
    350. 

  350. 	DEFAULT_PINMUX(CLK_32K_OUT_PA0, RSVD1, NORMAL, NORMAL, INPUT),
    351. 

  351. 

  352. 	/* Power rails GPIO - NC */
    353. 

  353. 	DEFAULT_PINMUX(SPI2_SCK_PX2, RSVD1, NORMAL, NORMAL, INPUT),
    354. 

  354. 	DEFAULT_PINMUX(PBB4,         RSVD1, NORMAL, NORMAL, INPUT),
    355. 

  355. 

  356. 	/* Others - NC */
    357. 

  357. 	DEFAULT_PINMUX(GMI_WP_N_PC7,   RSVD1, NORMAL, NORMAL, INPUT),
    358. 

  358. 	DEFAULT_PINMUX(PV1,            RSVD1, NORMAL, NORMAL, INPUT),
    359. 

  359. 	DEFAULT_PINMUX(GMI_WAIT_PI7,   NAND, UP,     TRISTATE, OUTPUT),
    360. 

  360. 	DEFAULT_PINMUX(GMI_ADV_N_PK0,  NAND, NORMAL, TRISTATE, OUTPUT),
    361. 

  361. 	DEFAULT_PINMUX(GMI_CLK_PK1,    NAND, NORMAL, TRISTATE, OUTPUT),
    362. 

  362. 	DEFAULT_PINMUX(GMI_CS3_N_PK4,  NAND, NORMAL, NORMAL,   OUTPUT),
    363. 

  363. 	DEFAULT_PINMUX(GMI_CS7_N_PI6,  NAND, UP,     NORMAL,   INPUT),
    364. 

  364. 	DEFAULT_PINMUX(GMI_AD0_PG0,    NAND, NORMAL, TRISTATE, OUTPUT),
    365. 

  365. 	DEFAULT_PINMUX(GMI_AD1_PG1,    NAND, NORMAL, TRISTATE, OUTPUT),
    366. 

  366. 	DEFAULT_PINMUX(GMI_AD2_PG2,    NAND, NORMAL, TRISTATE, OUTPUT),
    367. 

  367. 	DEFAULT_PINMUX(GMI_AD3_PG3,    NAND, NORMAL, TRISTATE, OUTPUT),
    368. 

  368. 	DEFAULT_PINMUX(GMI_AD4_PG4,    NAND, NORMAL, TRISTATE, OUTPUT),
    369. 

  369. 	DEFAULT_PINMUX(GMI_AD5_PG5,    NAND, NORMAL, TRISTATE, OUTPUT),
    370. 

  370. 	DEFAULT_PINMUX(GMI_AD6_PG6,    NAND, NORMAL, TRISTATE, OUTPUT),
    371. 

  371. 	DEFAULT_PINMUX(GMI_AD7_PG7,    NAND, NORMAL, TRISTATE, OUTPUT),
    372. 

  372. 	DEFAULT_PINMUX(GMI_AD9_PH1,    PWM1, NORMAL, NORMAL,   OUTPUT),
    373. 

  373. 	DEFAULT_PINMUX(GMI_AD11_PH3,   NAND, NORMAL, NORMAL,   OUTPUT),
    374. 

  374. 	DEFAULT_PINMUX(GMI_AD13_PH5,   NAND, UP,     NORMAL,   INPUT),
    375. 

  375. 	DEFAULT_PINMUX(GMI_WR_N_PI0,   NAND, NORMAL, TRISTATE, OUTPUT),
    376. 

  376. 	DEFAULT_PINMUX(GMI_OE_N_PI1,   NAND, NORMAL, TRISTATE, OUTPUT),
    377. 

  377. 	DEFAULT_PINMUX(GMI_DQS_PI2,    NAND, NORMAL, TRISTATE, OUTPUT),
    378. 

  378. };
    379. 

  379. 

  380. static struct pmux_drvgrp_config tamonten_ng_padctrl[] = {
    381. 

  381. 	/* (_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
    382. 

  382. 	DEFAULT_PADCFG(SDIO1, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR,
    383. 

  383. 		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, DISABLE, DISABLE),
    384. 

  384. };
    385. 

  385. #endif	/* _PINMUX_CONFIG_TAMONTEN_NG_H_ */
    386.