flash.c 30 KB

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  1. /*
  2. * (C) Copyright 2006
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2002 Jun Gu <jung@artesyncp.com>
  6. * Add support for Am29F016D and dynamic switch setting.
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. /*
  11. * Modified 4/5/2001
  12. * Wait for completion of each sector erase command issued
  13. * 4/5/2001
  14. * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
  15. */
  16. #include <common.h>
  17. #include <asm/ppc4xx.h>
  18. #include <asm/processor.h>
  19. #include <asm/ppc440.h>
  20. #include "yucca.h"
  21. #ifdef DEBUG
  22. #define DEBUGF(x...) printf(x)
  23. #else
  24. #define DEBUGF(x...)
  25. #endif /* DEBUG */
  26. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
  27. /*
  28. * Mark big flash bank (16 bit instead of 8 bit access) in address with bit 0
  29. */
  30. static unsigned long flash_addr_table[][CONFIG_SYS_MAX_FLASH_BANKS] = {
  31. {0xfff00000, 0xfff80000, 0xe7c00001}, /* 0:boot from small flash */
  32. {0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
  33. {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
  34. {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
  35. {0xe7F00000, 0xe7F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
  36. {0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
  37. {0x00000000, 0x00000000, 0x00000000}, /* 6:boot from pci 66 */
  38. {0x00000000, 0x00000000, 0x00000000}, /* 7:boot from */
  39. {0xfff00000, 0xfff80000, 0xe7c00001}, /* 8:boot from small flash */
  40. };
  41. /*
  42. * include common flash code (for amcc boards)
  43. */
  44. /*-----------------------------------------------------------------------
  45. * Functions
  46. */
  47. static int write_word(flash_info_t * info, ulong dest, ulong data);
  48. #ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
  49. static int write_word_1(flash_info_t * info, ulong dest, ulong data);
  50. static int write_word_2(flash_info_t * info, ulong dest, ulong data);
  51. static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
  52. static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
  53. static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
  54. static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
  55. #endif
  56. void flash_print_info(flash_info_t * info)
  57. {
  58. int i;
  59. int k;
  60. int size;
  61. int erased;
  62. volatile unsigned long *flash;
  63. if (info->flash_id == FLASH_UNKNOWN) {
  64. printf("missing or unknown FLASH type\n");
  65. return;
  66. }
  67. switch (info->flash_id & FLASH_VENDMASK) {
  68. case FLASH_MAN_AMD:
  69. printf("AMD ");
  70. break;
  71. case FLASH_MAN_STM:
  72. printf("STM ");
  73. break;
  74. case FLASH_MAN_FUJ:
  75. printf("FUJITSU ");
  76. break;
  77. case FLASH_MAN_SST:
  78. printf("SST ");
  79. break;
  80. case FLASH_MAN_MX:
  81. printf("MIXC ");
  82. break;
  83. default:
  84. printf("Unknown Vendor ");
  85. break;
  86. }
  87. switch (info->flash_id & FLASH_TYPEMASK) {
  88. case FLASH_AM040:
  89. printf("AM29F040 (512 Kbit, uniform sector size)\n");
  90. break;
  91. case FLASH_AM400B:
  92. printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
  93. break;
  94. case FLASH_AM400T:
  95. printf("AM29LV400T (4 Mbit, top boot sector)\n");
  96. break;
  97. case FLASH_AM800B:
  98. printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
  99. break;
  100. case FLASH_AM800T:
  101. printf("AM29LV800T (8 Mbit, top boot sector)\n");
  102. break;
  103. case FLASH_AMD016:
  104. printf("AM29F016D (16 Mbit, uniform sector size)\n");
  105. break;
  106. case FLASH_AM160B:
  107. printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
  108. break;
  109. case FLASH_AM160T:
  110. printf("AM29LV160T (16 Mbit, top boot sector)\n");
  111. break;
  112. case FLASH_AM320B:
  113. printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
  114. break;
  115. case FLASH_AM320T:
  116. printf("AM29LV320T (32 Mbit, top boot sector)\n");
  117. break;
  118. case FLASH_AM033C:
  119. printf("AM29LV033C (32 Mbit, top boot sector)\n");
  120. break;
  121. case FLASH_SST800A:
  122. printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
  123. break;
  124. case FLASH_SST160A:
  125. printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
  126. break;
  127. case FLASH_STMW320DT:
  128. printf ("M29W320DT (32 M, top sector)\n");
  129. break;
  130. case FLASH_MXLV320T:
  131. printf ("MXLV320T (32 Mbit, top sector)\n");
  132. break;
  133. default:
  134. printf("Unknown Chip Type\n");
  135. break;
  136. }
  137. printf(" Size: %ld KB in %d Sectors\n",
  138. info->size >> 10, info->sector_count);
  139. printf(" Sector Start Addresses:");
  140. for (i = 0; i < info->sector_count; ++i) {
  141. /*
  142. * Check if whole sector is erased
  143. */
  144. if (i != (info->sector_count - 1))
  145. size = info->start[i + 1] - info->start[i];
  146. else
  147. size = info->start[0] + info->size - info->start[i];
  148. erased = 1;
  149. flash = (volatile unsigned long *)info->start[i];
  150. size = size >> 2; /* divide by 4 for longword access */
  151. for (k = 0; k < size; k++) {
  152. if (*flash++ != 0xffffffff) {
  153. erased = 0;
  154. break;
  155. }
  156. }
  157. if ((i % 5) == 0)
  158. printf("\n ");
  159. printf(" %08lX%s%s",
  160. info->start[i],
  161. erased ? " E" : " ",
  162. info->protect[i] ? "RO " : " ");
  163. }
  164. printf("\n");
  165. return;
  166. }
  167. /*
  168. * The following code cannot be run from FLASH!
  169. */
  170. #ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
  171. static ulong flash_get_size(vu_long * addr, flash_info_t * info)
  172. {
  173. /* bit 0 used for big flash marking */
  174. if ((ulong)addr & 0x1)
  175. return flash_get_size_2((vu_long *)((ulong)addr & 0xfffffffe), info);
  176. else
  177. return flash_get_size_1(addr, info);
  178. }
  179. static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
  180. #else
  181. static ulong flash_get_size(vu_long * addr, flash_info_t * info)
  182. #endif
  183. {
  184. short i;
  185. CONFIG_SYS_FLASH_WORD_SIZE value;
  186. ulong base = (ulong) addr;
  187. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
  188. DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
  189. /* Write auto select command: read Manufacturer ID */
  190. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  191. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  192. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
  193. udelay(1000);
  194. value = addr2[0];
  195. DEBUGF("FLASH MANUFACT: %x\n", value);
  196. switch (value) {
  197. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
  198. info->flash_id = FLASH_MAN_AMD;
  199. break;
  200. case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
  201. info->flash_id = FLASH_MAN_FUJ;
  202. break;
  203. case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
  204. info->flash_id = FLASH_MAN_SST;
  205. break;
  206. case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
  207. info->flash_id = FLASH_MAN_STM;
  208. break;
  209. default:
  210. info->flash_id = FLASH_UNKNOWN;
  211. info->sector_count = 0;
  212. info->size = 0;
  213. return (0); /* no or unknown flash */
  214. }
  215. value = addr2[1]; /* device ID */
  216. DEBUGF("\nFLASH DEVICEID: %x\n", value);
  217. switch (value) {
  218. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV040B:
  219. info->flash_id += FLASH_AM040;
  220. info->sector_count = 8;
  221. info->size = 0x0080000; /* => 512 ko */
  222. break;
  223. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F040B:
  224. info->flash_id += FLASH_AM040;
  225. info->sector_count = 8;
  226. info->size = 0x0080000; /* => 512 ko */
  227. break;
  228. case (CONFIG_SYS_FLASH_WORD_SIZE) STM_ID_M29W040B:
  229. info->flash_id += FLASH_AM040;
  230. info->sector_count = 8;
  231. info->size = 0x0080000; /* => 512 ko */
  232. break;
  233. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_F016D:
  234. info->flash_id += FLASH_AMD016;
  235. info->sector_count = 32;
  236. info->size = 0x00200000;
  237. break; /* => 2 MB */
  238. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV033C:
  239. info->flash_id += FLASH_AMDLV033C;
  240. info->sector_count = 64;
  241. info->size = 0x00400000;
  242. break; /* => 4 MB */
  243. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400T:
  244. info->flash_id += FLASH_AM400T;
  245. info->sector_count = 11;
  246. info->size = 0x00080000;
  247. break; /* => 0.5 MB */
  248. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV400B:
  249. info->flash_id += FLASH_AM400B;
  250. info->sector_count = 11;
  251. info->size = 0x00080000;
  252. break; /* => 0.5 MB */
  253. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800T:
  254. info->flash_id += FLASH_AM800T;
  255. info->sector_count = 19;
  256. info->size = 0x00100000;
  257. break; /* => 1 MB */
  258. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV800B:
  259. info->flash_id += FLASH_AM800B;
  260. info->sector_count = 19;
  261. info->size = 0x00100000;
  262. break; /* => 1 MB */
  263. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160T:
  264. info->flash_id += FLASH_AM160T;
  265. info->sector_count = 35;
  266. info->size = 0x00200000;
  267. break; /* => 2 MB */
  268. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_ID_LV160B:
  269. info->flash_id += FLASH_AM160B;
  270. info->sector_count = 35;
  271. info->size = 0x00200000;
  272. break; /* => 2 MB */
  273. default:
  274. info->flash_id = FLASH_UNKNOWN;
  275. return (0); /* => no or unknown flash */
  276. }
  277. /* set up sector start address table */
  278. if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
  279. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
  280. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
  281. for (i = 0; i < info->sector_count; i++)
  282. info->start[i] = base + (i * 0x00010000);
  283. } else {
  284. if (info->flash_id & FLASH_BTYPE) {
  285. /* set sector offsets for bottom boot block type */
  286. info->start[0] = base + 0x00000000;
  287. info->start[1] = base + 0x00004000;
  288. info->start[2] = base + 0x00006000;
  289. info->start[3] = base + 0x00008000;
  290. for (i = 4; i < info->sector_count; i++) {
  291. info->start[i] =
  292. base + (i * 0x00010000) - 0x00030000;
  293. }
  294. } else {
  295. /* set sector offsets for top boot block type */
  296. i = info->sector_count - 1;
  297. info->start[i--] = base + info->size - 0x00004000;
  298. info->start[i--] = base + info->size - 0x00006000;
  299. info->start[i--] = base + info->size - 0x00008000;
  300. for (; i >= 0; i--) {
  301. info->start[i] = base + i * 0x00010000;
  302. }
  303. }
  304. }
  305. /* check for protected sectors */
  306. for (i = 0; i < info->sector_count; i++) {
  307. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  308. /* D0 = 1 if protected */
  309. addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
  310. /* For AMD29033C flash we need to resend the command of *
  311. * reading flash protection for upper 8 Mb of flash */
  312. if (i == 32) {
  313. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
  314. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
  315. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
  316. }
  317. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
  318. info->protect[i] = 0;
  319. else
  320. info->protect[i] = addr2[2] & 1;
  321. }
  322. /* issue bank reset to return to read mode */
  323. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
  324. return (info->size);
  325. }
  326. static int wait_for_DQ7_1(flash_info_t * info, int sect)
  327. {
  328. ulong start, now, last;
  329. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
  330. (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
  331. start = get_timer(0);
  332. last = start;
  333. while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
  334. (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
  335. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  336. printf("Timeout\n");
  337. return -1;
  338. }
  339. /* show that we're waiting */
  340. if ((now - last) > 1000) { /* every second */
  341. putc('.');
  342. last = now;
  343. }
  344. }
  345. return 0;
  346. }
  347. #ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
  348. int flash_erase(flash_info_t * info, int s_first, int s_last)
  349. {
  350. if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
  351. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
  352. ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
  353. ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
  354. return flash_erase_2(info, s_first, s_last);
  355. } else {
  356. return flash_erase_1(info, s_first, s_last);
  357. }
  358. }
  359. static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
  360. #else
  361. int flash_erase(flash_info_t * info, int s_first, int s_last)
  362. #endif
  363. {
  364. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
  365. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
  366. int flag, prot, sect;
  367. int i;
  368. if ((s_first < 0) || (s_first > s_last)) {
  369. if (info->flash_id == FLASH_UNKNOWN)
  370. printf("- missing\n");
  371. else
  372. printf("- no sectors to erase\n");
  373. return 1;
  374. }
  375. if (info->flash_id == FLASH_UNKNOWN) {
  376. printf("Can't erase unknown flash type - aborted\n");
  377. return 1;
  378. }
  379. prot = 0;
  380. for (sect = s_first; sect <= s_last; ++sect) {
  381. if (info->protect[sect])
  382. prot++;
  383. }
  384. if (prot)
  385. printf("- Warning: %d protected sectors will not be erased!", prot);
  386. printf("\n");
  387. /* Disable interrupts which might cause a timeout here */
  388. flag = disable_interrupts();
  389. /* Start erase on unprotected sectors */
  390. for (sect = s_first; sect <= s_last; sect++) {
  391. if (info->protect[sect] == 0) { /* not protected */
  392. addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
  393. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
  394. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  395. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  396. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
  397. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  398. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  399. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
  400. for (i = 0; i < 50; i++)
  401. udelay(1000); /* wait 1 ms */
  402. } else {
  403. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  404. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  405. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
  406. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  407. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  408. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
  409. }
  410. /*
  411. * Wait for each sector to complete, it's more
  412. * reliable. According to AMD Spec, you must
  413. * issue all erase commands within a specified
  414. * timeout. This has been seen to fail, especially
  415. * if printf()s are included (for debug)!!
  416. */
  417. wait_for_DQ7_1(info, sect);
  418. }
  419. }
  420. /* re-enable interrupts if necessary */
  421. if (flag)
  422. enable_interrupts();
  423. /* wait at least 80us - let's wait 1 ms */
  424. udelay(1000);
  425. /* reset to read mode */
  426. addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
  427. addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
  428. printf(" done\n");
  429. return 0;
  430. }
  431. /*-----------------------------------------------------------------------
  432. * Copy memory to flash, returns:
  433. * 0 - OK
  434. * 1 - write timeout
  435. * 2 - Flash not erased
  436. */
  437. int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  438. {
  439. ulong cp, wp, data;
  440. int i, l, rc;
  441. wp = (addr & ~3); /* get lower word aligned address */
  442. /*
  443. * handle unaligned start bytes
  444. */
  445. if ((l = addr - wp) != 0) {
  446. data = 0;
  447. for (i = 0, cp = wp; i < l; ++i, ++cp)
  448. data = (data << 8) | (*(uchar *) cp);
  449. for (; i < 4 && cnt > 0; ++i) {
  450. data = (data << 8) | *src++;
  451. --cnt;
  452. ++cp;
  453. }
  454. for (; cnt == 0 && i < 4; ++i, ++cp)
  455. data = (data << 8) | (*(uchar *) cp);
  456. if ((rc = write_word(info, wp, data)) != 0)
  457. return (rc);
  458. wp += 4;
  459. }
  460. /*
  461. * handle word aligned part
  462. */
  463. while (cnt >= 4) {
  464. data = 0;
  465. for (i = 0; i < 4; ++i)
  466. data = (data << 8) | *src++;
  467. if ((rc = write_word(info, wp, data)) != 0)
  468. return (rc);
  469. wp += 4;
  470. cnt -= 4;
  471. }
  472. if (cnt == 0)
  473. return (0);
  474. /*
  475. * handle unaligned tail bytes
  476. */
  477. data = 0;
  478. for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
  479. data = (data << 8) | *src++;
  480. --cnt;
  481. }
  482. for (; i < 4; ++i, ++cp)
  483. data = (data << 8) | (*(uchar *) cp);
  484. return (write_word(info, wp, data));
  485. }
  486. /*-----------------------------------------------------------------------
  487. * Copy memory to flash, returns:
  488. * 0 - OK
  489. * 1 - write timeout
  490. * 2 - Flash not erased
  491. */
  492. #ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
  493. static int write_word(flash_info_t * info, ulong dest, ulong data)
  494. {
  495. if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
  496. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
  497. ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) ||
  498. ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T)) {
  499. return write_word_2(info, dest, data);
  500. } else {
  501. return write_word_1(info, dest, data);
  502. }
  503. }
  504. static int write_word_1(flash_info_t * info, ulong dest, ulong data)
  505. #else
  506. static int write_word(flash_info_t * info, ulong dest, ulong data)
  507. #endif
  508. {
  509. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
  510. volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
  511. volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) & data;
  512. ulong start;
  513. int i, flag;
  514. /* Check if Flash is (sufficiently) erased */
  515. if ((*((vu_long *)dest) & data) != data)
  516. return (2);
  517. for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
  518. /* Disable interrupts which might cause a timeout here */
  519. flag = disable_interrupts();
  520. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  521. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  522. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
  523. dest2[i] = data2[i];
  524. /* re-enable interrupts if necessary */
  525. if (flag)
  526. enable_interrupts();
  527. /* data polling for D7 */
  528. start = get_timer(0);
  529. while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
  530. (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
  531. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
  532. return (1);
  533. }
  534. }
  535. return (0);
  536. }
  537. #ifdef CONFIG_SYS_FLASH_2ND_16BIT_DEV
  538. #undef CONFIG_SYS_FLASH_WORD_SIZE
  539. #define CONFIG_SYS_FLASH_WORD_SIZE unsigned short
  540. /*
  541. * The following code cannot be run from FLASH!
  542. */
  543. static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
  544. {
  545. short i;
  546. int n;
  547. CONFIG_SYS_FLASH_WORD_SIZE value;
  548. ulong base = (ulong) addr;
  549. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;
  550. DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
  551. /* issue bank reset to return to read mode */
  552. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
  553. /* Write auto select command: read Manufacturer ID */
  554. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  555. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  556. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
  557. udelay(1000);
  558. value = addr2[0];
  559. DEBUGF("FLASH MANUFACT: %x\n", value);
  560. switch (value) {
  561. case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
  562. info->flash_id = FLASH_MAN_AMD;
  563. break;
  564. case (CONFIG_SYS_FLASH_WORD_SIZE) FUJ_MANUFACT:
  565. info->flash_id = FLASH_MAN_FUJ;
  566. break;
  567. case (CONFIG_SYS_FLASH_WORD_SIZE) SST_MANUFACT:
  568. info->flash_id = FLASH_MAN_SST;
  569. break;
  570. case (CONFIG_SYS_FLASH_WORD_SIZE) STM_MANUFACT:
  571. info->flash_id = FLASH_MAN_STM;
  572. break;
  573. case (CONFIG_SYS_FLASH_WORD_SIZE) MX_MANUFACT:
  574. info->flash_id = FLASH_MAN_MX;
  575. break;
  576. default:
  577. info->flash_id = FLASH_UNKNOWN;
  578. info->sector_count = 0;
  579. info->size = 0;
  580. return (0); /* no or unknown flash */
  581. }
  582. value = addr2[1]; /* device ID */
  583. DEBUGF("\nFLASH DEVICEID: %x\n", value);
  584. switch (value) {
  585. case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320T:
  586. info->flash_id += FLASH_AM320T;
  587. info->sector_count = 71;
  588. info->size = 0x00400000;
  589. break; /* => 4 MB */
  590. case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_LV320B:
  591. info->flash_id += FLASH_AM320B;
  592. info->sector_count = 71;
  593. info->size = 0x00400000;
  594. break; /* => 4 MB */
  595. case (CONFIG_SYS_FLASH_WORD_SIZE)STM_ID_29W320DT:
  596. info->flash_id += FLASH_STMW320DT;
  597. info->sector_count = 67;
  598. info->size = 0x00400000;
  599. break; /* => 4 MB */
  600. case (CONFIG_SYS_FLASH_WORD_SIZE)MX_ID_LV320T:
  601. info->flash_id += FLASH_MXLV320T;
  602. info->sector_count = 71;
  603. info->size = 0x00400000;
  604. break; /* => 4 MB */
  605. default:
  606. info->flash_id = FLASH_UNKNOWN;
  607. return (0); /* => no or unknown flash */
  608. }
  609. /* set up sector start address table */
  610. if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
  611. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
  612. ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
  613. for (i = 0; i < info->sector_count; i++)
  614. info->start[i] = base + (i * 0x00010000);
  615. } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT) {
  616. /* set sector offsets for top boot block type */
  617. base += info->size;
  618. i = info->sector_count;
  619. /* 1 x 16k boot sector */
  620. base -= 16 << 10;
  621. --i;
  622. info->start[i] = base;
  623. /* 2 x 8k boot sectors */
  624. for (n = 0; n < 2; ++n) {
  625. base -= 8 << 10;
  626. --i;
  627. info->start[i] = base;
  628. }
  629. /* 1 x 32k boot sector */
  630. base -= 32 << 10;
  631. --i;
  632. info->start[i] = base;
  633. while (i > 0) { /* 64k regular sectors */
  634. base -= 64 << 10;
  635. --i;
  636. info->start[i] = base;
  637. }
  638. } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_MXLV320T) {
  639. i = info->sector_count - 1;
  640. info->start[i--] = base + info->size - 0x00002000;
  641. info->start[i--] = base + info->size - 0x00004000;
  642. info->start[i--] = base + info->size - 0x00006000;
  643. info->start[i--] = base + info->size - 0x00008000;
  644. info->start[i--] = base + info->size - 0x0000a000;
  645. info->start[i--] = base + info->size - 0x0000c000;
  646. info->start[i--] = base + info->size - 0x0000e000;
  647. info->start[i--] = base + info->size - 0x00010000;
  648. for (; i >= 0; i--)
  649. info->start[i] = base + i * 0x00010000;
  650. } else {
  651. if (info->flash_id & FLASH_BTYPE) {
  652. /* set sector offsets for bottom boot block type */
  653. info->start[0] = base + 0x00000000;
  654. info->start[1] = base + 0x00004000;
  655. info->start[2] = base + 0x00006000;
  656. info->start[3] = base + 0x00008000;
  657. for (i = 4; i < info->sector_count; i++)
  658. info->start[i] = base + (i * 0x00010000) - 0x00030000;
  659. } else {
  660. /* set sector offsets for top boot block type */
  661. i = info->sector_count - 1;
  662. info->start[i--] = base + info->size - 0x00004000;
  663. info->start[i--] = base + info->size - 0x00006000;
  664. info->start[i--] = base + info->size - 0x00008000;
  665. for (; i >= 0; i--)
  666. info->start[i] = base + i * 0x00010000;
  667. }
  668. }
  669. /* check for protected sectors */
  670. for (i = 0; i < info->sector_count; i++) {
  671. /* read sector protection at sector address, (A7 .. A0) = 0x02 */
  672. /* D0 = 1 if protected */
  673. addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
  674. /* For AMD29033C flash we need to resend the command of *
  675. * reading flash protection for upper 8 Mb of flash */
  676. if (i == 32) {
  677. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0xAAAAAAAA;
  678. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x55555555;
  679. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x90909090;
  680. }
  681. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
  682. info->protect[i] = 0;
  683. else
  684. info->protect[i] = addr2[2] & 1;
  685. }
  686. /* issue bank reset to return to read mode */
  687. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
  688. return (info->size);
  689. }
  690. static int wait_for_DQ7_2(flash_info_t * info, int sect)
  691. {
  692. ulong start, now, last;
  693. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
  694. (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
  695. start = get_timer(0);
  696. last = start;
  697. while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
  698. (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
  699. if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  700. printf("Timeout\n");
  701. return -1;
  702. }
  703. /* show that we're waiting */
  704. if ((now - last) > 1000) { /* every second */
  705. putc('.');
  706. last = now;
  707. }
  708. }
  709. return 0;
  710. }
  711. static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
  712. {
  713. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
  714. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
  715. int flag, prot, sect;
  716. int i;
  717. if ((s_first < 0) || (s_first > s_last)) {
  718. if (info->flash_id == FLASH_UNKNOWN)
  719. printf("- missing\n");
  720. else
  721. printf("- no sectors to erase\n");
  722. return 1;
  723. }
  724. if (info->flash_id == FLASH_UNKNOWN) {
  725. printf("Can't erase unknown flash type - aborted\n");
  726. return 1;
  727. }
  728. prot = 0;
  729. for (sect = s_first; sect <= s_last; ++sect) {
  730. if (info->protect[sect])
  731. prot++;
  732. }
  733. if (prot)
  734. printf("- Warning: %d protected sectors will not be erased!", prot);
  735. printf("\n");
  736. /* Disable interrupts which might cause a timeout here */
  737. flag = disable_interrupts();
  738. /* Start erase on unprotected sectors */
  739. for (sect = s_first; sect <= s_last; sect++) {
  740. if (info->protect[sect] == 0) { /* not protected */
  741. addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);
  742. if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
  743. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  744. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  745. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
  746. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  747. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  748. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00500050; /* block erase */
  749. for (i = 0; i < 50; i++)
  750. udelay(1000); /* wait 1 ms */
  751. } else {
  752. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  753. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  754. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
  755. addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  756. addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  757. addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
  758. }
  759. /*
  760. * Wait for each sector to complete, it's more
  761. * reliable. According to AMD Spec, you must
  762. * issue all erase commands within a specified
  763. * timeout. This has been seen to fail, especially
  764. * if printf()s are included (for debug)!!
  765. */
  766. wait_for_DQ7_2(info, sect);
  767. }
  768. }
  769. /* re-enable interrupts if necessary */
  770. if (flag)
  771. enable_interrupts();
  772. /* wait at least 80us - let's wait 1 ms */
  773. udelay(1000);
  774. /* reset to read mode */
  775. addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
  776. addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
  777. printf(" done\n");
  778. return 0;
  779. }
  780. static int write_word_2(flash_info_t * info, ulong dest, ulong data)
  781. {
  782. ulong *data_ptr = &data;
  783. volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
  784. volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *)dest;
  785. volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *)data_ptr;
  786. ulong start;
  787. int i;
  788. /* Check if Flash is (sufficiently) erased */
  789. if ((*((vu_long *)dest) & data) != data)
  790. return (2);
  791. for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
  792. int flag;
  793. /* Disable interrupts which might cause a timeout here */
  794. flag = disable_interrupts();
  795. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
  796. addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
  797. addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;
  798. dest2[i] = data2[i];
  799. /* re-enable interrupts if necessary */
  800. if (flag)
  801. enable_interrupts();
  802. /* data polling for D7 */
  803. start = get_timer(0);
  804. while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
  805. (data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {
  806. if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT)
  807. return (1);
  808. }
  809. }
  810. return (0);
  811. }
  812. #endif /* CONFIG_SYS_FLASH_2ND_16BIT_DEV */
  813. /*-----------------------------------------------------------------------
  814. * Functions
  815. */
  816. static ulong flash_get_size(vu_long * addr, flash_info_t * info);
  817. static int write_word(flash_info_t * info, ulong dest, ulong data);
  818. /*-----------------------------------------------------------------------
  819. */
  820. unsigned long flash_init(void)
  821. {
  822. unsigned long total_b = 0;
  823. unsigned long size_b[CONFIG_SYS_MAX_FLASH_BANKS];
  824. unsigned short index = 0;
  825. int i;
  826. unsigned long val;
  827. unsigned long ebc_boot_size;
  828. unsigned long boot_selection;
  829. mfsdr(sdr_pstrp0, val);
  830. index = (val & SDR0_PSTRP0_BOOTSTRAP_MASK) >> 28;
  831. if ((index == 0xc) || (index == 8)) {
  832. /*
  833. * Boot Settings in IIC EEprom address 0xA8 or 0xA0
  834. * Read Serial Device Strap Register1 in PPC440SPe
  835. */
  836. mfsdr(SDR0_SDSTP1, val);
  837. boot_selection = val & SDR0_SDSTP1_BOOT_SEL_MASK;
  838. ebc_boot_size = val & SDR0_SDSTP1_EBC_ROM_BS_MASK;
  839. switch(boot_selection) {
  840. case SDR0_SDSTP1_BOOT_SEL_EBC:
  841. switch(ebc_boot_size) {
  842. case SDR0_SDSTP1_EBC_ROM_BS_16BIT:
  843. index = 3;
  844. break;
  845. case SDR0_SDSTP1_EBC_ROM_BS_8BIT:
  846. index = 0;
  847. break;
  848. }
  849. break;
  850. case SDR0_SDSTP1_BOOT_SEL_PCI:
  851. index = 1;
  852. break;
  853. }
  854. } /*else if (index == 0) {*/
  855. /* if (in8(FPGA_SETTING_REG) & FPGA_SET_REG_OP_CODE_FLASH_ABOVE)*/
  856. /* index = 8;*/ /* sram below op code flash -> new index 8*/
  857. /* }*/
  858. DEBUGF("\n");
  859. DEBUGF("FLASH: Index: %d\n", index);
  860. /* Init: no FLASHes known */
  861. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  862. flash_info[i].flash_id = FLASH_UNKNOWN;
  863. flash_info[i].sector_count = -1;
  864. flash_info[i].size = 0;
  865. /* check whether the address is 0 */
  866. if (flash_addr_table[index][i] == 0)
  867. continue;
  868. /* call flash_get_size() to initialize sector address */
  869. size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i],
  870. &flash_info[i]);
  871. flash_info[i].size = size_b[i];
  872. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  873. printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
  874. i, size_b[i], size_b[i] << 20);
  875. flash_info[i].sector_count = -1;
  876. flash_info[i].size = 0;
  877. }
  878. /* Monitor protection ON by default */
  879. (void)flash_protect(FLAG_PROTECT_SET, CONFIG_SYS_MONITOR_BASE,
  880. CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN - 1,
  881. &flash_info[i]);
  882. #if defined(CONFIG_ENV_IS_IN_FLASH)
  883. (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR,
  884. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  885. &flash_info[i]);
  886. #if defined(CONFIG_ENV_ADDR_REDUND)
  887. (void)flash_protect(FLAG_PROTECT_SET, CONFIG_ENV_ADDR_REDUND,
  888. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  889. &flash_info[i]);
  890. #endif
  891. #endif
  892. total_b += flash_info[i].size;
  893. }
  894. return total_b;
  895. }