call32.S 1.2 KB

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  1. /*
  2. * (C) Copyright 2015 Google, Inc
  3. * Written by Simon Glass <sjg@chromium.org>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <asm/global_data.h>
  8. #include <asm/msr-index.h>
  9. #include <asm/processor-flags.h>
  10. /*
  11. * rdi - 32-bit code segment selector
  12. * rsi - target address
  13. * rdx - table address (0 if none)
  14. */
  15. .code64
  16. .globl cpu_call32
  17. cpu_call32:
  18. cli
  19. /* Save table pointer */
  20. mov %edx, %ebx
  21. /*
  22. * Debugging option, this outputs characters to the console UART
  23. * mov $0x3f8,%edx
  24. * mov $'a',%al
  25. * out %al,(%dx)
  26. */
  27. pushf
  28. push %rdi /* 32-bit code segment */
  29. lea compat(%rip), %rax
  30. push %rax
  31. .byte 0x48 /* REX prefix to force 64-bit far return */
  32. retf
  33. .code32
  34. compat:
  35. /*
  36. * We are now in compatibility mode with a default operand size of
  37. * 32 bits. First disable paging.
  38. */
  39. movl %cr0, %eax
  40. andl $~X86_CR0_PG, %eax
  41. movl %eax, %cr0
  42. /* Invalidate TLB */
  43. xorl %eax, %eax
  44. movl %eax, %cr3
  45. /* Disable Long mode in EFER (Extended Feature Enable Register) */
  46. movl $MSR_EFER, %ecx
  47. rdmsr
  48. btr $_EFER_LME, %eax
  49. wrmsr
  50. /* Set up table pointer for _x86boot_start */
  51. mov %ebx, %ecx
  52. /* Jump to the required target */
  53. pushl %edi /* 32-bit code segment */
  54. pushl %esi /* 32-bit target address */
  55. retf