timer.c 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115
  1. /*
  2. * (C) Copyright 2007 Michal Simek
  3. *
  4. * Michal SIMEK <monstr@monstr.eu>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <fdtdec.h>
  10. #include <asm/microblaze_timer.h>
  11. #include <asm/microblaze_intc.h>
  12. DECLARE_GLOBAL_DATA_PTR;
  13. volatile int timestamp = 0;
  14. microblaze_timer_t *tmr;
  15. ulong get_timer (ulong base)
  16. {
  17. if (tmr)
  18. return timestamp - base;
  19. return timestamp++ - base;
  20. }
  21. void __udelay(unsigned long usec)
  22. {
  23. u32 i;
  24. if (tmr) {
  25. i = get_timer(0);
  26. while ((get_timer(0) - i) < (usec / 1000))
  27. ;
  28. }
  29. }
  30. #ifndef CONFIG_SPL_BUILD
  31. static void timer_isr(void *arg)
  32. {
  33. timestamp++;
  34. tmr->control = tmr->control | TIMER_INTERRUPT;
  35. }
  36. int timer_init (void)
  37. {
  38. int irq = -1;
  39. u32 preload = 0;
  40. u32 ret = 0;
  41. const void *blob = gd->fdt_blob;
  42. int node = 0;
  43. u32 cell[2];
  44. debug("TIMER: Initialization\n");
  45. node = fdt_node_offset_by_compatible(blob, node,
  46. "xlnx,xps-timer-1.00.a");
  47. if (node != -1) {
  48. fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
  49. if (base == FDT_ADDR_T_NONE)
  50. return -1;
  51. debug("TIMER: Base addr %lx\n", base);
  52. tmr = (microblaze_timer_t *)base;
  53. ret = fdtdec_get_int_array(blob, node, "interrupts",
  54. cell, ARRAY_SIZE(cell));
  55. if (ret)
  56. return ret;
  57. irq = cell[0];
  58. debug("TIMER: IRQ %x\n", irq);
  59. preload = fdtdec_get_int(blob, node, "clock-frequency", 0);
  60. preload /= CONFIG_SYS_HZ;
  61. } else {
  62. return node;
  63. }
  64. if (tmr && preload && irq >= 0) {
  65. tmr->loadreg = preload;
  66. tmr->control = TIMER_INTERRUPT | TIMER_RESET;
  67. tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
  68. TIMER_RELOAD | TIMER_DOWN_COUNT;
  69. timestamp = 0;
  70. ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
  71. if (ret)
  72. tmr = NULL;
  73. }
  74. /* No problem if timer is not found/initialized */
  75. return 0;
  76. }
  77. #else
  78. int timer_init(void)
  79. {
  80. return 0;
  81. }
  82. #endif
  83. /*
  84. * This function is derived from PowerPC code (read timebase as long long).
  85. * On Microblaze it just returns the timer value.
  86. */
  87. unsigned long long get_ticks(void)
  88. {
  89. return get_timer(0);
  90. }
  91. /*
  92. * This function is derived from PowerPC code (timebase clock frequency).
  93. * On Microblaze it returns the number of timer ticks per second.
  94. */
  95. ulong get_tbclk(void)
  96. {
  97. return CONFIG_SYS_HZ;
  98. }