lxt972.c 2.4 KB

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  1. /*
  2. * Intel LXT971/LXT972 PHY Driver for TI DaVinci
  3. * (TMS320DM644x) based boards.
  4. *
  5. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  6. *
  7. * --------------------------------------------------------
  8. *
  9. * SPDX-License-Identifier: GPL-2.0+
  10. */
  11. #include <common.h>
  12. #include <net.h>
  13. #include <miiphy.h>
  14. #include <lxt971a.h>
  15. #include <asm/arch/emac_defs.h>
  16. #include "../../../drivers/net/davinci_emac.h"
  17. #ifdef CONFIG_DRIVER_TI_EMAC
  18. #ifdef CONFIG_CMD_NET
  19. int lxt972_is_phy_connected(int phy_addr)
  20. {
  21. u_int16_t id1, id2;
  22. if (!davinci_eth_phy_read(phy_addr, MII_PHYSID1, &id1))
  23. return(0);
  24. if (!davinci_eth_phy_read(phy_addr, MII_PHYSID2, &id2))
  25. return(0);
  26. if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0))
  27. return(1);
  28. return(0);
  29. }
  30. int lxt972_get_link_speed(int phy_addr)
  31. {
  32. u_int16_t stat1, tmp;
  33. volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR;
  34. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
  35. return(0);
  36. if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */
  37. return(0);
  38. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
  39. return(0);
  40. tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
  41. davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
  42. /* Read back */
  43. if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
  44. return(0);
  45. /* Speed doesn't matter, there is no setting for it in EMAC... */
  46. if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
  47. /* set DM644x EMAC for Full Duplex */
  48. emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE |
  49. EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
  50. } else {
  51. /*set DM644x EMAC for Half Duplex */
  52. emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
  53. }
  54. return(1);
  55. }
  56. int lxt972_init_phy(int phy_addr)
  57. {
  58. int ret = 1;
  59. if (!lxt972_get_link_speed(phy_addr)) {
  60. /* Try another time */
  61. ret = lxt972_get_link_speed(phy_addr);
  62. }
  63. /* Disable PHY Interrupts */
  64. davinci_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
  65. return(ret);
  66. }
  67. int lxt972_auto_negotiate(int phy_addr)
  68. {
  69. u_int16_t tmp;
  70. if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp))
  71. return(0);
  72. /* Restart Auto_negotiation */
  73. tmp |= BMCR_ANRESTART;
  74. davinci_eth_phy_write(phy_addr, MII_BMCR, tmp);
  75. /*check AutoNegotiate complete */
  76. udelay (10000);
  77. if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp))
  78. return(0);
  79. if (!(tmp & BMSR_ANEGCOMPLETE))
  80. return(0);
  81. return (lxt972_get_link_speed(phy_addr));
  82. }
  83. #endif /* CONFIG_CMD_NET */
  84. #endif /* CONFIG_DRIVER_ETHER */