spl.c 2.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. /*
  2. * Copyright (C) 2014 Gateworks Corporation
  3. * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
  4. *
  5. * Author: Tim Harvey <tharvey@gateworks.com>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <common.h>
  10. #include <asm/io.h>
  11. #include <asm/arch/imx-regs.h>
  12. #include <asm/spl.h>
  13. #include <spl.h>
  14. #include <asm/imx-common/hab.h>
  15. #if defined(CONFIG_MX6)
  16. /* determine boot device from SRC_SBMR1 (BOOT_CFG[4:1]) or SRC_GPR9 register */
  17. u32 spl_boot_device(void)
  18. {
  19. struct src *psrc = (struct src *)SRC_BASE_ADDR;
  20. unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28);
  21. unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1);
  22. unsigned int bmode = readl(&psrc->sbmr2);
  23. /*
  24. * Check for BMODE if serial downloader is enabled
  25. * BOOT_MODE - see IMX6DQRM Table 8-1
  26. */
  27. if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */
  28. (gpr10_boot && (reg == 1)))
  29. return BOOT_DEVICE_UART;
  30. /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
  31. switch ((reg & 0x000000FF) >> 4) {
  32. /* EIM: See 8.5.1, Table 8-9 */
  33. case 0x0:
  34. /* BOOT_CFG1[3]: NOR/OneNAND Selection */
  35. if ((reg & 0x00000008) >> 3)
  36. return BOOT_DEVICE_ONENAND;
  37. else
  38. return BOOT_DEVICE_NOR;
  39. break;
  40. /* SATA: See 8.5.4, Table 8-20 */
  41. case 0x2:
  42. return BOOT_DEVICE_SATA;
  43. /* Serial ROM: See 8.5.5.1, Table 8-22 */
  44. case 0x3:
  45. /* BOOT_CFG4[2:0] */
  46. switch ((reg & 0x07000000) >> 24) {
  47. case 0x0 ... 0x4:
  48. return BOOT_DEVICE_SPI;
  49. case 0x5 ... 0x7:
  50. return BOOT_DEVICE_I2C;
  51. }
  52. break;
  53. /* SD/eSD: 8.5.3, Table 8-15 */
  54. case 0x4:
  55. case 0x5:
  56. return BOOT_DEVICE_MMC1;
  57. /* MMC/eMMC: 8.5.3 */
  58. case 0x6:
  59. case 0x7:
  60. return BOOT_DEVICE_MMC1;
  61. /* NAND Flash: 8.5.2 */
  62. case 0x8 ... 0xf:
  63. return BOOT_DEVICE_NAND;
  64. }
  65. return BOOT_DEVICE_NONE;
  66. }
  67. #endif
  68. #if defined(CONFIG_SPL_MMC_SUPPORT)
  69. /* called from spl_mmc to see type of boot mode for storage (RAW or FAT) */
  70. u32 spl_boot_mode(const u32 boot_device)
  71. {
  72. switch (spl_boot_device()) {
  73. /* for MMC return either RAW or FAT mode */
  74. case BOOT_DEVICE_MMC1:
  75. case BOOT_DEVICE_MMC2:
  76. #if defined(CONFIG_SPL_FAT_SUPPORT)
  77. return MMCSD_MODE_FS;
  78. #elif defined(CONFIG_SUPPORT_EMMC_BOOT)
  79. return MMCSD_MODE_EMMCBOOT;
  80. #else
  81. return MMCSD_MODE_RAW;
  82. #endif
  83. break;
  84. default:
  85. puts("spl: ERROR: unsupported device\n");
  86. hang();
  87. }
  88. }
  89. #endif
  90. #if defined(CONFIG_SECURE_BOOT)
  91. __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
  92. {
  93. typedef void __noreturn (*image_entry_noargs_t)(void);
  94. image_entry_noargs_t image_entry =
  95. (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
  96. debug("image entry point: 0x%X\n", spl_image->entry_point);
  97. /* HAB looks for the CSF at the end of the authenticated data therefore,
  98. * we need to subtract the size of the CSF from the actual filesize */
  99. if (authenticate_image(spl_image->load_addr,
  100. spl_image->size - CONFIG_CSF_SIZE)) {
  101. image_entry();
  102. } else {
  103. puts("spl: ERROR: image authentication unsuccessful\n");
  104. hang();
  105. }
  106. }
  107. #endif