zynq-zc706.dts 5.3 KB

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  1. /*
  2. * Xilinx ZC706 board DTS
  3. *
  4. * Copyright (C) 2011 - 2015 Xilinx
  5. * Copyright (C) 2012 National Instruments Corp.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. /dts-v1/;
  10. #include "zynq-7000.dtsi"
  11. / {
  12. model = "Zynq ZC706 Development Board";
  13. compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
  14. aliases {
  15. ethernet0 = &gem0;
  16. i2c0 = &i2c0;
  17. serial0 = &uart1;
  18. spi0 = &qspi;
  19. mmc0 = &sdhci0;
  20. };
  21. memory@0 {
  22. device_type = "memory";
  23. reg = <0x0 0x40000000>;
  24. };
  25. chosen {
  26. bootargs = "";
  27. stdout-path = "serial0:115200n8";
  28. };
  29. usb_phy0: phy0 {
  30. compatible = "usb-nop-xceiv";
  31. #phy-cells = <0>;
  32. };
  33. };
  34. &clkc {
  35. ps-clk-frequency = <33333333>;
  36. };
  37. &gem0 {
  38. status = "okay";
  39. phy-mode = "rgmii-id";
  40. phy-handle = <&ethernet_phy>;
  41. pinctrl-names = "default";
  42. pinctrl-0 = <&pinctrl_gem0_default>;
  43. ethernet_phy: ethernet-phy@7 {
  44. reg = <7>;
  45. };
  46. };
  47. &gpio0 {
  48. pinctrl-names = "default";
  49. pinctrl-0 = <&pinctrl_gpio0_default>;
  50. };
  51. &i2c0 {
  52. status = "okay";
  53. clock-frequency = <400000>;
  54. pinctrl-names = "default";
  55. pinctrl-0 = <&pinctrl_i2c0_default>;
  56. i2cswitch@74 {
  57. compatible = "nxp,pca9548";
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. reg = <0x74>;
  61. i2c@0 {
  62. #address-cells = <1>;
  63. #size-cells = <0>;
  64. reg = <0>;
  65. si570: clock-generator@5d {
  66. #clock-cells = <0>;
  67. compatible = "silabs,si570";
  68. temperature-stability = <50>;
  69. reg = <0x5d>;
  70. factory-fout = <156250000>;
  71. clock-frequency = <148500000>;
  72. };
  73. };
  74. i2c@1 {
  75. #address-cells = <1>;
  76. #size-cells = <0>;
  77. reg = <1>;
  78. adv7511: hdmi-tx@39 {
  79. compatible = "adi,adv7511";
  80. reg = <0x39>;
  81. adi,input-depth = <8>;
  82. adi,input-colorspace = "yuv422";
  83. adi,input-clock = "1x";
  84. adi,input-style = <3>;
  85. adi,input-justification = "evenly";
  86. };
  87. };
  88. i2c@2 {
  89. #address-cells = <1>;
  90. #size-cells = <0>;
  91. reg = <2>;
  92. eeprom@54 {
  93. compatible = "at,24c08";
  94. reg = <0x54>;
  95. };
  96. };
  97. i2c@3 {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. reg = <3>;
  101. gpio@21 {
  102. compatible = "ti,tca6416";
  103. reg = <0x21>;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. };
  107. };
  108. i2c@4 {
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. reg = <4>;
  112. rtc@51 {
  113. compatible = "nxp,pcf8563";
  114. reg = <0x51>;
  115. };
  116. };
  117. i2c@7 {
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. reg = <7>;
  121. ucd90120@65 {
  122. compatible = "ti,ucd90120";
  123. reg = <0x65>;
  124. };
  125. };
  126. };
  127. };
  128. &pinctrl0 {
  129. pinctrl_gem0_default: gem0-default {
  130. mux {
  131. function = "ethernet0";
  132. groups = "ethernet0_0_grp";
  133. };
  134. conf {
  135. groups = "ethernet0_0_grp";
  136. slew-rate = <0>;
  137. io-standard = <4>;
  138. };
  139. conf-rx {
  140. pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
  141. bias-high-impedance;
  142. low-power-disable;
  143. };
  144. conf-tx {
  145. pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
  146. low-power-enable;
  147. bias-disable;
  148. };
  149. mux-mdio {
  150. function = "mdio0";
  151. groups = "mdio0_0_grp";
  152. };
  153. conf-mdio {
  154. groups = "mdio0_0_grp";
  155. slew-rate = <0>;
  156. io-standard = <1>;
  157. bias-disable;
  158. };
  159. };
  160. pinctrl_gpio0_default: gpio0-default {
  161. mux {
  162. function = "gpio0";
  163. groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
  164. };
  165. conf {
  166. groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp";
  167. slew-rate = <0>;
  168. io-standard = <1>;
  169. };
  170. conf-pull-up {
  171. pins = "MIO46", "MIO47";
  172. bias-pull-up;
  173. };
  174. conf-pull-none {
  175. pins = "MIO7";
  176. bias-disable;
  177. };
  178. };
  179. pinctrl_i2c0_default: i2c0-default {
  180. mux {
  181. groups = "i2c0_10_grp";
  182. function = "i2c0";
  183. };
  184. conf {
  185. groups = "i2c0_10_grp";
  186. bias-pull-up;
  187. slew-rate = <0>;
  188. io-standard = <1>;
  189. };
  190. };
  191. pinctrl_sdhci0_default: sdhci0-default {
  192. mux {
  193. groups = "sdio0_2_grp";
  194. function = "sdio0";
  195. };
  196. conf {
  197. groups = "sdio0_2_grp";
  198. slew-rate = <0>;
  199. io-standard = <1>;
  200. bias-disable;
  201. };
  202. mux-cd {
  203. groups = "gpio0_14_grp";
  204. function = "sdio0_cd";
  205. };
  206. conf-cd {
  207. groups = "gpio0_14_grp";
  208. bias-high-impedance;
  209. bias-pull-up;
  210. slew-rate = <0>;
  211. io-standard = <1>;
  212. };
  213. mux-wp {
  214. groups = "gpio0_15_grp";
  215. function = "sdio0_wp";
  216. };
  217. conf-wp {
  218. groups = "gpio0_15_grp";
  219. bias-high-impedance;
  220. bias-pull-up;
  221. slew-rate = <0>;
  222. io-standard = <1>;
  223. };
  224. };
  225. pinctrl_uart1_default: uart1-default {
  226. mux {
  227. groups = "uart1_10_grp";
  228. function = "uart1";
  229. };
  230. conf {
  231. groups = "uart1_10_grp";
  232. slew-rate = <0>;
  233. io-standard = <1>;
  234. };
  235. conf-rx {
  236. pins = "MIO49";
  237. bias-high-impedance;
  238. };
  239. conf-tx {
  240. pins = "MIO48";
  241. bias-disable;
  242. };
  243. };
  244. pinctrl_usb0_default: usb0-default {
  245. mux {
  246. groups = "usb0_0_grp";
  247. function = "usb0";
  248. };
  249. conf {
  250. groups = "usb0_0_grp";
  251. slew-rate = <0>;
  252. io-standard = <1>;
  253. };
  254. conf-rx {
  255. pins = "MIO29", "MIO31", "MIO36";
  256. bias-high-impedance;
  257. };
  258. conf-tx {
  259. pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
  260. "MIO35", "MIO37", "MIO38", "MIO39";
  261. bias-disable;
  262. };
  263. };
  264. };
  265. &qspi {
  266. u-boot,dm-pre-reloc;
  267. status = "okay";
  268. };
  269. &sdhci0 {
  270. u-boot,dm-pre-reloc;
  271. status = "okay";
  272. pinctrl-names = "default";
  273. pinctrl-0 = <&pinctrl_sdhci0_default>;
  274. };
  275. &uart1 {
  276. u-boot,dm-pre-reloc;
  277. status = "okay";
  278. pinctrl-names = "default";
  279. pinctrl-0 = <&pinctrl_uart1_default>;
  280. };
  281. &usb0 {
  282. status = "okay";
  283. dr_mode = "host";
  284. usb-phy = <&usb_phy0>;
  285. pinctrl-names = "default";
  286. pinctrl-0 = <&pinctrl_usb0_default>;
  287. };