keystone-k2l-evm.dts 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132
  1. /*
  2. * Copyright 2014 Texas Instruments, Inc.
  3. *
  4. * Keystone 2 Lamarr EVM device tree
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. /dts-v1/;
  11. #include "keystone.dtsi"
  12. #include "keystone-k2l.dtsi"
  13. / {
  14. compatible = "ti,k2l-evm","ti,keystone";
  15. model = "Texas Instruments Keystone 2 Lamarr EVM";
  16. soc {
  17. clocks {
  18. refclksys: refclksys {
  19. #clock-cells = <0>;
  20. compatible = "fixed-clock";
  21. clock-frequency = <122880000>;
  22. clock-output-names = "refclk-sys";
  23. };
  24. };
  25. };
  26. };
  27. &usb_phy {
  28. status = "okay";
  29. };
  30. &usb {
  31. status = "okay";
  32. };
  33. &i2c0 {
  34. dtt@50 {
  35. compatible = "at,24c1024";
  36. reg = <0x50>;
  37. };
  38. };
  39. &aemif {
  40. cs0 {
  41. #address-cells = <2>;
  42. #size-cells = <1>;
  43. clock-ranges;
  44. ranges;
  45. ti,cs-chipselect = <0>;
  46. /* all timings in nanoseconds */
  47. ti,cs-min-turnaround-ns = <12>;
  48. ti,cs-read-hold-ns = <6>;
  49. ti,cs-read-strobe-ns = <23>;
  50. ti,cs-read-setup-ns = <9>;
  51. ti,cs-write-hold-ns = <8>;
  52. ti,cs-write-strobe-ns = <23>;
  53. ti,cs-write-setup-ns = <8>;
  54. nand@0,0 {
  55. compatible = "ti,keystone-nand","ti,davinci-nand";
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. reg = <0 0 0x4000000
  59. 1 0 0x0000100>;
  60. ti,davinci-chipselect = <0>;
  61. ti,davinci-mask-ale = <0x2000>;
  62. ti,davinci-mask-cle = <0x4000>;
  63. ti,davinci-mask-chipsel = <0>;
  64. nand-ecc-mode = "hw";
  65. ti,davinci-ecc-bits = <4>;
  66. nand-on-flash-bbt;
  67. partition@0 {
  68. label = "u-boot";
  69. reg = <0x0 0x100000>;
  70. read-only;
  71. };
  72. partition@100000 {
  73. label = "params";
  74. reg = <0x100000 0x80000>;
  75. read-only;
  76. };
  77. partition@180000 {
  78. label = "ubifs";
  79. reg = <0x180000 0x7FE80000>;
  80. };
  81. };
  82. };
  83. };
  84. &spi0 {
  85. status ="okay";
  86. nor_flash: n25q128a11@0 {
  87. #address-cells = <1>;
  88. #size-cells = <1>;
  89. compatible = "Micron,n25q128a11", "spi-flash";
  90. spi-max-frequency = <54000000>;
  91. m25p,fast-read;
  92. reg = <0>;
  93. partition@0 {
  94. label = "u-boot-spl";
  95. reg = <0x0 0x80000>;
  96. read-only;
  97. };
  98. partition@1 {
  99. label = "misc";
  100. reg = <0x80000 0xf80000>;
  101. };
  102. };
  103. };
  104. &mdio {
  105. status = "ok";
  106. ethphy0: ethernet-phy@0 {
  107. compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
  108. reg = <0>;
  109. };
  110. ethphy1: ethernet-phy@1 {
  111. compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
  112. reg = <1>;
  113. };
  114. };