keystone-k2g.dtsi 4.4 KB

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  1. /*
  2. * Copyright 2014 Texas Instruments, Inc.
  3. *
  4. * Keystone 2 Galileo soc device tree
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <dt-bindings/interrupt-controller/arm-gic.h>
  11. #include "skeleton.dtsi"
  12. / {
  13. model = "Texas Instruments Keystone 2 SoC";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. interrupt-parent = <&gic>;
  17. aliases {
  18. serial0 = &uart0;
  19. spi0 = &spi0;
  20. spi1 = &spi1;
  21. spi2 = &spi2;
  22. spi3 = &spi3;
  23. spi4 = &qspi;
  24. };
  25. memory {
  26. device_type = "memory";
  27. reg = <0x80000000 0x80000000>;
  28. };
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. interrupt-parent = <&gic>;
  33. cpu@0 {
  34. compatible = "arm,cortex-a15";
  35. device_type = "cpu";
  36. reg = <0>;
  37. };
  38. };
  39. gic: interrupt-controller {
  40. compatible = "arm,cortex-a15-gic";
  41. #interrupt-cells = <3>;
  42. interrupt-controller;
  43. reg = <0x0 0x02561000 0x0 0x1000>,
  44. <0x0 0x02562000 0x0 0x2000>,
  45. <0x0 0x02564000 0x0 0x1000>,
  46. <0x0 0x02566000 0x0 0x2000>;
  47. interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
  48. IRQ_TYPE_LEVEL_HIGH)>;
  49. };
  50. soc {
  51. #address-cells = <1>;
  52. #size-cells = <1>;
  53. compatible = "ti,keystone","simple-bus";
  54. interrupt-parent = <&gic>;
  55. ranges;
  56. uart0: serial@02530c00 {
  57. compatible = "ns16550a";
  58. current-speed = <115200>;
  59. reg-shift = <2>;
  60. reg-io-width = <4>;
  61. reg = <0x02530c00 0x100>;
  62. clock-names = "uart";
  63. interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
  64. };
  65. mdio: mdio@4200f00 {
  66. compatible = "ti,keystone_mdio", "ti,davinci_mdio";
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
  70. /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
  71. clock-names = "fck";
  72. reg = <0x04200f00 0x100>;
  73. status = "disabled";
  74. bus_freq = <2500000>;
  75. };
  76. qspi: qspi@2940000 {
  77. compatible = "cadence,qspi";
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. reg = <0x02940000 0x1000>,
  81. <0x24000000 0x4000000>;
  82. interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>;
  83. num-cs = <4>;
  84. fifo-depth = <256>;
  85. sram-size = <256>;
  86. status = "disabled";
  87. };
  88. #include "keystone-k2g-netcp.dtsi"
  89. pmmc: pmmc@2900000 {
  90. compatible = "ti,power-processor";
  91. reg = <0x02900000 0x40000>;
  92. ti,lpsc_module = <1>;
  93. };
  94. spi0: spi@21805400 {
  95. compatible = "ti,keystone-spi", "ti,dm6441-spi";
  96. reg = <0x21805400 0x200>;
  97. num-cs = <4>;
  98. ti,davinci-spi-intr-line = <0>;
  99. interrupts = <GIC_SPI 64 IRQ_TYPE_EDGE_RISING>;
  100. #address-cells = <1>;
  101. #size-cells = <0>;
  102. status = "disabled";
  103. };
  104. spi1: spi@21805800 {
  105. compatible = "ti,keystone-spi", "ti,dm6441-spi";
  106. reg = <0x21805800 0x200>;
  107. num-cs = <4>;
  108. ti,davinci-spi-intr-line = <0>;
  109. interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>;
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. status = "disabled";
  113. };
  114. spi2: spi@21805c00 {
  115. compatible = "ti,keystone-spi", "ti,dm6441-spi";
  116. reg = <0x21805C00 0x200>;
  117. num-cs = <4>;
  118. ti,davinci-spi-intr-line = <0>;
  119. interrupts = <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. status = "disabled";
  123. };
  124. spi3: spi@21806000 {
  125. compatible = "ti,keystone-spi", "ti,dm6441-spi";
  126. reg = <0x21806000 0x200>;
  127. num-cs = <4>;
  128. ti,davinci-spi-intr-line = <0>;
  129. interrupts = <GIC_SPI 70 IRQ_TYPE_EDGE_RISING>;
  130. #address-cells = <1>;
  131. #size-cells = <0>;
  132. status = "disabled";
  133. };
  134. mmc0: mmc@23000000 {
  135. compatible = "ti,omap4-hsmmc";
  136. reg = <0x23000000 0x400>;
  137. interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
  138. bus-width = <4>;
  139. ti,needs-special-reset;
  140. no-1-8-v;
  141. max-frequency = <96000000>;
  142. status = "disabled";
  143. };
  144. mmc1: mmc@23100000 {
  145. compatible = "ti,omap4-hsmmc";
  146. reg = <0x23100000 0x400>;
  147. interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
  148. bus-width = <8>;
  149. ti,needs-special-reset;
  150. ti,non-removable;
  151. max-frequency = <96000000>;
  152. status = "disabled";
  153. clock-names = "fck";
  154. };
  155. gpmc: gpmc@21818000 {
  156. compatible = "ti,am3352-gpmc";
  157. #address-cells = <2>;
  158. #size-cells = <1>;
  159. reg = <0x21818000 0x400>;
  160. interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
  161. gpmc,num-cs = <4>;
  162. gpmc,num-waitpins = <2>;
  163. status = "disabled";
  164. };
  165. elm: elm@021c8000 {
  166. compatible = "ti,am3352-elm";
  167. reg = <0x021c8000 0x2000>;
  168. interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
  169. status = "disabled";
  170. };
  171. };
  172. };