keystone-clocks.dtsi 9.6 KB

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  1. /*
  2. * Device Tree Source for Keystone 2 clock tree
  3. *
  4. * Copyright (C) 2013 Texas Instruments, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. clocks {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges;
  14. mainmuxclk: mainmuxclk@2310108 {
  15. #clock-cells = <0>;
  16. compatible = "ti,keystone,pll-mux-clock";
  17. clocks = <&mainpllclk>, <&refclksys>;
  18. reg = <0x02310108 4>;
  19. bit-shift = <23>;
  20. bit-mask = <1>;
  21. clock-output-names = "mainmuxclk";
  22. };
  23. chipclk1: chipclk1 {
  24. #clock-cells = <0>;
  25. compatible = "fixed-factor-clock";
  26. clocks = <&mainmuxclk>;
  27. clock-div = <1>;
  28. clock-mult = <1>;
  29. clock-output-names = "chipclk1";
  30. };
  31. chipclk1rstiso: chipclk1rstiso {
  32. #clock-cells = <0>;
  33. compatible = "fixed-factor-clock";
  34. clocks = <&mainmuxclk>;
  35. clock-div = <1>;
  36. clock-mult = <1>;
  37. clock-output-names = "chipclk1rstiso";
  38. };
  39. gemtraceclk: gemtraceclk@2310120 {
  40. #clock-cells = <0>;
  41. compatible = "ti,keystone,pll-divider-clock";
  42. clocks = <&mainmuxclk>;
  43. reg = <0x02310120 4>;
  44. bit-shift = <0>;
  45. bit-mask = <8>;
  46. clock-output-names = "gemtraceclk";
  47. };
  48. chipstmxptclk: chipstmxptclk {
  49. #clock-cells = <0>;
  50. compatible = "ti,keystone,pll-divider-clock";
  51. clocks = <&mainmuxclk>;
  52. reg = <0x02310164 4>;
  53. bit-shift = <0>;
  54. bit-mask = <8>;
  55. clock-output-names = "chipstmxptclk";
  56. };
  57. chipclk12: chipclk12 {
  58. #clock-cells = <0>;
  59. compatible = "fixed-factor-clock";
  60. clocks = <&chipclk1>;
  61. clock-div = <2>;
  62. clock-mult = <1>;
  63. clock-output-names = "chipclk12";
  64. };
  65. chipclk13: chipclk13 {
  66. #clock-cells = <0>;
  67. compatible = "fixed-factor-clock";
  68. clocks = <&chipclk1>;
  69. clock-div = <3>;
  70. clock-mult = <1>;
  71. clock-output-names = "chipclk13";
  72. };
  73. paclk13: paclk13 {
  74. #clock-cells = <0>;
  75. compatible = "fixed-factor-clock";
  76. clocks = <&papllclk>;
  77. clock-div = <3>;
  78. clock-mult = <1>;
  79. clock-output-names = "paclk13";
  80. };
  81. chipclk14: chipclk14 {
  82. #clock-cells = <0>;
  83. compatible = "fixed-factor-clock";
  84. clocks = <&chipclk1>;
  85. clock-div = <4>;
  86. clock-mult = <1>;
  87. clock-output-names = "chipclk14";
  88. };
  89. chipclk16: chipclk16 {
  90. #clock-cells = <0>;
  91. compatible = "fixed-factor-clock";
  92. clocks = <&chipclk1>;
  93. clock-div = <6>;
  94. clock-mult = <1>;
  95. clock-output-names = "chipclk16";
  96. };
  97. chipclk112: chipclk112 {
  98. #clock-cells = <0>;
  99. compatible = "fixed-factor-clock";
  100. clocks = <&chipclk1>;
  101. clock-div = <12>;
  102. clock-mult = <1>;
  103. clock-output-names = "chipclk112";
  104. };
  105. chipclk124: chipclk124 {
  106. #clock-cells = <0>;
  107. compatible = "fixed-factor-clock";
  108. clocks = <&chipclk1>;
  109. clock-div = <24>;
  110. clock-mult = <1>;
  111. clock-output-names = "chipclk114";
  112. };
  113. chipclk1rstiso13: chipclk1rstiso13 {
  114. #clock-cells = <0>;
  115. compatible = "fixed-factor-clock";
  116. clocks = <&chipclk1rstiso>;
  117. clock-div = <3>;
  118. clock-mult = <1>;
  119. clock-output-names = "chipclk1rstiso13";
  120. };
  121. chipclk1rstiso14: chipclk1rstiso14 {
  122. #clock-cells = <0>;
  123. compatible = "fixed-factor-clock";
  124. clocks = <&chipclk1rstiso>;
  125. clock-div = <4>;
  126. clock-mult = <1>;
  127. clock-output-names = "chipclk1rstiso14";
  128. };
  129. chipclk1rstiso16: chipclk1rstiso16 {
  130. #clock-cells = <0>;
  131. compatible = "fixed-factor-clock";
  132. clocks = <&chipclk1rstiso>;
  133. clock-div = <6>;
  134. clock-mult = <1>;
  135. clock-output-names = "chipclk1rstiso16";
  136. };
  137. chipclk1rstiso112: chipclk1rstiso112 {
  138. #clock-cells = <0>;
  139. compatible = "fixed-factor-clock";
  140. clocks = <&chipclk1rstiso>;
  141. clock-div = <12>;
  142. clock-mult = <1>;
  143. clock-output-names = "chipclk1rstiso112";
  144. };
  145. clkmodrst0: clkmodrst0 {
  146. #clock-cells = <0>;
  147. compatible = "ti,keystone,psc-clock";
  148. clocks = <&chipclk16>;
  149. clock-output-names = "modrst0";
  150. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  151. reg-names = "control", "domain";
  152. domain-id = <0>;
  153. };
  154. clkusb: clkusb {
  155. #clock-cells = <0>;
  156. compatible = "ti,keystone,psc-clock";
  157. clocks = <&chipclk16>;
  158. clock-output-names = "usb";
  159. reg = <0x02350008 0xb00>, <0x02350000 0x400>;
  160. reg-names = "control", "domain";
  161. domain-id = <0>;
  162. };
  163. clkaemifspi: clkaemifspi {
  164. #clock-cells = <0>;
  165. compatible = "ti,keystone,psc-clock";
  166. clocks = <&chipclk16>;
  167. clock-output-names = "aemif-spi";
  168. reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
  169. reg-names = "control", "domain";
  170. domain-id = <0>;
  171. };
  172. clkdebugsstrc: clkdebugsstrc {
  173. #clock-cells = <0>;
  174. compatible = "ti,keystone,psc-clock";
  175. clocks = <&chipclk13>;
  176. clock-output-names = "debugss-trc";
  177. reg = <0x02350014 0xb00>, <0x02350000 0x400>;
  178. reg-names = "control", "domain";
  179. domain-id = <1>;
  180. };
  181. clktetbtrc: clktetbtrc {
  182. #clock-cells = <0>;
  183. compatible = "ti,keystone,psc-clock";
  184. clocks = <&chipclk13>;
  185. clock-output-names = "tetb-trc";
  186. reg = <0x02350018 0xb00>, <0x02350004 0x400>;
  187. reg-names = "control", "domain";
  188. domain-id = <1>;
  189. };
  190. clkpa: clkpa {
  191. #clock-cells = <0>;
  192. compatible = "ti,keystone,psc-clock";
  193. clocks = <&paclk13>;
  194. clock-output-names = "pa";
  195. reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
  196. reg-names = "control", "domain";
  197. domain-id = <2>;
  198. };
  199. clkcpgmac: clkcpgmac {
  200. #clock-cells = <0>;
  201. compatible = "ti,keystone,psc-clock";
  202. clocks = <&clkpa>;
  203. clock-output-names = "cpgmac";
  204. reg = <0x02350020 0xb00>, <0x02350008 0x400>;
  205. reg-names = "control", "domain";
  206. domain-id = <2>;
  207. };
  208. clksa: clksa {
  209. #clock-cells = <0>;
  210. compatible = "ti,keystone,psc-clock";
  211. clocks = <&clkpa>;
  212. clock-output-names = "sa";
  213. reg = <0x02350024 0xb00>, <0x02350008 0x400>;
  214. reg-names = "control", "domain";
  215. domain-id = <2>;
  216. };
  217. clkpcie: clkpcie {
  218. #clock-cells = <0>;
  219. compatible = "ti,keystone,psc-clock";
  220. clocks = <&chipclk12>;
  221. clock-output-names = "pcie";
  222. reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
  223. reg-names = "control", "domain";
  224. domain-id = <3>;
  225. };
  226. clksr: clksr {
  227. #clock-cells = <0>;
  228. compatible = "ti,keystone,psc-clock";
  229. clocks = <&chipclk1rstiso112>;
  230. clock-output-names = "sr";
  231. reg = <0x02350034 0xb00>, <0x02350018 0x400>;
  232. reg-names = "control", "domain";
  233. domain-id = <6>;
  234. };
  235. clkgem0: clkgem0 {
  236. #clock-cells = <0>;
  237. compatible = "ti,keystone,psc-clock";
  238. clocks = <&chipclk1>;
  239. clock-output-names = "gem0";
  240. reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
  241. reg-names = "control", "domain";
  242. domain-id = <8>;
  243. };
  244. clkddr30: clkddr30 {
  245. #clock-cells = <0>;
  246. compatible = "ti,keystone,psc-clock";
  247. clocks = <&chipclk12>;
  248. clock-output-names = "ddr3-0";
  249. reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
  250. reg-names = "control", "domain";
  251. domain-id = <16>;
  252. };
  253. clkwdtimer0: clkwdtimer0 {
  254. #clock-cells = <0>;
  255. compatible = "ti,keystone,psc-clock";
  256. clocks = <&clkmodrst0>;
  257. clock-output-names = "timer0";
  258. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  259. reg-names = "control", "domain";
  260. domain-id = <0>;
  261. };
  262. clkwdtimer1: clkwdtimer1 {
  263. #clock-cells = <0>;
  264. compatible = "ti,keystone,psc-clock";
  265. clocks = <&clkmodrst0>;
  266. clock-output-names = "timer1";
  267. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  268. reg-names = "control", "domain";
  269. domain-id = <0>;
  270. };
  271. clkwdtimer2: clkwdtimer2 {
  272. #clock-cells = <0>;
  273. compatible = "ti,keystone,psc-clock";
  274. clocks = <&clkmodrst0>;
  275. clock-output-names = "timer2";
  276. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  277. reg-names = "control", "domain";
  278. domain-id = <0>;
  279. };
  280. clkwdtimer3: clkwdtimer3 {
  281. #clock-cells = <0>;
  282. compatible = "ti,keystone,psc-clock";
  283. clocks = <&clkmodrst0>;
  284. clock-output-names = "timer3";
  285. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  286. reg-names = "control", "domain";
  287. domain-id = <0>;
  288. };
  289. clktimer15: clktimer15 {
  290. #clock-cells = <0>;
  291. compatible = "ti,keystone,psc-clock";
  292. clocks = <&clkmodrst0>;
  293. clock-output-names = "timer15";
  294. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  295. reg-names = "control", "domain";
  296. domain-id = <0>;
  297. };
  298. clkuart0: clkuart0 {
  299. #clock-cells = <0>;
  300. compatible = "ti,keystone,psc-clock";
  301. clocks = <&clkmodrst0>;
  302. clock-output-names = "uart0";
  303. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  304. reg-names = "control", "domain";
  305. domain-id = <0>;
  306. };
  307. clkuart1: clkuart1 {
  308. #clock-cells = <0>;
  309. compatible = "ti,keystone,psc-clock";
  310. clocks = <&clkmodrst0>;
  311. clock-output-names = "uart1";
  312. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  313. reg-names = "control", "domain";
  314. domain-id = <0>;
  315. };
  316. clkaemif: clkaemif {
  317. #clock-cells = <0>;
  318. compatible = "ti,keystone,psc-clock";
  319. clocks = <&clkaemifspi>;
  320. clock-output-names = "aemif";
  321. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  322. reg-names = "control", "domain";
  323. domain-id = <0>;
  324. };
  325. clkusim: clkusim {
  326. #clock-cells = <0>;
  327. compatible = "ti,keystone,psc-clock";
  328. clocks = <&clkmodrst0>;
  329. clock-output-names = "usim";
  330. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  331. reg-names = "control", "domain";
  332. domain-id = <0>;
  333. };
  334. clki2c: clki2c {
  335. #clock-cells = <0>;
  336. compatible = "ti,keystone,psc-clock";
  337. clocks = <&clkmodrst0>;
  338. clock-output-names = "i2c";
  339. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  340. reg-names = "control", "domain";
  341. domain-id = <0>;
  342. };
  343. clkspi: clkspi {
  344. #clock-cells = <0>;
  345. compatible = "ti,keystone,psc-clock";
  346. clocks = <&clkaemifspi>;
  347. clock-output-names = "spi";
  348. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  349. reg-names = "control", "domain";
  350. domain-id = <0>;
  351. };
  352. clkgpio: clkgpio {
  353. #clock-cells = <0>;
  354. compatible = "ti,keystone,psc-clock";
  355. clocks = <&clkmodrst0>;
  356. clock-output-names = "gpio";
  357. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  358. reg-names = "control", "domain";
  359. domain-id = <0>;
  360. };
  361. clkkeymgr: clkkeymgr {
  362. #clock-cells = <0>;
  363. compatible = "ti,keystone,psc-clock";
  364. clocks = <&clkmodrst0>;
  365. clock-output-names = "keymgr";
  366. reg = <0x02350000 0xb00>, <0x02350000 0x400>;
  367. reg-names = "control", "domain";
  368. domain-id = <0>;
  369. };
  370. };