imx6ul-geam-kit.dts 4.8 KB

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  1. /*
  2. * Copyright (C) 2016 Amarula Solutions B.V.
  3. * Copyright (C) 2016 Engicam S.r.l.
  4. *
  5. * This file is dual-licensed: you can use it either under the terms
  6. * of the GPL or the X11 license, at your option. Note that this dual
  7. * licensing only applies to this file, and not this project as a
  8. * whole.
  9. *
  10. * a) This file is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation.
  13. *
  14. * This file is distributed in the hope that it will be useful
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * Or, alternatively
  20. *
  21. * b) Permission is hereby granted, free of charge, to any person
  22. * obtaining a copy of this software and associated documentation
  23. * files (the "Software"), to deal in the Software without
  24. * restriction, including without limitation the rights to use
  25. * copy, modify, merge, publish, distribute, sublicense, and/or
  26. * sell copies of the Software, and to permit persons to whom the
  27. * Software is furnished to do so, subject to the following
  28. * conditions:
  29. *
  30. * The above copyright notice and this permission notice shall be
  31. * included in all copies or substantial portions of the Software.
  32. *
  33. * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  34. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  38. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40. * OTHER DEALINGS IN THE SOFTWARE.
  41. */
  42. /dts-v1/;
  43. #include <dt-bindings/gpio/gpio.h>
  44. #include <dt-bindings/input/input.h>
  45. #include "imx6ul.dtsi"
  46. / {
  47. model = "Engicam GEAM6UL";
  48. compatible = "engicam,imx6ul-geam", "fsl,imx6ul";
  49. memory {
  50. reg = <0x80000000 0x08000000>;
  51. };
  52. chosen {
  53. stdout-path = &uart1;
  54. };
  55. };
  56. &fec1 {
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&pinctrl_enet1>;
  59. phy-mode = "rmii";
  60. status = "okay";
  61. };
  62. &i2c1 {
  63. clock-frequency = <100000>;
  64. pinctrl-names = "default";
  65. pinctrl-0 = <&pinctrl_i2c1>;
  66. status = "okay";
  67. };
  68. &i2c2 {
  69. clock_frequency = <100000>;
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&pinctrl_i2c2>;
  72. status = "okay";
  73. };
  74. &uart1 {
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&pinctrl_uart1>;
  77. status = "okay";
  78. };
  79. &usdhc1 {
  80. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  81. pinctrl-0 = <&pinctrl_usdhc1>;
  82. pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
  83. pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
  84. bus-width = <4>;
  85. cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
  86. no-1-8-v;
  87. status = "okay";
  88. };
  89. &iomuxc {
  90. pinctrl_enet1: enet1grp {
  91. fsl,pins = <
  92. MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
  93. MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
  94. MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
  95. MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
  96. MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
  97. MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
  98. MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
  99. MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
  100. MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
  101. >;
  102. };
  103. pinctrl_i2c1: i2c1grp {
  104. fsl,pins = <
  105. MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
  106. MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
  107. >;
  108. };
  109. pinctrl_i2c2: i2c2grp {
  110. fsl,pins = <
  111. MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0
  112. MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0
  113. >;
  114. };
  115. pinctrl_uart1: uart1grp {
  116. fsl,pins = <
  117. MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
  118. MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
  119. >;
  120. };
  121. pinctrl_usdhc1: usdhc1grp {
  122. fsl,pins = <
  123. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
  124. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059
  125. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
  126. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
  127. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
  128. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
  129. >;
  130. };
  131. pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
  132. fsl,pins = <
  133. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9
  134. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9
  135. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9
  136. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9
  137. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9
  138. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9
  139. >;
  140. };
  141. pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
  142. fsl,pins = <
  143. MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9
  144. MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9
  145. MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9
  146. MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9
  147. MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9
  148. MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9
  149. >;
  150. };
  151. };