exynos5250.dtsi 2.7 KB

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  1. /*
  2. * (C) Copyright 2012 SAMSUNG Electronics
  3. * SAMSUNG EXYNOS5250 SoC device tree source
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include "exynos5.dtsi"
  8. #include "exynos5250-pinctrl.dtsi"
  9. #include "exynos5250-pinctrl-uboot.dtsi"
  10. / {
  11. aliases {
  12. pinctrl0 = &pinctrl_0;
  13. pinctrl1 = &pinctrl_1;
  14. pinctrl2 = &pinctrl_2;
  15. pinctrl3 = &pinctrl_3;
  16. };
  17. pinctrl_0: pinctrl@11400000 {
  18. compatible = "samsung,exynos5250-pinctrl";
  19. reg = <0x11400000 0x1000>;
  20. interrupts = <0 46 0>;
  21. wakup_eint: wakeup-interrupt-controller {
  22. compatible = "samsung,exynos4210-wakeup-eint";
  23. interrupt-parent = <&gic>;
  24. interrupts = <0 32 0>;
  25. };
  26. };
  27. pinctrl_1: pinctrl@13400000 {
  28. compatible = "samsung,exynos5250-pinctrl";
  29. reg = <0x13400000 0x1000>;
  30. interrupts = <0 45 0>;
  31. };
  32. pinctrl_2: pinctrl@10d10000 {
  33. compatible = "samsung,exynos5250-pinctrl";
  34. reg = <0x10d10000 0x1000>;
  35. interrupts = <0 50 0>;
  36. };
  37. pinctrl_3: pinctrl@03860000 {
  38. compatible = "samsung,exynos5250-pinctrl";
  39. reg = <0x03860000 0x1000>;
  40. interrupts = <0 47 0>;
  41. };
  42. i2c_4: i2c@12CA0000 {
  43. compatible = "samsung,s3c2440-i2c";
  44. reg = <0x12CA0000 0x100>;
  45. interrupts = <0 60 0>;
  46. #address-cells = <1>;
  47. #size-cells = <0>;
  48. };
  49. i2c_5: i2c@12CB0000 {
  50. compatible = "samsung,s3c2440-i2c";
  51. reg = <0x12CB0000 0x100>;
  52. interrupts = <0 61 0>;
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. };
  56. i2c_6: i2c@12CC0000 {
  57. compatible = "samsung,s3c2440-i2c";
  58. reg = <0x12CC0000 0x100>;
  59. interrupts = <0 62 0>;
  60. #address-cells = <1>;
  61. #size-cells = <0>;
  62. };
  63. i2c_7: i2c@12CD0000 {
  64. compatible = "samsung,s3c2440-i2c";
  65. reg = <0x12CD0000 0x100>;
  66. interrupts = <0 63 0>;
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. };
  70. sound@3830000 {
  71. compatible = "samsung,exynos-sound";
  72. reg = <0x3830000 0x50>;
  73. samsung,i2s-epll-clock-frequency = <192000000>;
  74. samsung,i2s-sampling-rate = <48000>;
  75. samsung,i2s-bits-per-sample = <16>;
  76. samsung,i2s-channels = <2>;
  77. samsung,i2s-lr-clk-framesize = <256>;
  78. samsung,i2s-bit-clk-framesize = <32>;
  79. samsung,i2s-id = <0>;
  80. };
  81. sound@12d60000 {
  82. compatible = "samsung,exynos-sound";
  83. reg = <0x12d60000 0x20>;
  84. samsung,i2s-epll-clock-frequency = <192000000>;
  85. samsung,i2s-sampling-rate = <48000>;
  86. samsung,i2s-bits-per-sample = <16>;
  87. samsung,i2s-channels = <2>;
  88. samsung,i2s-lr-clk-framesize = <256>;
  89. samsung,i2s-bit-clk-framesize = <32>;
  90. samsung,i2s-id = <1>;
  91. };
  92. xhci@12000000 {
  93. compatible = "samsung,exynos5250-xhci";
  94. reg = <0x12000000 0x10000>;
  95. #address-cells = <1>;
  96. #size-cells = <1>;
  97. phy {
  98. compatible = "samsung,exynos5250-usb3-phy";
  99. reg = <0x12100000 0x100>;
  100. };
  101. };
  102. pwm: pwm@12dd0000 {
  103. compatible = "samsung,exynos4210-pwm";
  104. reg = <0x12dd0000 0x100>;
  105. samsung,pwm-outputs = <0>, <1>, <2>, <3>;
  106. #pwm-cells = <3>;
  107. };
  108. };