exynos5.dtsi 5.4 KB

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  1. /*
  2. * Copyright (c) 2013 The Chromium OS Authors
  3. * SAMSUNG EXYNOS5 SoC device tree source
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include "skeleton.dtsi"
  8. #include <dt-bindings/gpio/gpio.h>
  9. / {
  10. compatible = "samsung,exynos5";
  11. combiner: interrupt-controller@10440000 {
  12. compatible = "samsung,exynos4210-combiner";
  13. #interrupt-cells = <2>;
  14. interrupt-controller;
  15. samsung,combiner-nr = <32>;
  16. reg = <0x10440000 0x1000>;
  17. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  18. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  19. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  20. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  21. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  22. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  23. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  24. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  25. };
  26. gic: interrupt-controller@10481000 {
  27. compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  28. #interrupt-cells = <3>;
  29. interrupt-controller;
  30. reg = <0x10481000 0x1000>,
  31. <0x10482000 0x1000>,
  32. <0x10484000 0x2000>,
  33. <0x10486000 0x2000>;
  34. interrupts = <1 9 0xf04>;
  35. };
  36. sromc@12250000 {
  37. compatible = "samsung,exynos-sromc";
  38. reg = <0x12250000 0x20>;
  39. #address-cells = <1>;
  40. #size-cells = <0>;
  41. };
  42. combiner: interrupt-controller@10440000 {
  43. compatible = "samsung,exynos4210-combiner";
  44. #interrupt-cells = <2>;
  45. interrupt-controller;
  46. samsung,combiner-nr = <32>;
  47. reg = <0x10440000 0x1000>;
  48. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  49. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  50. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  51. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  52. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  53. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  54. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  55. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  56. };
  57. gic: interrupt-controller@10481000 {
  58. compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  59. #interrupt-cells = <3>;
  60. interrupt-controller;
  61. reg = <0x10481000 0x1000>,
  62. <0x10482000 0x1000>,
  63. <0x10484000 0x2000>,
  64. <0x10486000 0x2000>;
  65. interrupts = <1 9 0xf04>;
  66. };
  67. i2c_0: i2c@12C60000 {
  68. compatible = "samsung,s3c2440-i2c";
  69. reg = <0x12C60000 0x100>;
  70. interrupts = <0 56 0>;
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. };
  74. i2c_1: i2c@12C70000 {
  75. compatible = "samsung,s3c2440-i2c";
  76. reg = <0x12C70000 0x100>;
  77. interrupts = <0 57 0>;
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. };
  81. i2c_2: i2c@12C80000 {
  82. compatible = "samsung,s3c2440-i2c";
  83. reg = <0x12C80000 0x100>;
  84. interrupts = <0 58 0>;
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. };
  88. i2c_3: i2c@12C90000 {
  89. compatible = "samsung,s3c2440-i2c";
  90. reg = <0x12C90000 0x100>;
  91. interrupts = <0 59 0>;
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. };
  95. spi_0: spi@12d20000 {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. compatible = "samsung,exynos-spi";
  99. reg = <0x12d20000 0x30>;
  100. interrupts = <0 68 0>;
  101. };
  102. spi_1: spi@12d30000 {
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. compatible = "samsung,exynos-spi";
  106. reg = <0x12d30000 0x30>;
  107. interrupts = <0 69 0>;
  108. };
  109. spi_2: spi@12d40000 {
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. compatible = "samsung,exynos-spi";
  113. reg = <0x12d40000 0x30>;
  114. clock-frequency = <50000000>;
  115. interrupts = <0 70 0>;
  116. };
  117. spi_3: spi@131a0000 {
  118. #address-cells = <1>;
  119. #size-cells = <0>;
  120. compatible = "samsung,exynos-spi";
  121. reg = <0x131a0000 0x30>;
  122. interrupts = <0 129 0>;
  123. };
  124. spi_4: spi@131b0000 {
  125. #address-cells = <1>;
  126. #size-cells = <0>;
  127. compatible = "samsung,exynos-spi";
  128. reg = <0x131b0000 0x30>;
  129. interrupts = <0 130 0>;
  130. };
  131. ehci@12110000 {
  132. compatible = "samsung,exynos-ehci";
  133. reg = <0x12110000 0x100>;
  134. #address-cells = <1>;
  135. #size-cells = <1>;
  136. phy {
  137. compatible = "samsung,exynos-usb-phy";
  138. reg = <0x12130000 0x100>;
  139. };
  140. };
  141. tmu@10060000 {
  142. compatible = "samsung,exynos-tmu";
  143. reg = <0x10060000 0x10000>;
  144. };
  145. fimd@14400000 {
  146. u-boot,dm-pre-reloc;
  147. compatible = "samsung,exynos-fimd";
  148. reg = <0x14400000 0x10000>;
  149. #address-cells = <1>;
  150. #size-cells = <1>;
  151. };
  152. dp: dp@145b0000 {
  153. compatible = "samsung,exynos5-dp";
  154. reg = <0x145b0000 0x1000>;
  155. #address-cells = <1>;
  156. #size-cells = <1>;
  157. };
  158. xhci0: xhci@12000000 {
  159. compatible = "samsung,exynos5250-xhci";
  160. reg = <0x12000000 0x10000>;
  161. #address-cells = <1>;
  162. #size-cells = <1>;
  163. phy {
  164. compatible = "samsung,exynos5250-usb3-phy";
  165. reg = <0x12100000 0x100>;
  166. };
  167. };
  168. mmc@12200000 {
  169. #address-cells = <1>;
  170. #size-cells = <0>;
  171. compatible = "samsung,exynos-dwmmc";
  172. reg = <0x12200000 0x1000>;
  173. interrupts = <0 75 0>;
  174. };
  175. mmc@12210000 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. compatible = "samsung,exynos-dwmmc";
  179. reg = <0x12210000 0x1000>;
  180. interrupts = <0 76 0>;
  181. };
  182. mmc@12220000 {
  183. #address-cells = <1>;
  184. #size-cells = <0>;
  185. compatible = "samsung,exynos-dwmmc";
  186. reg = <0x12220000 0x1000>;
  187. interrupts = <0 77 0>;
  188. };
  189. mmc@12230000 {
  190. #address-cells = <1>;
  191. #size-cells = <0>;
  192. compatible = "samsung,exynos-dwmmc";
  193. reg = <0x12230000 0x1000>;
  194. interrupts = <0 78 0>;
  195. };
  196. serial@12C00000 {
  197. compatible = "samsung,exynos4210-uart";
  198. reg = <0x12C00000 0x100>;
  199. interrupts = <0 51 0>;
  200. id = <0>;
  201. };
  202. serial@12C10000 {
  203. compatible = "samsung,exynos4210-uart";
  204. reg = <0x12C10000 0x100>;
  205. interrupts = <0 52 0>;
  206. id = <1>;
  207. };
  208. serial@12C20000 {
  209. compatible = "samsung,exynos4210-uart";
  210. reg = <0x12C20000 0x100>;
  211. interrupts = <0 53 0>;
  212. id = <2>;
  213. };
  214. serial@12C30000 {
  215. compatible = "samsung,exynos4210-uart";
  216. reg = <0x12C30000 0x100>;
  217. interrupts = <0 54 0>;
  218. u-boot,dm-pre-reloc;
  219. id = <3>;
  220. };
  221. };