exynos4.dtsi 2.9 KB

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  1. /*
  2. * Samsung's Exynos4 SoC common device tree source
  3. *
  4. * Copyright (c) 2014 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include "skeleton.dtsi"
  10. / {
  11. combiner: interrupt-controller@10440000 {
  12. compatible = "samsung,exynos4210-combiner";
  13. #interrupt-cells = <2>;
  14. interrupt-controller;
  15. reg = <0x10440000 0x1000>;
  16. };
  17. serial@13800000 {
  18. compatible = "samsung,exynos4210-uart";
  19. reg = <0x13800000 0x3c>;
  20. id = <0>;
  21. };
  22. serial@13810000 {
  23. compatible = "samsung,exynos4210-uart";
  24. reg = <0x13810000 0x3c>;
  25. id = <1>;
  26. };
  27. serial@13820000 {
  28. compatible = "samsung,exynos4210-uart";
  29. reg = <0x13820000 0x3c>;
  30. id = <2>;
  31. };
  32. serial@13830000 {
  33. compatible = "samsung,exynos4210-uart";
  34. reg = <0x13830000 0x3c>;
  35. id = <3>;
  36. };
  37. serial@13840000 {
  38. compatible = "samsung,exynos4210-uart";
  39. reg = <0x13840000 0x3c>;
  40. id = <4>;
  41. };
  42. i2c@13860000 {
  43. #address-cells = <1>;
  44. #size-cells = <0>;
  45. compatible = "samsung,s3c2440-i2c";
  46. reg = <0x13860000 0x100>;
  47. interrupts = <0 56 0>;
  48. };
  49. i2c@13870000 {
  50. #address-cells = <1>;
  51. #size-cells = <0>;
  52. compatible = "samsung,s3c2440-i2c";
  53. reg = <0x13870000 0x100>;
  54. interrupts = <1 57 0>;
  55. };
  56. i2c@13880000 {
  57. #address-cells = <1>;
  58. #size-cells = <0>;
  59. compatible = "samsung,s3c2440-i2c";
  60. reg = <0x13880000 0x100>;
  61. interrupts = <2 58 0>;
  62. };
  63. i2c@13890000 {
  64. #address-cells = <1>;
  65. #size-cells = <0>;
  66. compatible = "samsung,s3c2440-i2c";
  67. reg = <0x13890000 0x100>;
  68. interrupts = <3 59 0>;
  69. };
  70. i2c@138a0000 {
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. compatible = "samsung,s3c2440-i2c";
  74. reg = <0x138a0000 0x100>;
  75. interrupts = <4 60 0>;
  76. };
  77. i2c@138b0000 {
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. compatible = "samsung,s3c2440-i2c";
  81. reg = <0x138b0000 0x100>;
  82. interrupts = <5 61 0>;
  83. };
  84. i2c@138c0000 {
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. compatible = "samsung,s3c2440-i2c";
  88. reg = <0x138c0000 0x100>;
  89. interrupts = <6 62 0>;
  90. };
  91. i2c@138d0000 {
  92. #address-cells = <1>;
  93. #size-cells = <0>;
  94. compatible = "samsung,s3c2440-i2c";
  95. reg = <0x138d0000 0x100>;
  96. interrupts = <7 63 0>;
  97. };
  98. sdhci@12510000 {
  99. #address-cells = <1>;
  100. #size-cells = <0>;
  101. compatible = "samsung,exynos-mmc";
  102. reg = <0x12510000 0x1000>;
  103. interrupts = <0 75 0>;
  104. };
  105. sdhci@12520000 {
  106. #address-cells = <1>;
  107. #size-cells = <0>;
  108. compatible = "samsung,exynos-mmc";
  109. reg = <0x12520000 0x1000>;
  110. interrupts = <0 76 0>;
  111. };
  112. sdhci@12530000 {
  113. #address-cells = <1>;
  114. #size-cells = <0>;
  115. compatible = "samsung,exynos-mmc";
  116. reg = <0x12530000 0x1000>;
  117. interrupts = <0 77 0>;
  118. };
  119. sdhci@12540000 {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. compatible = "samsung,exynos-mmc";
  123. reg = <0x12540000 0x1000>;
  124. interrupts = <0 78 0>;
  125. };
  126. dwmmc@12550000 {
  127. #address-cells = <1>;
  128. #size-cells = <0>;
  129. compatible = "samsung,exynos-dwmmc";
  130. reg = <0x12550000 0x1000>;
  131. interrupts = <0 131 0>;
  132. };
  133. };