dra7-evm-common.dtsi 5.7 KB

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  1. /*
  2. * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include <dt-bindings/clk/ti-dra7-atl.h>
  10. #include <dt-bindings/input/input.h>
  11. / {
  12. chosen {
  13. stdout-path = &uart1;
  14. tick-timer = &timer2;
  15. };
  16. sound0: sound0 {
  17. compatible = "simple-audio-card";
  18. simple-audio-card,name = "DRA7xx-EVM";
  19. simple-audio-card,widgets =
  20. "Headphone", "Headphone Jack",
  21. "Line", "Line Out",
  22. "Microphone", "Mic Jack",
  23. "Line", "Line In";
  24. simple-audio-card,routing =
  25. "Headphone Jack", "HPLOUT",
  26. "Headphone Jack", "HPROUT",
  27. "Line Out", "LLOUT",
  28. "Line Out", "RLOUT",
  29. "MIC3L", "Mic Jack",
  30. "MIC3R", "Mic Jack",
  31. "Mic Jack", "Mic Bias",
  32. "LINE1L", "Line In",
  33. "LINE1R", "Line In";
  34. simple-audio-card,format = "dsp_b";
  35. simple-audio-card,bitclock-master = <&sound0_master>;
  36. simple-audio-card,frame-master = <&sound0_master>;
  37. simple-audio-card,bitclock-inversion;
  38. sound0_master: simple-audio-card,cpu {
  39. sound-dai = <&mcasp3>;
  40. system-clock-frequency = <5644800>;
  41. };
  42. simple-audio-card,codec {
  43. sound-dai = <&tlv320aic3106>;
  44. clocks = <&atl_clkin2_ck>;
  45. };
  46. };
  47. extcon_usb1: extcon_usb1 {
  48. compatible = "linux,extcon-usb-gpio";
  49. id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
  50. };
  51. extcon_usb2: extcon_usb2 {
  52. compatible = "linux,extcon-usb-gpio";
  53. id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
  54. };
  55. leds {
  56. compatible = "gpio-leds";
  57. led0 {
  58. label = "dra7:usr1";
  59. gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
  60. default-state = "off";
  61. };
  62. led1 {
  63. label = "dra7:usr2";
  64. gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
  65. default-state = "off";
  66. };
  67. led2 {
  68. label = "dra7:usr3";
  69. gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
  70. default-state = "off";
  71. };
  72. led3 {
  73. label = "dra7:usr4";
  74. gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
  75. default-state = "off";
  76. };
  77. };
  78. gpio_keys {
  79. compatible = "gpio-keys";
  80. #address-cells = <1>;
  81. #size-cells = <0>;
  82. autorepeat;
  83. USER1 {
  84. label = "btnUser1";
  85. linux,code = <BTN_0>;
  86. gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
  87. };
  88. USER2 {
  89. label = "btnUser2";
  90. linux,code = <BTN_1>;
  91. gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
  92. };
  93. };
  94. };
  95. &dra7_pmx_core {
  96. dcan1_pins_default: dcan1_pins_default {
  97. pinctrl-single,pins = <
  98. DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
  99. DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
  100. >;
  101. };
  102. dcan1_pins_sleep: dcan1_pins_sleep {
  103. pinctrl-single,pins = <
  104. DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
  105. DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */
  106. >;
  107. };
  108. };
  109. &i2c3 {
  110. status = "okay";
  111. clock-frequency = <400000>;
  112. };
  113. &mcspi1 {
  114. status = "okay";
  115. };
  116. &mcspi2 {
  117. status = "okay";
  118. };
  119. &uart1 {
  120. status = "okay";
  121. interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
  122. <&dra7_pmx_core 0x3e0>;
  123. };
  124. &uart2 {
  125. status = "okay";
  126. };
  127. &uart3 {
  128. status = "okay";
  129. };
  130. &qspi {
  131. status = "okay";
  132. spi-max-frequency = <76800000>;
  133. m25p80@0 {
  134. compatible = "s25fl256s1", "spi-flash";
  135. spi-max-frequency = <76800000>;
  136. reg = <0>;
  137. spi-tx-bus-width = <1>;
  138. spi-rx-bus-width = <4>;
  139. #address-cells = <1>;
  140. #size-cells = <1>;
  141. /* MTD partition table.
  142. * The ROM checks the first four physical blocks
  143. * for a valid file to boot and the flash here is
  144. * 64KiB block size.
  145. */
  146. partition@0 {
  147. label = "QSPI.SPL";
  148. reg = <0x00000000 0x000010000>;
  149. };
  150. partition@1 {
  151. label = "QSPI.SPL.backup1";
  152. reg = <0x00010000 0x00010000>;
  153. };
  154. partition@2 {
  155. label = "QSPI.SPL.backup2";
  156. reg = <0x00020000 0x00010000>;
  157. };
  158. partition@3 {
  159. label = "QSPI.SPL.backup3";
  160. reg = <0x00030000 0x00010000>;
  161. };
  162. partition@4 {
  163. label = "QSPI.u-boot";
  164. reg = <0x00040000 0x00100000>;
  165. };
  166. partition@5 {
  167. label = "QSPI.u-boot-spl-os";
  168. reg = <0x00140000 0x00080000>;
  169. };
  170. partition@6 {
  171. label = "QSPI.u-boot-env";
  172. reg = <0x001c0000 0x00010000>;
  173. };
  174. partition@7 {
  175. label = "QSPI.u-boot-env.backup1";
  176. reg = <0x001d0000 0x0010000>;
  177. };
  178. partition@8 {
  179. label = "QSPI.kernel";
  180. reg = <0x001e0000 0x0800000>;
  181. };
  182. partition@9 {
  183. label = "QSPI.file-system";
  184. reg = <0x009e0000 0x01620000>;
  185. };
  186. };
  187. };
  188. &omap_dwc3_1 {
  189. extcon = <&extcon_usb1>;
  190. };
  191. &omap_dwc3_2 {
  192. extcon = <&extcon_usb2>;
  193. };
  194. &usb1 {
  195. dr_mode = "otg";
  196. extcon = <&extcon_usb1>;
  197. };
  198. &usb2 {
  199. dr_mode = "host";
  200. };
  201. &dcan1 {
  202. status = "ok";
  203. pinctrl-names = "default", "sleep", "active";
  204. pinctrl-0 = <&dcan1_pins_sleep>;
  205. pinctrl-1 = <&dcan1_pins_sleep>;
  206. pinctrl-2 = <&dcan1_pins_default>;
  207. };
  208. &atl {
  209. assigned-clocks = <&abe_dpll_sys_clk_mux>,
  210. <&atl_gfclk_mux>,
  211. <&dpll_abe_ck>,
  212. <&dpll_abe_m2x2_ck>,
  213. <&atl_clkin2_ck>;
  214. assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
  215. assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>;
  216. status = "okay";
  217. atl2 {
  218. bws = <DRA7_ATL_WS_MCASP2_FSX>;
  219. aws = <DRA7_ATL_WS_MCASP3_FSX>;
  220. };
  221. };
  222. &mcasp3 {
  223. #sound-dai-cells = <0>;
  224. assigned-clocks = <&mcasp3_ahclkx_mux>;
  225. assigned-clock-parents = <&atl_clkin2_ck>;
  226. status = "okay";
  227. op-mode = <0>; /* MCASP_IIS_MODE */
  228. tdm-slots = <2>;
  229. /* 4 serializer */
  230. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  231. 1 2 0 0
  232. >;
  233. tx-num-evt = <32>;
  234. rx-num-evt = <32>;
  235. };
  236. &mailbox5 {
  237. status = "okay";
  238. mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
  239. status = "okay";
  240. };
  241. mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
  242. status = "okay";
  243. };
  244. };
  245. &mailbox6 {
  246. status = "okay";
  247. mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
  248. status = "okay";
  249. };
  250. mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
  251. status = "okay";
  252. };
  253. };