armada-xp-synology-ds414.dts 8.0 KB

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  1. /*
  2. * Device Tree file for Synology DS414
  3. *
  4. * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. * Note: this Device Tree assumes that the bootloader has remapped the
  12. * internal registers to 0xf1000000 (instead of the old 0xd0000000).
  13. * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
  14. * bootloaders provided by Marvell. It is used in recent versions of
  15. * DSM software provided by Synology. Nonetheless, some earlier boards
  16. * were delivered with an older version of u-boot that left internal
  17. * registers mapped at 0xd0000000. If you have such a device you will
  18. * not be able to directly boot a kernel based on this Device Tree. In
  19. * that case, the preferred solution is to update your bootloader (e.g.
  20. * by upgrading to latest version of DSM, or building a new one and
  21. * installing it from u-boot prompt) or adjust the Devive Tree
  22. * (s/0xf1000000/0xd0000000/ in 'ranges' below).
  23. */
  24. /dts-v1/;
  25. #include <dt-bindings/input/input.h>
  26. #include <dt-bindings/gpio/gpio.h>
  27. #include "armada-xp-mv78230.dtsi"
  28. / {
  29. model = "Synology DS414";
  30. compatible = "synology,ds414", "marvell,armadaxp-mv78230",
  31. "marvell,armadaxp", "marvell,armada-370-xp";
  32. chosen {
  33. bootargs = "console=ttyS0,115200 earlyprintk";
  34. stdout-path = &uart0;
  35. };
  36. aliases {
  37. spi0 = &spi0;
  38. };
  39. memory {
  40. device_type = "memory";
  41. reg = <0 0x00000000 0 0x40000000>; /* 1GB */
  42. };
  43. soc {
  44. ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
  45. MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
  46. pcie-controller {
  47. status = "okay";
  48. /*
  49. * Connected to Marvell 88SX7042 SATA-II controller
  50. * handling the four disks.
  51. */
  52. pcie@1,0 {
  53. /* Port 0, Lane 0 */
  54. status = "okay";
  55. };
  56. /*
  57. * Connected to EtronTech EJ168A XHCI controller
  58. * providing the two rear USB 3.0 ports.
  59. */
  60. pcie@5,0 {
  61. /* Port 1, Lane 0 */
  62. status = "okay";
  63. };
  64. };
  65. internal-regs {
  66. /* RTC is provided by Seiko S-35390A below */
  67. rtc@10300 {
  68. status = "disabled";
  69. };
  70. spi0: spi@10600 {
  71. status = "okay";
  72. u-boot,dm-pre-reloc;
  73. spi-flash@0 {
  74. u-boot,dm-pre-reloc;
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. compatible = "micron,n25q064";
  78. reg = <0>; /* Chip select 0 */
  79. spi-max-frequency = <20000000>;
  80. /*
  81. * Warning!
  82. *
  83. * Synology u-boot uses its compiled-in environment
  84. * and it seems Synology did not care to change u-boot
  85. * default configuration in order to allow saving a
  86. * modified environment at a sensible location. So,
  87. * if you do a 'saveenv' under u-boot, your modified
  88. * environment will be saved at 1MB after the start
  89. * of the flash, i.e. in the middle of the uImage.
  90. * For that reason, it is strongly advised not to
  91. * change the default environment, unless you know
  92. * what you are doing.
  93. */
  94. partition@00000000 { /* u-boot */
  95. label = "RedBoot";
  96. reg = <0x00000000 0x000d0000>; /* 832KB */
  97. };
  98. partition@000c0000 { /* uImage */
  99. label = "zImage";
  100. reg = <0x000d0000 0x002d0000>; /* 2880KB */
  101. };
  102. partition@003a0000 { /* uInitramfs */
  103. label = "rd.gz";
  104. reg = <0x003a0000 0x00430000>; /* 4250KB */
  105. };
  106. partition@007d0000 { /* MAC address and serial number */
  107. label = "vendor";
  108. reg = <0x007d0000 0x00010000>; /* 64KB */
  109. };
  110. partition@007e0000 {
  111. label = "RedBoot config";
  112. reg = <0x007e0000 0x00010000>; /* 64KB */
  113. };
  114. partition@007f0000 {
  115. label = "FIS directory";
  116. reg = <0x007f0000 0x00010000>; /* 64KB */
  117. };
  118. };
  119. };
  120. i2c@11000 {
  121. clock-frequency = <400000>;
  122. status = "okay";
  123. s35390a: s35390a@30 {
  124. compatible = "sii,s35390a";
  125. reg = <0x30>;
  126. };
  127. };
  128. /* Connected to a header on device's PCB. This
  129. * provides the main console for the device.
  130. *
  131. * Warning: the device may not boot with a 3.3V
  132. * USB-serial converter connected when the power
  133. * button is pressed. The converter needs to be
  134. * connected a few seconds after pressing the
  135. * power button. This is possibly due to UART0_TXD
  136. * pin being sampled at reset (bit 0 of SAR).
  137. */
  138. serial@12000 {
  139. status = "okay";
  140. u-boot,dm-pre-reloc;
  141. };
  142. /* Connected to a Microchip PIC16F883 for power control */
  143. serial@12100 {
  144. status = "okay";
  145. };
  146. poweroff@12100 {
  147. compatible = "synology,power-off";
  148. reg = <0x12100 0x100>;
  149. clocks = <&coreclk 0>;
  150. };
  151. /* Front USB 2.0 port */
  152. usb@50000 {
  153. status = "okay";
  154. };
  155. mdio {
  156. phy0: ethernet-phy@0 { /* Marvell 88E1512 */
  157. reg = <0>;
  158. };
  159. phy1: ethernet-phy@1 { /* Marvell 88E1512 */
  160. reg = <1>;
  161. };
  162. };
  163. ethernet@70000 {
  164. status = "okay";
  165. pinctrl-0 = <&ge0_rgmii_pins>;
  166. pinctrl-names = "default";
  167. phy = <&phy1>;
  168. phy-mode = "rgmii-id";
  169. };
  170. ethernet@74000 {
  171. pinctrl-0 = <&ge1_rgmii_pins>;
  172. pinctrl-names = "default";
  173. status = "okay";
  174. phy = <&phy0>;
  175. phy-mode = "rgmii-id";
  176. };
  177. };
  178. };
  179. regulators {
  180. compatible = "simple-bus";
  181. #address-cells = <1>;
  182. #size-cells = <0>;
  183. pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
  184. &sata3_pwr_pin &sata4_pwr_pin>;
  185. pinctrl-names = "default";
  186. sata1_regulator: sata1-regulator {
  187. compatible = "regulator-fixed";
  188. reg = <1>;
  189. regulator-name = "SATA1 Power";
  190. regulator-min-microvolt = <5000000>;
  191. regulator-max-microvolt = <5000000>;
  192. startup-delay-us = <2000000>;
  193. enable-active-high;
  194. regulator-always-on;
  195. regulator-boot-on;
  196. gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
  197. };
  198. sata2_regulator: sata2-regulator {
  199. compatible = "regulator-fixed";
  200. reg = <2>;
  201. regulator-name = "SATA2 Power";
  202. regulator-min-microvolt = <5000000>;
  203. regulator-max-microvolt = <5000000>;
  204. startup-delay-us = <4000000>;
  205. enable-active-high;
  206. regulator-always-on;
  207. regulator-boot-on;
  208. gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
  209. };
  210. sata3_regulator: sata3-regulator {
  211. compatible = "regulator-fixed";
  212. reg = <3>;
  213. regulator-name = "SATA3 Power";
  214. regulator-min-microvolt = <5000000>;
  215. regulator-max-microvolt = <5000000>;
  216. startup-delay-us = <6000000>;
  217. enable-active-high;
  218. regulator-always-on;
  219. regulator-boot-on;
  220. gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
  221. };
  222. sata4_regulator: sata4-regulator {
  223. compatible = "regulator-fixed";
  224. reg = <4>;
  225. regulator-name = "SATA4 Power";
  226. regulator-min-microvolt = <5000000>;
  227. regulator-max-microvolt = <5000000>;
  228. startup-delay-us = <8000000>;
  229. enable-active-high;
  230. regulator-always-on;
  231. regulator-boot-on;
  232. gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  233. };
  234. };
  235. };
  236. &pinctrl {
  237. sata1_pwr_pin: sata1-pwr-pin {
  238. marvell,pins = "mpp42";
  239. marvell,function = "gpio";
  240. };
  241. sata2_pwr_pin: sata2-pwr-pin {
  242. marvell,pins = "mpp44";
  243. marvell,function = "gpio";
  244. };
  245. sata3_pwr_pin: sata3-pwr-pin {
  246. marvell,pins = "mpp45";
  247. marvell,function = "gpio";
  248. };
  249. sata4_pwr_pin: sata4-pwr-pin {
  250. marvell,pins = "mpp46";
  251. marvell,function = "gpio";
  252. };
  253. sata1_pres_pin: sata1-pres-pin {
  254. marvell,pins = "mpp34";
  255. marvell,function = "gpio";
  256. };
  257. sata2_pres_pin: sata2-pres-pin {
  258. marvell,pins = "mpp35";
  259. marvell,function = "gpio";
  260. };
  261. sata3_pres_pin: sata3-pres-pin {
  262. marvell,pins = "mpp40";
  263. marvell,function = "gpio";
  264. };
  265. sata4_pres_pin: sata4-pres-pin {
  266. marvell,pins = "mpp41";
  267. marvell,function = "gpio";
  268. };
  269. syno_id_bit0_pin: syno-id-bit0-pin {
  270. marvell,pins = "mpp26";
  271. marvell,function = "gpio";
  272. };
  273. syno_id_bit1_pin: syno-id-bit1-pin {
  274. marvell,pins = "mpp28";
  275. marvell,function = "gpio";
  276. };
  277. syno_id_bit2_pin: syno-id-bit2-pin {
  278. marvell,pins = "mpp29";
  279. marvell,function = "gpio";
  280. };
  281. fan1_alarm_pin: fan1-alarm-pin {
  282. marvell,pins = "mpp33";
  283. marvell,function = "gpio";
  284. };
  285. fan2_alarm_pin: fan2-alarm-pin {
  286. marvell,pins = "mpp32";
  287. marvell,function = "gpio";
  288. };
  289. };