armada-385-amc.dts 3.8 KB

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  1. /*
  2. * Device Tree file for Marvell Armada 385 development board
  3. * (DB-88F6820-AMC)
  4. *
  5. * Copyright (C) 2014 Marvell
  6. *
  7. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  8. *
  9. * This file is dual-licensed: you can use it either under the terms
  10. * of the GPL or the X11 license, at your option. Note that this dual
  11. * licensing only applies to this file, and not this project as a
  12. * whole.
  13. *
  14. * a) This file is licensed under the terms of the GNU General Public
  15. * License version 2. This program is licensed "as is" without
  16. * any warranty of any kind, whether express or implied.
  17. *
  18. * Or, alternatively,
  19. *
  20. * b) Permission is hereby granted, free of charge, to any person
  21. * obtaining a copy of this software and associated documentation
  22. * files (the "Software"), to deal in the Software without
  23. * restriction, including without limitation the rights to use,
  24. * copy, modify, merge, publish, distribute, sublicense, and/or
  25. * sell copies of the Software, and to permit persons to whom the
  26. * Software is furnished to do so, subject to the following
  27. * conditions:
  28. *
  29. * The above copyright notice and this permission notice shall be
  30. * included in all copies or substantial portions of the Software.
  31. *
  32. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39. * OTHER DEALINGS IN THE SOFTWARE.
  40. */
  41. /dts-v1/;
  42. #include "armada-385.dtsi"
  43. #include <dt-bindings/gpio/gpio.h>
  44. / {
  45. model = "Marvell Armada 385 AMC";
  46. compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
  47. chosen {
  48. stdout-path = "serial0:115200n8";
  49. };
  50. aliases {
  51. ethernet0 = &eth0;
  52. ethernet1 = &eth1;
  53. spi1 = &spi1;
  54. };
  55. memory {
  56. device_type = "memory";
  57. reg = <0x00000000 0x80000000>; /* 2 GB */
  58. };
  59. soc {
  60. ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  61. MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  62. internal-regs {
  63. i2c@11000 {
  64. pinctrl-names = "default";
  65. pinctrl-0 = <&i2c0_pins>;
  66. status = "okay";
  67. };
  68. serial@12000 {
  69. /*
  70. * Exported on the micro USB connector CON16
  71. * through an FTDI
  72. */
  73. pinctrl-names = "default";
  74. pinctrl-0 = <&uart0_pins>;
  75. status = "okay";
  76. u-boot,dm-pre-reloc;
  77. };
  78. ethernet@34000 {
  79. status = "okay";
  80. phy = <&phy1>;
  81. phy-mode = "sgmii";
  82. };
  83. usb@58000 {
  84. status = "okay";
  85. };
  86. ethernet@70000 {
  87. pinctrl-names = "default";
  88. /*
  89. * The Reference Clock 0 is used to provide a
  90. * clock to the PHY
  91. */
  92. pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
  93. status = "okay";
  94. phy = <&phy0>;
  95. phy-mode = "rgmii-id";
  96. };
  97. mdio@72004 {
  98. pinctrl-names = "default";
  99. pinctrl-0 = <&mdio_pins>;
  100. phy0: ethernet-phy@1 {
  101. reg = <1>;
  102. };
  103. phy1: ethernet-phy@0 {
  104. reg = <0>;
  105. };
  106. };
  107. flash@d0000 {
  108. status = "okay";
  109. num-cs = <1>;
  110. marvell,nand-keep-config;
  111. marvell,nand-enable-arbiter;
  112. nand-on-flash-bbt;
  113. };
  114. };
  115. pcie-controller {
  116. status = "okay";
  117. pcie@1,0 {
  118. /* Port 0, Lane 0 */
  119. status = "okay";
  120. };
  121. };
  122. };
  123. };
  124. &spi1 {
  125. pinctrl-names = "default";
  126. pinctrl-0 = <&spi1_pins>;
  127. status = "okay";
  128. u-boot,dm-pre-reloc;
  129. spi-flash@0 {
  130. u-boot,dm-pre-reloc;
  131. #address-cells = <1>;
  132. #size-cells = <1>;
  133. compatible = "st,m25p128", "jedec,spi-nor";
  134. reg = <0>; /* Chip select 0 */
  135. spi-max-frequency = <50000000>;
  136. m25p,fast-read;
  137. };
  138. };
  139. &refclk {
  140. clock-frequency = <20000000>;
  141. };