armada-37xx.dtsi 5.1 KB

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  1. /*
  2. * Device Tree Include file for Marvell Armada 37xx family of SoCs.
  3. *
  4. * Copyright (C) 2016 Marvell
  5. *
  6. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  7. *
  8. * This file is dual-licensed: you can use it either under the terms
  9. * of the GPL or the X11 license, at your option. Note that this dual
  10. * licensing only applies to this file, and not this project as a
  11. * whole.
  12. *
  13. * a) This file is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of the
  16. * License, or (at your option) any later version.
  17. *
  18. * This file is distributed in the hope that it will be useful
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * Or, alternatively
  24. *
  25. * b) Permission is hereby granted, free of charge, to any person
  26. * obtaining a copy of this software and associated documentation
  27. * files (the "Software"), to deal in the Software without
  28. * restriction, including without limitation the rights to use
  29. * copy, modify, merge, publish, distribute, sublicense, and/or
  30. * sell copies of the Software, and to permit persons to whom the
  31. * Software is furnished to do so, subject to the following
  32. * conditions:
  33. *
  34. * The above copyright notice and this permission notice shall be
  35. * included in all copies or substantial portions of the Software.
  36. *
  37. * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  38. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  42. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44. * OTHER DEALINGS IN THE SOFTWARE.
  45. */
  46. #include <dt-bindings/interrupt-controller/arm-gic.h>
  47. #include <dt-bindings/comphy/comphy_data.h>
  48. / {
  49. model = "Marvell Armada 37xx SoC";
  50. compatible = "marvell,armada3700";
  51. interrupt-parent = <&gic>;
  52. #address-cells = <2>;
  53. #size-cells = <2>;
  54. aliases {
  55. serial0 = &uart0;
  56. };
  57. cpus {
  58. #address-cells = <1>;
  59. #size-cells = <0>;
  60. cpu@0 {
  61. device_type = "cpu";
  62. compatible = "arm,cortex-a53", "arm,armv8";
  63. reg = <0>;
  64. enable-method = "psci";
  65. };
  66. };
  67. psci {
  68. compatible = "arm,psci-0.2";
  69. method = "smc";
  70. };
  71. timer {
  72. compatible = "arm,armv8-timer";
  73. interrupts = <GIC_PPI 13
  74. (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  75. <GIC_PPI 14
  76. (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  77. <GIC_PPI 11
  78. (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  79. <GIC_PPI 10
  80. (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  81. };
  82. soc {
  83. compatible = "simple-bus";
  84. #address-cells = <2>;
  85. #size-cells = <2>;
  86. ranges;
  87. internal-regs {
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. compatible = "simple-bus";
  91. /* 32M internal register @ 0xd000_0000 */
  92. ranges = <0x0 0x0 0xd0000000 0x2000000>;
  93. uart0: serial@12000 {
  94. compatible = "marvell,armada-3700-uart";
  95. reg = <0x12000 0x400>;
  96. interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
  97. status = "disabled";
  98. };
  99. usb3: usb@58000 {
  100. compatible = "marvell,armada3700-xhci",
  101. "generic-xhci";
  102. reg = <0x58000 0x4000>;
  103. interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
  104. status = "disabled";
  105. };
  106. usb2: usb@5e000 {
  107. compatible = "marvell,armada3700-ehci";
  108. reg = <0x5e000 0x450>;
  109. status = "disabled";
  110. };
  111. xor@60900 {
  112. compatible = "marvell,armada-3700-xor";
  113. reg = <0x60900 0x100
  114. 0x60b00 0x100>;
  115. xor10 {
  116. interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
  117. };
  118. xor11 {
  119. interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
  120. };
  121. };
  122. sata: sata@e0000 {
  123. compatible = "marvell,armada-3700-ahci";
  124. reg = <0xe0000 0x2000>;
  125. interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
  126. status = "disabled";
  127. };
  128. gic: interrupt-controller@1d00000 {
  129. compatible = "arm,gic-v3";
  130. #interrupt-cells = <3>;
  131. interrupt-controller;
  132. reg = <0x1d00000 0x10000>, /* GICD */
  133. <0x1d40000 0x40000>; /* GICR */
  134. };
  135. eth0: neta@30000 {
  136. compatible = "marvell,armada-3700-neta";
  137. reg = <0x30000 0x20>;
  138. status = "disabled";
  139. };
  140. eth1: neta@40000 {
  141. compatible = "marvell,armada-3700-neta";
  142. reg = <0x40000 0x20>;
  143. status = "disabled";
  144. };
  145. i2c0: i2c@11000 {
  146. compatible = "marvell,armada-3700-i2c";
  147. reg = <0x11000 0x100>;
  148. status = "disabled";
  149. };
  150. spi0: spi@10600 {
  151. compatible = "marvell,armada-3700-spi";
  152. reg = <0x10600 0x50>;
  153. #address-cells = <1>;
  154. #size-cells = <0>;
  155. #clock-cells = <0>;
  156. clock-frequency = <160000>;
  157. spi-max-frequency = <40000>;
  158. status = "disabled";
  159. };
  160. comphy: comphy@18300 {
  161. compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700";
  162. reg = <0x18300 0x28>,
  163. <0x1f300 0x3d000>;
  164. mux-bitcount = <1>;
  165. max-lanes = <2>;
  166. };
  167. };
  168. };
  169. };