am437x-sk-evm.dts 17 KB

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  1. /*
  2. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /* AM437x SK EVM */
  9. /dts-v1/;
  10. #include "am4372.dtsi"
  11. #include <dt-bindings/pinctrl/am43xx.h>
  12. #include <dt-bindings/pwm/pwm.h>
  13. #include <dt-bindings/gpio/gpio.h>
  14. #include <dt-bindings/input/input.h>
  15. / {
  16. model = "TI AM437x SK EVM";
  17. compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
  18. aliases {
  19. display0 = &lcd0;
  20. };
  21. chosen {
  22. stdout-path = &uart0;
  23. tick-timer = &timer2;
  24. };
  25. backlight {
  26. compatible = "pwm-backlight";
  27. pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  28. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  29. default-brightness-level = <8>;
  30. };
  31. sound {
  32. compatible = "ti,da830-evm-audio";
  33. ti,model = "AM437x-SK-EVM";
  34. ti,audio-codec = <&tlv320aic3106>;
  35. ti,mcasp-controller = <&mcasp1>;
  36. ti,codec-clock-rate = <24000000>;
  37. ti,audio-routing =
  38. "Headphone Jack", "HPLOUT",
  39. "Headphone Jack", "HPROUT";
  40. };
  41. matrix_keypad: matrix_keypad@0 {
  42. compatible = "gpio-matrix-keypad";
  43. pinctrl-names = "default";
  44. pinctrl-0 = <&matrix_keypad_pins>;
  45. debounce-delay-ms = <5>;
  46. col-scan-delay-us = <5>;
  47. row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
  48. &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
  49. col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
  50. &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
  51. linux,keymap = <
  52. MATRIX_KEY(0, 0, KEY_DOWN)
  53. MATRIX_KEY(0, 1, KEY_RIGHT)
  54. MATRIX_KEY(1, 0, KEY_LEFT)
  55. MATRIX_KEY(1, 1, KEY_UP)
  56. >;
  57. };
  58. leds {
  59. compatible = "gpio-leds";
  60. pinctrl-names = "default";
  61. pinctrl-0 = <&leds_pins>;
  62. led@0 {
  63. label = "am437x-sk:red:heartbeat";
  64. gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
  65. linux,default-trigger = "heartbeat";
  66. default-state = "off";
  67. };
  68. led@1 {
  69. label = "am437x-sk:green:mmc1";
  70. gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
  71. linux,default-trigger = "mmc0";
  72. default-state = "off";
  73. };
  74. led@2 {
  75. label = "am437x-sk:blue:cpu0";
  76. gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
  77. linux,default-trigger = "cpu0";
  78. default-state = "off";
  79. };
  80. led@3 {
  81. label = "am437x-sk:blue:usr3";
  82. gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
  83. default-state = "off";
  84. };
  85. };
  86. lcd0: display {
  87. compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
  88. label = "lcd";
  89. pinctrl-names = "default";
  90. pinctrl-0 = <&lcd_pins>;
  91. enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  92. panel-timing {
  93. clock-frequency = <9000000>;
  94. hactive = <480>;
  95. vactive = <272>;
  96. hfront-porch = <2>;
  97. hback-porch = <2>;
  98. hsync-len = <41>;
  99. vfront-porch = <2>;
  100. vback-porch = <2>;
  101. vsync-len = <10>;
  102. hsync-active = <0>;
  103. vsync-active = <0>;
  104. de-active = <1>;
  105. pixelclk-active = <1>;
  106. };
  107. port {
  108. lcd_in: endpoint {
  109. remote-endpoint = <&dpi_out>;
  110. };
  111. };
  112. };
  113. };
  114. &am43xx_pinmux {
  115. matrix_keypad_pins: matrix_keypad_pins {
  116. pinctrl-single,pins = <
  117. 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
  118. 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
  119. 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
  120. 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
  121. >;
  122. };
  123. leds_pins: leds_pins {
  124. pinctrl-single,pins = <
  125. 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
  126. 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
  127. 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
  128. 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
  129. >;
  130. };
  131. i2c0_pins: i2c0_pins {
  132. pinctrl-single,pins = <
  133. 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  134. 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  135. >;
  136. };
  137. i2c1_pins: i2c1_pins {
  138. pinctrl-single,pins = <
  139. 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  140. 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
  141. >;
  142. };
  143. mmc1_pins: pinmux_mmc1_pins {
  144. pinctrl-single,pins = <
  145. 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
  146. 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
  147. 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
  148. 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
  149. 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
  150. 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
  151. 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
  152. >;
  153. };
  154. ecap0_pins: backlight_pins {
  155. pinctrl-single,pins = <
  156. 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
  157. >;
  158. };
  159. edt_ft5306_ts_pins: edt_ft5306_ts_pins {
  160. pinctrl-single,pins = <
  161. 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
  162. 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
  163. >;
  164. };
  165. vpfe0_pins_default: vpfe0_pins_default {
  166. pinctrl-single,pins = <
  167. 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
  168. 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
  169. 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
  170. 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
  171. 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
  172. 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
  173. 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
  174. 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
  175. 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
  176. 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
  177. 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
  178. 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
  179. 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
  180. 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
  181. 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
  182. >;
  183. };
  184. vpfe0_pins_sleep: vpfe0_pins_sleep {
  185. pinctrl-single,pins = <
  186. 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  187. 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  188. 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  189. 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  190. 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  191. 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  192. 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  193. 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  194. 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  195. 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  196. 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  197. 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  198. 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  199. 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  200. 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
  201. >;
  202. };
  203. cpsw_default: cpsw_default {
  204. pinctrl-single,pins = <
  205. /* Slave 1 */
  206. 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
  207. 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  208. 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  209. 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  210. 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
  211. 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
  212. 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
  213. 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  214. 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  215. 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  216. 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
  217. 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
  218. /* Slave 2 */
  219. 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
  220. 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
  221. 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
  222. 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
  223. 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
  224. 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
  225. 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
  226. 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
  227. 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
  228. 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
  229. 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
  230. 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
  231. >;
  232. };
  233. cpsw_sleep: cpsw_sleep {
  234. pinctrl-single,pins = <
  235. /* Slave 1 reset value */
  236. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  237. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  238. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  239. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  240. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  241. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  242. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  243. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  244. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  245. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  246. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  247. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  248. /* Slave 2 reset value */
  249. 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  250. 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  251. 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  252. 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  253. 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  254. 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  255. 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  256. 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  257. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  258. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  259. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  260. 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  261. >;
  262. };
  263. davinci_mdio_default: davinci_mdio_default {
  264. pinctrl-single,pins = <
  265. /* MDIO */
  266. 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  267. 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
  268. >;
  269. };
  270. davinci_mdio_sleep: davinci_mdio_sleep {
  271. pinctrl-single,pins = <
  272. /* MDIO reset value */
  273. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  274. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  275. >;
  276. };
  277. dss_pins: dss_pins {
  278. pinctrl-single,pins = <
  279. 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
  280. 0x024 (PIN_OUTPUT | MUX_MODE1)
  281. 0x028 (PIN_OUTPUT | MUX_MODE1)
  282. 0x02c (PIN_OUTPUT | MUX_MODE1)
  283. 0x030 (PIN_OUTPUT | MUX_MODE1)
  284. 0x034 (PIN_OUTPUT | MUX_MODE1)
  285. 0x038 (PIN_OUTPUT | MUX_MODE1)
  286. 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
  287. 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
  288. 0x0a4 (PIN_OUTPUT | MUX_MODE0)
  289. 0x0a8 (PIN_OUTPUT | MUX_MODE0)
  290. 0x0ac (PIN_OUTPUT | MUX_MODE0)
  291. 0x0b0 (PIN_OUTPUT | MUX_MODE0)
  292. 0x0b4 (PIN_OUTPUT | MUX_MODE0)
  293. 0x0b8 (PIN_OUTPUT | MUX_MODE0)
  294. 0x0bc (PIN_OUTPUT | MUX_MODE0)
  295. 0x0c0 (PIN_OUTPUT | MUX_MODE0)
  296. 0x0c4 (PIN_OUTPUT | MUX_MODE0)
  297. 0x0c8 (PIN_OUTPUT | MUX_MODE0)
  298. 0x0cc (PIN_OUTPUT | MUX_MODE0)
  299. 0x0d0 (PIN_OUTPUT | MUX_MODE0)
  300. 0x0d4 (PIN_OUTPUT | MUX_MODE0)
  301. 0x0d8 (PIN_OUTPUT | MUX_MODE0)
  302. 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
  303. 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
  304. 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
  305. 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
  306. 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
  307. >;
  308. };
  309. qspi_pins: qspi_pins {
  310. pinctrl-single,pins = <
  311. 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
  312. 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
  313. 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
  314. 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
  315. 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
  316. 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
  317. >;
  318. };
  319. mcasp1_pins: mcasp1_pins {
  320. pinctrl-single,pins = <
  321. 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
  322. 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
  323. 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
  324. 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
  325. >;
  326. };
  327. lcd_pins: lcd_pins {
  328. pinctrl-single,pins = <
  329. 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
  330. >;
  331. };
  332. usb1_pins: usb1_pins {
  333. pinctrl-single,pins = <
  334. 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
  335. >;
  336. };
  337. usb2_pins: usb2_pins {
  338. pinctrl-single,pins = <
  339. 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
  340. >;
  341. };
  342. };
  343. &i2c0 {
  344. status = "okay";
  345. pinctrl-names = "default";
  346. pinctrl-0 = <&i2c0_pins>;
  347. clock-frequency = <400000>;
  348. tps@24 {
  349. compatible = "ti,tps65218";
  350. reg = <0x24>;
  351. interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  352. interrupt-controller;
  353. #interrupt-cells = <2>;
  354. dcdc1: regulator-dcdc1 {
  355. compatible = "ti,tps65218-dcdc1";
  356. /* VDD_CORE limits min of OPP50 and max of OPP100 */
  357. regulator-name = "vdd_core";
  358. regulator-min-microvolt = <912000>;
  359. regulator-max-microvolt = <1144000>;
  360. regulator-boot-on;
  361. regulator-always-on;
  362. };
  363. dcdc2: regulator-dcdc2 {
  364. compatible = "ti,tps65218-dcdc2";
  365. /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
  366. regulator-name = "vdd_mpu";
  367. regulator-min-microvolt = <912000>;
  368. regulator-max-microvolt = <1378000>;
  369. regulator-boot-on;
  370. regulator-always-on;
  371. };
  372. dcdc3: regulator-dcdc3 {
  373. compatible = "ti,tps65218-dcdc3";
  374. regulator-name = "vdds_ddr";
  375. regulator-min-microvolt = <1500000>;
  376. regulator-max-microvolt = <1500000>;
  377. regulator-boot-on;
  378. regulator-always-on;
  379. };
  380. dcdc4: regulator-dcdc4 {
  381. compatible = "ti,tps65218-dcdc4";
  382. regulator-name = "v3_3d";
  383. regulator-min-microvolt = <3300000>;
  384. regulator-max-microvolt = <3300000>;
  385. regulator-boot-on;
  386. regulator-always-on;
  387. };
  388. ldo1: regulator-ldo1 {
  389. compatible = "ti,tps65218-ldo1";
  390. regulator-name = "v1_8d";
  391. regulator-min-microvolt = <1800000>;
  392. regulator-max-microvolt = <1800000>;
  393. regulator-boot-on;
  394. regulator-always-on;
  395. };
  396. power-button {
  397. compatible = "ti,tps65218-pwrbutton";
  398. status = "okay";
  399. interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
  400. };
  401. };
  402. at24@50 {
  403. compatible = "at24,24c256";
  404. pagesize = <64>;
  405. reg = <0x50>;
  406. };
  407. };
  408. &i2c1 {
  409. status = "okay";
  410. pinctrl-names = "default";
  411. pinctrl-0 = <&i2c1_pins>;
  412. clock-frequency = <400000>;
  413. edt-ft5306@38 {
  414. status = "okay";
  415. compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
  416. pinctrl-names = "default";
  417. pinctrl-0 = <&edt_ft5306_ts_pins>;
  418. reg = <0x38>;
  419. interrupt-parent = <&gpio0>;
  420. interrupts = <31 0>;
  421. reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
  422. touchscreen-size-x = <480>;
  423. touchscreen-size-y = <272>;
  424. };
  425. tlv320aic3106: tlv320aic3106@1b {
  426. compatible = "ti,tlv320aic3106";
  427. reg = <0x1b>;
  428. status = "okay";
  429. /* Regulators */
  430. AVDD-supply = <&dcdc4>;
  431. IOVDD-supply = <&dcdc4>;
  432. DRVDD-supply = <&dcdc4>;
  433. DVDD-supply = <&ldo1>;
  434. };
  435. lis331dlh@18 {
  436. compatible = "st,lis331dlh";
  437. reg = <0x18>;
  438. status = "okay";
  439. Vdd-supply = <&dcdc4>;
  440. Vdd_IO-supply = <&dcdc4>;
  441. interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
  442. };
  443. };
  444. &epwmss0 {
  445. status = "okay";
  446. };
  447. &ecap0 {
  448. status = "okay";
  449. pinctrl-names = "default";
  450. pinctrl-0 = <&ecap0_pins>;
  451. };
  452. &gpio0 {
  453. status = "okay";
  454. };
  455. &gpio1 {
  456. status = "okay";
  457. };
  458. &gpio5 {
  459. status = "okay";
  460. };
  461. &mmc1 {
  462. status = "okay";
  463. pinctrl-names = "default";
  464. pinctrl-0 = <&mmc1_pins>;
  465. vmmc-supply = <&dcdc4>;
  466. bus-width = <4>;
  467. cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
  468. };
  469. &usb2_phy1 {
  470. status = "okay";
  471. };
  472. &usb1 {
  473. dr_mode = "peripheral";
  474. status = "okay";
  475. pinctrl-names = "default";
  476. pinctrl-0 = <&usb1_pins>;
  477. };
  478. &usb2_phy2 {
  479. status = "okay";
  480. };
  481. &usb2 {
  482. dr_mode = "host";
  483. status = "okay";
  484. pinctrl-names = "default";
  485. pinctrl-0 = <&usb2_pins>;
  486. };
  487. &qspi {
  488. status = "okay";
  489. pinctrl-names = "default";
  490. pinctrl-0 = <&qspi_pins>;
  491. spi-max-frequency = <48000000>;
  492. m25p80@0 {
  493. compatible = "mx66l51235l","spi-flash";
  494. spi-max-frequency = <48000000>;
  495. reg = <0>;
  496. spi-cpol;
  497. spi-cpha;
  498. spi-tx-bus-width = <1>;
  499. spi-rx-bus-width = <4>;
  500. #address-cells = <1>;
  501. #size-cells = <1>;
  502. /* MTD partition table.
  503. * The ROM checks the first 512KiB
  504. * for a valid file to boot(XIP).
  505. */
  506. partition@0 {
  507. label = "QSPI.U_BOOT";
  508. reg = <0x00000000 0x000080000>;
  509. };
  510. partition@1 {
  511. label = "QSPI.U_BOOT.backup";
  512. reg = <0x00080000 0x00080000>;
  513. };
  514. partition@2 {
  515. label = "QSPI.U-BOOT-SPL_OS";
  516. reg = <0x00100000 0x00010000>;
  517. };
  518. partition@3 {
  519. label = "QSPI.U_BOOT_ENV";
  520. reg = <0x00110000 0x00010000>;
  521. };
  522. partition@4 {
  523. label = "QSPI.U-BOOT-ENV.backup";
  524. reg = <0x00120000 0x00010000>;
  525. };
  526. partition@5 {
  527. label = "QSPI.KERNEL";
  528. reg = <0x00130000 0x0800000>;
  529. };
  530. partition@6 {
  531. label = "QSPI.FILESYSTEM";
  532. reg = <0x00930000 0x36D0000>;
  533. };
  534. };
  535. };
  536. &mac {
  537. pinctrl-names = "default", "sleep";
  538. pinctrl-0 = <&cpsw_default>;
  539. pinctrl-1 = <&cpsw_sleep>;
  540. dual_emac = <1>;
  541. status = "okay";
  542. };
  543. &davinci_mdio {
  544. pinctrl-names = "default", "sleep";
  545. pinctrl-0 = <&davinci_mdio_default>;
  546. pinctrl-1 = <&davinci_mdio_sleep>;
  547. status = "okay";
  548. };
  549. &cpsw_emac0 {
  550. phy_id = <&davinci_mdio>, <4>;
  551. phy-mode = "rgmii";
  552. dual_emac_res_vlan = <1>;
  553. };
  554. &cpsw_emac1 {
  555. phy_id = <&davinci_mdio>, <5>;
  556. phy-mode = "rgmii";
  557. dual_emac_res_vlan = <2>;
  558. };
  559. &elm {
  560. status = "okay";
  561. };
  562. &mcasp1 {
  563. pinctrl-names = "default";
  564. pinctrl-0 = <&mcasp1_pins>;
  565. status = "okay";
  566. op-mode = <0>;
  567. tdm-slots = <2>;
  568. serial-dir = <
  569. 0 0 1 2
  570. >;
  571. tx-num-evt = <1>;
  572. rx-num-evt = <1>;
  573. };
  574. &dss {
  575. status = "okay";
  576. pinctrl-names = "default";
  577. pinctrl-0 = <&dss_pins>;
  578. port {
  579. dpi_out: endpoint@0 {
  580. remote-endpoint = <&lcd_in>;
  581. data-lines = <24>;
  582. };
  583. };
  584. };
  585. &rtc {
  586. status = "okay";
  587. };
  588. &wdt {
  589. status = "okay";
  590. };
  591. &cpu {
  592. cpu0-supply = <&dcdc2>;
  593. };
  594. &vpfe0 {
  595. status = "okay";
  596. pinctrl-names = "default", "sleep";
  597. pinctrl-0 = <&vpfe0_pins_default>;
  598. pinctrl-1 = <&vpfe0_pins_sleep>;
  599. /* Camera port */
  600. port {
  601. vpfe0_ep: endpoint {
  602. /* remote-endpoint = <&sensor>; add once we have it */
  603. ti,am437x-vpfe-interface = <0>;
  604. bus-width = <8>;
  605. hsync-active = <0>;
  606. vsync-active = <0>;
  607. };
  608. };
  609. };