am33xx.dtsi 20 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. i2c0 = &i2c0;
  18. i2c1 = &i2c1;
  19. i2c2 = &i2c2;
  20. serial0 = &uart0;
  21. serial1 = &uart1;
  22. serial2 = &uart2;
  23. serial3 = &uart3;
  24. serial4 = &uart4;
  25. serial5 = &uart5;
  26. d_can0 = &dcan0;
  27. d_can1 = &dcan1;
  28. usb0 = &usb0;
  29. usb1 = &usb1;
  30. phy0 = &usb0_phy;
  31. phy1 = &usb1_phy;
  32. ethernet0 = &cpsw_emac0;
  33. ethernet1 = &cpsw_emac1;
  34. };
  35. cpus {
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. cpu@0 {
  39. compatible = "arm,cortex-a8";
  40. device_type = "cpu";
  41. reg = <0>;
  42. /*
  43. * To consider voltage drop between PMIC and SoC,
  44. * tolerance value is reduced to 2% from 4% and
  45. * voltage value is increased as a precaution.
  46. */
  47. operating-points = <
  48. /* kHz uV */
  49. 720000 1285000
  50. 600000 1225000
  51. 500000 1125000
  52. 275000 1125000
  53. >;
  54. voltage-tolerance = <2>; /* 2 percentage */
  55. clocks = <&dpll_mpu_ck>;
  56. clock-names = "cpu";
  57. clock-latency = <300000>; /* From omap-cpufreq driver */
  58. };
  59. };
  60. pmu {
  61. compatible = "arm,cortex-a8-pmu";
  62. interrupts = <3>;
  63. };
  64. /*
  65. * The soc node represents the soc top level view. It is used for IPs
  66. * that are not memory mapped in the MPU view or for the MPU itself.
  67. */
  68. soc {
  69. compatible = "ti,omap-infra";
  70. mpu {
  71. compatible = "ti,omap3-mpu";
  72. ti,hwmods = "mpu";
  73. };
  74. };
  75. /*
  76. * XXX: Use a flat representation of the AM33XX interconnect.
  77. * The real AM33XX interconnect network is quite complex. Since
  78. * it will not bring real advantage to represent that in DT
  79. * for the moment, just use a fake OCP bus entry to represent
  80. * the whole bus hierarchy.
  81. */
  82. ocp {
  83. compatible = "simple-bus";
  84. #address-cells = <1>;
  85. #size-cells = <1>;
  86. ranges;
  87. ti,hwmods = "l3_main";
  88. l4_wkup: l4_wkup@44c00000 {
  89. compatible = "ti,am3-l4-wkup", "simple-bus";
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. ranges = <0 0x44c00000 0x280000>;
  93. prcm: prcm@200000 {
  94. compatible = "ti,am3-prcm";
  95. reg = <0x200000 0x4000>;
  96. prcm_clocks: clocks {
  97. #address-cells = <1>;
  98. #size-cells = <0>;
  99. };
  100. prcm_clockdomains: clockdomains {
  101. };
  102. };
  103. scm: scm@210000 {
  104. compatible = "ti,am3-scm", "simple-bus";
  105. reg = <0x210000 0x2000>;
  106. #address-cells = <1>;
  107. #size-cells = <1>;
  108. ranges = <0 0x210000 0x2000>;
  109. am33xx_pinmux: pinmux@800 {
  110. compatible = "pinctrl-single";
  111. reg = <0x800 0x238>;
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. pinctrl-single,register-width = <32>;
  115. pinctrl-single,function-mask = <0x7f>;
  116. };
  117. scm_conf: scm_conf@0 {
  118. compatible = "syscon";
  119. reg = <0x0 0x800>;
  120. #address-cells = <1>;
  121. #size-cells = <1>;
  122. scm_clocks: clocks {
  123. #address-cells = <1>;
  124. #size-cells = <0>;
  125. };
  126. };
  127. scm_clockdomains: clockdomains {
  128. };
  129. };
  130. };
  131. intc: interrupt-controller@48200000 {
  132. compatible = "ti,am33xx-intc";
  133. interrupt-controller;
  134. #interrupt-cells = <1>;
  135. reg = <0x48200000 0x1000>;
  136. };
  137. edma: edma@49000000 {
  138. compatible = "ti,edma3";
  139. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  140. reg = <0x49000000 0x10000>,
  141. <0x44e10f90 0x40>;
  142. interrupts = <12 13 14>;
  143. #dma-cells = <1>;
  144. };
  145. gpio0: gpio@44e07000 {
  146. compatible = "ti,omap4-gpio";
  147. ti,hwmods = "gpio1";
  148. gpio-controller;
  149. #gpio-cells = <2>;
  150. interrupt-controller;
  151. #interrupt-cells = <2>;
  152. reg = <0x44e07000 0x1000>;
  153. interrupts = <96>;
  154. };
  155. gpio1: gpio@4804c000 {
  156. compatible = "ti,omap4-gpio";
  157. ti,hwmods = "gpio2";
  158. gpio-controller;
  159. #gpio-cells = <2>;
  160. interrupt-controller;
  161. #interrupt-cells = <2>;
  162. reg = <0x4804c000 0x1000>;
  163. interrupts = <98>;
  164. };
  165. gpio2: gpio@481ac000 {
  166. compatible = "ti,omap4-gpio";
  167. ti,hwmods = "gpio3";
  168. gpio-controller;
  169. #gpio-cells = <2>;
  170. interrupt-controller;
  171. #interrupt-cells = <2>;
  172. reg = <0x481ac000 0x1000>;
  173. interrupts = <32>;
  174. };
  175. gpio3: gpio@481ae000 {
  176. compatible = "ti,omap4-gpio";
  177. ti,hwmods = "gpio4";
  178. gpio-controller;
  179. #gpio-cells = <2>;
  180. interrupt-controller;
  181. #interrupt-cells = <2>;
  182. reg = <0x481ae000 0x1000>;
  183. interrupts = <62>;
  184. };
  185. uart0: serial@44e09000 {
  186. compatible = "ti,omap3-uart";
  187. ti,hwmods = "uart1";
  188. clock-frequency = <48000000>;
  189. reg = <0x44e09000 0x2000>;
  190. reg-shift = <2>;
  191. interrupts = <72>;
  192. status = "disabled";
  193. dmas = <&edma 26>, <&edma 27>;
  194. dma-names = "tx", "rx";
  195. };
  196. uart1: serial@48022000 {
  197. compatible = "ti,omap3-uart";
  198. ti,hwmods = "uart2";
  199. clock-frequency = <48000000>;
  200. reg = <0x48022000 0x2000>;
  201. reg-shift = <2>;
  202. interrupts = <73>;
  203. status = "disabled";
  204. dmas = <&edma 28>, <&edma 29>;
  205. dma-names = "tx", "rx";
  206. };
  207. uart2: serial@48024000 {
  208. compatible = "ti,omap3-uart";
  209. ti,hwmods = "uart3";
  210. clock-frequency = <48000000>;
  211. reg = <0x48024000 0x2000>;
  212. reg-shift = <2>;
  213. interrupts = <74>;
  214. status = "disabled";
  215. dmas = <&edma 30>, <&edma 31>;
  216. dma-names = "tx", "rx";
  217. };
  218. uart3: serial@481a6000 {
  219. compatible = "ti,omap3-uart";
  220. ti,hwmods = "uart4";
  221. clock-frequency = <48000000>;
  222. reg = <0x481a6000 0x2000>;
  223. reg-shift = <2>;
  224. interrupts = <44>;
  225. status = "disabled";
  226. };
  227. uart4: serial@481a8000 {
  228. compatible = "ti,omap3-uart";
  229. ti,hwmods = "uart5";
  230. clock-frequency = <48000000>;
  231. reg = <0x481a8000 0x2000>;
  232. reg-shift = <2>;
  233. interrupts = <45>;
  234. status = "disabled";
  235. };
  236. uart5: serial@481aa000 {
  237. compatible = "ti,omap3-uart";
  238. ti,hwmods = "uart6";
  239. clock-frequency = <48000000>;
  240. reg = <0x481aa000 0x2000>;
  241. reg-shift = <2>;
  242. interrupts = <46>;
  243. status = "disabled";
  244. };
  245. i2c0: i2c@44e0b000 {
  246. compatible = "ti,omap4-i2c";
  247. #address-cells = <1>;
  248. #size-cells = <0>;
  249. ti,hwmods = "i2c1";
  250. reg = <0x44e0b000 0x1000>;
  251. interrupts = <70>;
  252. status = "disabled";
  253. };
  254. i2c1: i2c@4802a000 {
  255. compatible = "ti,omap4-i2c";
  256. #address-cells = <1>;
  257. #size-cells = <0>;
  258. ti,hwmods = "i2c2";
  259. reg = <0x4802a000 0x1000>;
  260. interrupts = <71>;
  261. status = "disabled";
  262. };
  263. i2c2: i2c@4819c000 {
  264. compatible = "ti,omap4-i2c";
  265. #address-cells = <1>;
  266. #size-cells = <0>;
  267. ti,hwmods = "i2c3";
  268. reg = <0x4819c000 0x1000>;
  269. interrupts = <30>;
  270. status = "disabled";
  271. };
  272. mmc1: mmc@48060000 {
  273. compatible = "ti,omap4-hsmmc";
  274. ti,hwmods = "mmc1";
  275. ti,dual-volt;
  276. ti,needs-special-reset;
  277. ti,needs-special-hs-handling;
  278. dmas = <&edma 24
  279. &edma 25>;
  280. dma-names = "tx", "rx";
  281. interrupts = <64>;
  282. interrupt-parent = <&intc>;
  283. reg = <0x48060000 0x1000>;
  284. status = "disabled";
  285. };
  286. mmc2: mmc@481d8000 {
  287. compatible = "ti,omap4-hsmmc";
  288. ti,hwmods = "mmc2";
  289. ti,needs-special-reset;
  290. dmas = <&edma 2
  291. &edma 3>;
  292. dma-names = "tx", "rx";
  293. interrupts = <28>;
  294. interrupt-parent = <&intc>;
  295. reg = <0x481d8000 0x1000>;
  296. status = "disabled";
  297. };
  298. mmc3: mmc@47810000 {
  299. compatible = "ti,omap4-hsmmc";
  300. ti,hwmods = "mmc3";
  301. ti,needs-special-reset;
  302. interrupts = <29>;
  303. interrupt-parent = <&intc>;
  304. reg = <0x47810000 0x1000>;
  305. status = "disabled";
  306. };
  307. hwspinlock: spinlock@480ca000 {
  308. compatible = "ti,omap4-hwspinlock";
  309. reg = <0x480ca000 0x1000>;
  310. ti,hwmods = "spinlock";
  311. #hwlock-cells = <1>;
  312. };
  313. wdt2: wdt@44e35000 {
  314. compatible = "ti,omap3-wdt";
  315. ti,hwmods = "wd_timer2";
  316. reg = <0x44e35000 0x1000>;
  317. interrupts = <91>;
  318. };
  319. dcan0: can@481cc000 {
  320. compatible = "ti,am3352-d_can";
  321. ti,hwmods = "d_can0";
  322. reg = <0x481cc000 0x2000>;
  323. clocks = <&dcan0_fck>;
  324. clock-names = "fck";
  325. syscon-raminit = <&scm_conf 0x644 0>;
  326. interrupts = <52>;
  327. status = "disabled";
  328. };
  329. dcan1: can@481d0000 {
  330. compatible = "ti,am3352-d_can";
  331. ti,hwmods = "d_can1";
  332. reg = <0x481d0000 0x2000>;
  333. clocks = <&dcan1_fck>;
  334. clock-names = "fck";
  335. syscon-raminit = <&scm_conf 0x644 1>;
  336. interrupts = <55>;
  337. status = "disabled";
  338. };
  339. mailbox: mailbox@480C8000 {
  340. compatible = "ti,omap4-mailbox";
  341. reg = <0x480C8000 0x200>;
  342. interrupts = <77>;
  343. ti,hwmods = "mailbox";
  344. #mbox-cells = <1>;
  345. ti,mbox-num-users = <4>;
  346. ti,mbox-num-fifos = <8>;
  347. mbox_wkupm3: wkup_m3 {
  348. ti,mbox-tx = <0 0 0>;
  349. ti,mbox-rx = <0 0 3>;
  350. };
  351. };
  352. timer1: timer@44e31000 {
  353. compatible = "ti,am335x-timer-1ms";
  354. reg = <0x44e31000 0x400>;
  355. interrupts = <67>;
  356. ti,hwmods = "timer1";
  357. ti,timer-alwon;
  358. };
  359. timer2: timer@48040000 {
  360. compatible = "ti,am335x-timer";
  361. reg = <0x48040000 0x400>;
  362. interrupts = <68>;
  363. ti,hwmods = "timer2";
  364. };
  365. timer3: timer@48042000 {
  366. compatible = "ti,am335x-timer";
  367. reg = <0x48042000 0x400>;
  368. interrupts = <69>;
  369. ti,hwmods = "timer3";
  370. };
  371. timer4: timer@48044000 {
  372. compatible = "ti,am335x-timer";
  373. reg = <0x48044000 0x400>;
  374. interrupts = <92>;
  375. ti,hwmods = "timer4";
  376. ti,timer-pwm;
  377. };
  378. timer5: timer@48046000 {
  379. compatible = "ti,am335x-timer";
  380. reg = <0x48046000 0x400>;
  381. interrupts = <93>;
  382. ti,hwmods = "timer5";
  383. ti,timer-pwm;
  384. };
  385. timer6: timer@48048000 {
  386. compatible = "ti,am335x-timer";
  387. reg = <0x48048000 0x400>;
  388. interrupts = <94>;
  389. ti,hwmods = "timer6";
  390. ti,timer-pwm;
  391. };
  392. timer7: timer@4804a000 {
  393. compatible = "ti,am335x-timer";
  394. reg = <0x4804a000 0x400>;
  395. interrupts = <95>;
  396. ti,hwmods = "timer7";
  397. ti,timer-pwm;
  398. };
  399. rtc: rtc@44e3e000 {
  400. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  401. reg = <0x44e3e000 0x1000>;
  402. interrupts = <75
  403. 76>;
  404. ti,hwmods = "rtc";
  405. };
  406. spi0: spi@48030000 {
  407. compatible = "ti,omap4-mcspi";
  408. #address-cells = <1>;
  409. #size-cells = <0>;
  410. reg = <0x48030000 0x400>;
  411. interrupts = <65>;
  412. ti,spi-num-cs = <2>;
  413. ti,hwmods = "spi0";
  414. dmas = <&edma 16
  415. &edma 17
  416. &edma 18
  417. &edma 19>;
  418. dma-names = "tx0", "rx0", "tx1", "rx1";
  419. status = "disabled";
  420. };
  421. spi1: spi@481a0000 {
  422. compatible = "ti,omap4-mcspi";
  423. #address-cells = <1>;
  424. #size-cells = <0>;
  425. reg = <0x481a0000 0x400>;
  426. interrupts = <125>;
  427. ti,spi-num-cs = <2>;
  428. ti,hwmods = "spi1";
  429. dmas = <&edma 42
  430. &edma 43
  431. &edma 44
  432. &edma 45>;
  433. dma-names = "tx0", "rx0", "tx1", "rx1";
  434. status = "disabled";
  435. };
  436. usb: usb@47400000 {
  437. compatible = "ti,am33xx-usb";
  438. reg = <0x47400000 0x1000>;
  439. ranges;
  440. #address-cells = <1>;
  441. #size-cells = <1>;
  442. ti,hwmods = "usb_otg_hs";
  443. status = "disabled";
  444. usb_ctrl_mod: control@44e10620 {
  445. compatible = "ti,am335x-usb-ctrl-module";
  446. reg = <0x44e10620 0x10
  447. 0x44e10648 0x4>;
  448. reg-names = "phy_ctrl", "wakeup";
  449. status = "disabled";
  450. };
  451. usb0_phy: usb-phy@47401300 {
  452. compatible = "ti,am335x-usb-phy";
  453. reg = <0x47401300 0x100>;
  454. reg-names = "phy";
  455. status = "disabled";
  456. ti,ctrl_mod = <&usb_ctrl_mod>;
  457. };
  458. usb0: usb@47401000 {
  459. compatible = "ti,musb-am33xx";
  460. status = "disabled";
  461. reg = <0x47401400 0x400
  462. 0x47401000 0x200>;
  463. reg-names = "mc", "control";
  464. interrupts = <18>;
  465. interrupt-names = "mc";
  466. dr_mode = "otg";
  467. mentor,multipoint = <1>;
  468. mentor,num-eps = <16>;
  469. mentor,ram-bits = <12>;
  470. mentor,power = <500>;
  471. phys = <&usb0_phy>;
  472. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  473. &cppi41dma 2 0 &cppi41dma 3 0
  474. &cppi41dma 4 0 &cppi41dma 5 0
  475. &cppi41dma 6 0 &cppi41dma 7 0
  476. &cppi41dma 8 0 &cppi41dma 9 0
  477. &cppi41dma 10 0 &cppi41dma 11 0
  478. &cppi41dma 12 0 &cppi41dma 13 0
  479. &cppi41dma 14 0 &cppi41dma 0 1
  480. &cppi41dma 1 1 &cppi41dma 2 1
  481. &cppi41dma 3 1 &cppi41dma 4 1
  482. &cppi41dma 5 1 &cppi41dma 6 1
  483. &cppi41dma 7 1 &cppi41dma 8 1
  484. &cppi41dma 9 1 &cppi41dma 10 1
  485. &cppi41dma 11 1 &cppi41dma 12 1
  486. &cppi41dma 13 1 &cppi41dma 14 1>;
  487. dma-names =
  488. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  489. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  490. "rx14", "rx15",
  491. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  492. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  493. "tx14", "tx15";
  494. };
  495. usb1_phy: usb-phy@47401b00 {
  496. compatible = "ti,am335x-usb-phy";
  497. reg = <0x47401b00 0x100>;
  498. reg-names = "phy";
  499. status = "disabled";
  500. ti,ctrl_mod = <&usb_ctrl_mod>;
  501. };
  502. usb1: usb@47401800 {
  503. compatible = "ti,musb-am33xx";
  504. status = "disabled";
  505. reg = <0x47401c00 0x400
  506. 0x47401800 0x200>;
  507. reg-names = "mc", "control";
  508. interrupts = <19>;
  509. interrupt-names = "mc";
  510. dr_mode = "otg";
  511. mentor,multipoint = <1>;
  512. mentor,num-eps = <16>;
  513. mentor,ram-bits = <12>;
  514. mentor,power = <500>;
  515. phys = <&usb1_phy>;
  516. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  517. &cppi41dma 17 0 &cppi41dma 18 0
  518. &cppi41dma 19 0 &cppi41dma 20 0
  519. &cppi41dma 21 0 &cppi41dma 22 0
  520. &cppi41dma 23 0 &cppi41dma 24 0
  521. &cppi41dma 25 0 &cppi41dma 26 0
  522. &cppi41dma 27 0 &cppi41dma 28 0
  523. &cppi41dma 29 0 &cppi41dma 15 1
  524. &cppi41dma 16 1 &cppi41dma 17 1
  525. &cppi41dma 18 1 &cppi41dma 19 1
  526. &cppi41dma 20 1 &cppi41dma 21 1
  527. &cppi41dma 22 1 &cppi41dma 23 1
  528. &cppi41dma 24 1 &cppi41dma 25 1
  529. &cppi41dma 26 1 &cppi41dma 27 1
  530. &cppi41dma 28 1 &cppi41dma 29 1>;
  531. dma-names =
  532. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  533. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  534. "rx14", "rx15",
  535. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  536. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  537. "tx14", "tx15";
  538. };
  539. cppi41dma: dma-controller@47402000 {
  540. compatible = "ti,am3359-cppi41";
  541. reg = <0x47400000 0x1000
  542. 0x47402000 0x1000
  543. 0x47403000 0x1000
  544. 0x47404000 0x4000>;
  545. reg-names = "glue", "controller", "scheduler", "queuemgr";
  546. interrupts = <17>;
  547. interrupt-names = "glue";
  548. #dma-cells = <2>;
  549. #dma-channels = <30>;
  550. #dma-requests = <256>;
  551. status = "disabled";
  552. };
  553. };
  554. epwmss0: epwmss@48300000 {
  555. compatible = "ti,am33xx-pwmss";
  556. reg = <0x48300000 0x10>;
  557. ti,hwmods = "epwmss0";
  558. #address-cells = <1>;
  559. #size-cells = <1>;
  560. status = "disabled";
  561. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  562. 0x48300180 0x48300180 0x80 /* EQEP */
  563. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  564. ecap0: ecap@48300100 {
  565. compatible = "ti,am33xx-ecap";
  566. #pwm-cells = <3>;
  567. reg = <0x48300100 0x80>;
  568. interrupts = <31>;
  569. interrupt-names = "ecap0";
  570. ti,hwmods = "ecap0";
  571. status = "disabled";
  572. };
  573. ehrpwm0: ehrpwm@48300200 {
  574. compatible = "ti,am33xx-ehrpwm";
  575. #pwm-cells = <3>;
  576. reg = <0x48300200 0x80>;
  577. ti,hwmods = "ehrpwm0";
  578. status = "disabled";
  579. };
  580. };
  581. epwmss1: epwmss@48302000 {
  582. compatible = "ti,am33xx-pwmss";
  583. reg = <0x48302000 0x10>;
  584. ti,hwmods = "epwmss1";
  585. #address-cells = <1>;
  586. #size-cells = <1>;
  587. status = "disabled";
  588. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  589. 0x48302180 0x48302180 0x80 /* EQEP */
  590. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  591. ecap1: ecap@48302100 {
  592. compatible = "ti,am33xx-ecap";
  593. #pwm-cells = <3>;
  594. reg = <0x48302100 0x80>;
  595. interrupts = <47>;
  596. interrupt-names = "ecap1";
  597. ti,hwmods = "ecap1";
  598. status = "disabled";
  599. };
  600. ehrpwm1: ehrpwm@48302200 {
  601. compatible = "ti,am33xx-ehrpwm";
  602. #pwm-cells = <3>;
  603. reg = <0x48302200 0x80>;
  604. ti,hwmods = "ehrpwm1";
  605. status = "disabled";
  606. };
  607. };
  608. epwmss2: epwmss@48304000 {
  609. compatible = "ti,am33xx-pwmss";
  610. reg = <0x48304000 0x10>;
  611. ti,hwmods = "epwmss2";
  612. #address-cells = <1>;
  613. #size-cells = <1>;
  614. status = "disabled";
  615. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  616. 0x48304180 0x48304180 0x80 /* EQEP */
  617. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  618. ecap2: ecap@48304100 {
  619. compatible = "ti,am33xx-ecap";
  620. #pwm-cells = <3>;
  621. reg = <0x48304100 0x80>;
  622. interrupts = <61>;
  623. interrupt-names = "ecap2";
  624. ti,hwmods = "ecap2";
  625. status = "disabled";
  626. };
  627. ehrpwm2: ehrpwm@48304200 {
  628. compatible = "ti,am33xx-ehrpwm";
  629. #pwm-cells = <3>;
  630. reg = <0x48304200 0x80>;
  631. ti,hwmods = "ehrpwm2";
  632. status = "disabled";
  633. };
  634. };
  635. mac: ethernet@4a100000 {
  636. compatible = "ti,cpsw";
  637. ti,hwmods = "cpgmac0";
  638. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  639. clock-names = "fck", "cpts";
  640. cpdma_channels = <8>;
  641. ale_entries = <1024>;
  642. bd_ram_size = <0x2000>;
  643. no_bd_ram = <0>;
  644. rx_descs = <64>;
  645. mac_control = <0x20>;
  646. slaves = <2>;
  647. active_slave = <0>;
  648. cpts_clock_mult = <0x80000000>;
  649. cpts_clock_shift = <29>;
  650. reg = <0x4a100000 0x800
  651. 0x4a101200 0x100>;
  652. #address-cells = <1>;
  653. #size-cells = <1>;
  654. interrupt-parent = <&intc>;
  655. /*
  656. * c0_rx_thresh_pend
  657. * c0_rx_pend
  658. * c0_tx_pend
  659. * c0_misc_pend
  660. */
  661. interrupts = <40 41 42 43>;
  662. ranges;
  663. syscon = <&scm_conf>;
  664. status = "disabled";
  665. davinci_mdio: mdio@4a101000 {
  666. compatible = "ti,davinci_mdio";
  667. #address-cells = <1>;
  668. #size-cells = <0>;
  669. ti,hwmods = "davinci_mdio";
  670. bus_freq = <1000000>;
  671. reg = <0x4a101000 0x100>;
  672. status = "disabled";
  673. };
  674. cpsw_emac0: slave@4a100200 {
  675. /* Filled in by U-Boot */
  676. mac-address = [ 00 00 00 00 00 00 ];
  677. };
  678. cpsw_emac1: slave@4a100300 {
  679. /* Filled in by U-Boot */
  680. mac-address = [ 00 00 00 00 00 00 ];
  681. };
  682. phy_sel: cpsw-phy-sel@44e10650 {
  683. compatible = "ti,am3352-cpsw-phy-sel";
  684. reg= <0x44e10650 0x4>;
  685. reg-names = "gmii-sel";
  686. };
  687. };
  688. ocmcram: ocmcram@40300000 {
  689. compatible = "mmio-sram";
  690. reg = <0x40300000 0x10000>; /* 64k */
  691. };
  692. wkup_m3: wkup_m3@44d00000 {
  693. compatible = "ti,am3353-wkup-m3";
  694. reg = <0x44d00000 0x4000 /* M3 UMEM */
  695. 0x44d80000 0x2000>; /* M3 DMEM */
  696. ti,hwmods = "wkup_m3";
  697. ti,no-reset-on-init;
  698. };
  699. elm: elm@48080000 {
  700. compatible = "ti,am3352-elm";
  701. reg = <0x48080000 0x2000>;
  702. interrupts = <4>;
  703. ti,hwmods = "elm";
  704. status = "disabled";
  705. };
  706. lcdc: lcdc@4830e000 {
  707. compatible = "ti,am33xx-tilcdc";
  708. reg = <0x4830e000 0x1000>;
  709. interrupt-parent = <&intc>;
  710. interrupts = <36>;
  711. ti,hwmods = "lcdc";
  712. status = "disabled";
  713. };
  714. tscadc: tscadc@44e0d000 {
  715. compatible = "ti,am3359-tscadc";
  716. reg = <0x44e0d000 0x1000>;
  717. interrupt-parent = <&intc>;
  718. interrupts = <16>;
  719. ti,hwmods = "adc_tsc";
  720. status = "disabled";
  721. tsc {
  722. compatible = "ti,am3359-tsc";
  723. };
  724. am335x_adc: adc {
  725. #io-channel-cells = <1>;
  726. compatible = "ti,am3359-adc";
  727. };
  728. };
  729. gpmc: gpmc@50000000 {
  730. compatible = "ti,am3352-gpmc";
  731. ti,hwmods = "gpmc";
  732. ti,no-idle-on-init;
  733. reg = <0x50000000 0x2000>;
  734. interrupts = <100>;
  735. gpmc,num-cs = <7>;
  736. gpmc,num-waitpins = <2>;
  737. #address-cells = <2>;
  738. #size-cells = <1>;
  739. status = "disabled";
  740. };
  741. sham: sham@53100000 {
  742. compatible = "ti,omap4-sham";
  743. ti,hwmods = "sham";
  744. reg = <0x53100000 0x200>;
  745. interrupts = <109>;
  746. dmas = <&edma 36>;
  747. dma-names = "rx";
  748. };
  749. aes: aes@53500000 {
  750. compatible = "ti,omap4-aes";
  751. ti,hwmods = "aes";
  752. reg = <0x53500000 0xa0>;
  753. interrupts = <103>;
  754. dmas = <&edma 6>,
  755. <&edma 5>;
  756. dma-names = "tx", "rx";
  757. };
  758. mcasp0: mcasp@48038000 {
  759. compatible = "ti,am33xx-mcasp-audio";
  760. ti,hwmods = "mcasp0";
  761. reg = <0x48038000 0x2000>,
  762. <0x46000000 0x400000>;
  763. reg-names = "mpu", "dat";
  764. interrupts = <80>, <81>;
  765. interrupt-names = "tx", "rx";
  766. status = "disabled";
  767. dmas = <&edma 8>,
  768. <&edma 9>;
  769. dma-names = "tx", "rx";
  770. };
  771. mcasp1: mcasp@4803C000 {
  772. compatible = "ti,am33xx-mcasp-audio";
  773. ti,hwmods = "mcasp1";
  774. reg = <0x4803C000 0x2000>,
  775. <0x46400000 0x400000>;
  776. reg-names = "mpu", "dat";
  777. interrupts = <82>, <83>;
  778. interrupt-names = "tx", "rx";
  779. status = "disabled";
  780. dmas = <&edma 10>,
  781. <&edma 11>;
  782. dma-names = "tx", "rx";
  783. };
  784. rng: rng@48310000 {
  785. compatible = "ti,omap4-rng";
  786. ti,hwmods = "rng";
  787. reg = <0x48310000 0x2000>;
  788. interrupts = <111>;
  789. };
  790. };
  791. };
  792. /include/ "am33xx-clocks.dtsi"