.am335x-rut.dtb.dts.tmp 30 KB

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  1. # 1 "<stdin>"
  2. # 1 "<built-in>"
  3. # 1 "<command-line>"
  4. # 1 "././include/linux/kconfig.h" 1
  5. # 1 "include/generated/autoconf.h" 1
  6. # 5 "././include/linux/kconfig.h" 2
  7. # 1 "<command-line>" 2
  8. # 1 "<stdin>"
  9. # 12 "<stdin>"
  10. /dts-v1/;
  11. # 1 "./arch/arm/dts/am33xx.dtsi" 1
  12. # 11 "./arch/arm/dts/am33xx.dtsi"
  13. # 1 "./arch/arm/dts/include/dt-bindings/gpio/gpio.h" 1
  14. # 12 "./arch/arm/dts/am33xx.dtsi" 2
  15. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 1
  16. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/omap.h" 1
  17. # 9 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 2
  18. # 13 "./arch/arm/dts/am33xx.dtsi" 2
  19. # 1 "./arch/arm/dts/skeleton.dtsi" 1
  20. / {
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. chosen { };
  24. aliases { };
  25. memory { device_type = "memory"; reg = <0 0>; };
  26. };
  27. # 15 "./arch/arm/dts/am33xx.dtsi" 2
  28. / {
  29. compatible = "ti,am33xx";
  30. interrupt-parent = <&intc>;
  31. aliases {
  32. i2c0 = &i2c0;
  33. i2c1 = &i2c1;
  34. i2c2 = &i2c2;
  35. serial0 = &uart0;
  36. serial1 = &uart1;
  37. serial2 = &uart2;
  38. serial3 = &uart3;
  39. serial4 = &uart4;
  40. serial5 = &uart5;
  41. d_can0 = &dcan0;
  42. d_can1 = &dcan1;
  43. usb0 = &usb0;
  44. usb1 = &usb1;
  45. phy0 = &usb0_phy;
  46. phy1 = &usb1_phy;
  47. ethernet0 = &cpsw_emac0;
  48. ethernet1 = &cpsw_emac1;
  49. };
  50. cpus {
  51. #address-cells = <1>;
  52. #size-cells = <0>;
  53. cpu@0 {
  54. compatible = "arm,cortex-a8";
  55. device_type = "cpu";
  56. reg = <0>;
  57. operating-points = <
  58. 720000 1285000
  59. 600000 1225000
  60. 500000 1125000
  61. 275000 1125000
  62. >;
  63. voltage-tolerance = <2>;
  64. clocks = <&dpll_mpu_ck>;
  65. clock-names = "cpu";
  66. clock-latency = <300000>;
  67. };
  68. };
  69. pmu {
  70. compatible = "arm,cortex-a8-pmu";
  71. interrupts = <3>;
  72. };
  73. soc {
  74. compatible = "ti,omap-infra";
  75. mpu {
  76. compatible = "ti,omap3-mpu";
  77. ti,hwmods = "mpu";
  78. };
  79. };
  80. # 93 "./arch/arm/dts/am33xx.dtsi"
  81. ocp {
  82. compatible = "simple-bus";
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. ranges;
  86. ti,hwmods = "l3_main";
  87. l4_wkup: l4_wkup@44c00000 {
  88. compatible = "ti,am3-l4-wkup", "simple-bus";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. ranges = <0 0x44c00000 0x280000>;
  92. prcm: prcm@200000 {
  93. compatible = "ti,am3-prcm";
  94. reg = <0x200000 0x4000>;
  95. prcm_clocks: clocks {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. };
  99. prcm_clockdomains: clockdomains {
  100. };
  101. };
  102. scm: scm@210000 {
  103. compatible = "ti,am3-scm", "simple-bus";
  104. reg = <0x210000 0x2000>;
  105. #address-cells = <1>;
  106. #size-cells = <1>;
  107. ranges = <0 0x210000 0x2000>;
  108. am33xx_pinmux: pinmux@800 {
  109. compatible = "pinctrl-single";
  110. reg = <0x800 0x238>;
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. pinctrl-single,register-width = <32>;
  114. pinctrl-single,function-mask = <0x7f>;
  115. };
  116. scm_conf: scm_conf@0 {
  117. compatible = "syscon";
  118. reg = <0x0 0x800>;
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. scm_clocks: clocks {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. };
  125. };
  126. scm_clockdomains: clockdomains {
  127. };
  128. };
  129. };
  130. intc: interrupt-controller@48200000 {
  131. compatible = "ti,am33xx-intc";
  132. interrupt-controller;
  133. #interrupt-cells = <1>;
  134. reg = <0x48200000 0x1000>;
  135. };
  136. edma: edma@49000000 {
  137. compatible = "ti,edma3";
  138. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  139. reg = <0x49000000 0x10000>,
  140. <0x44e10f90 0x40>;
  141. interrupts = <12 13 14>;
  142. #dma-cells = <1>;
  143. };
  144. gpio0: gpio@44e07000 {
  145. compatible = "ti,omap4-gpio";
  146. ti,hwmods = "gpio1";
  147. gpio-controller;
  148. #gpio-cells = <2>;
  149. interrupt-controller;
  150. #interrupt-cells = <2>;
  151. reg = <0x44e07000 0x1000>;
  152. interrupts = <96>;
  153. };
  154. gpio1: gpio@4804c000 {
  155. compatible = "ti,omap4-gpio";
  156. ti,hwmods = "gpio2";
  157. gpio-controller;
  158. #gpio-cells = <2>;
  159. interrupt-controller;
  160. #interrupt-cells = <2>;
  161. reg = <0x4804c000 0x1000>;
  162. interrupts = <98>;
  163. };
  164. gpio2: gpio@481ac000 {
  165. compatible = "ti,omap4-gpio";
  166. ti,hwmods = "gpio3";
  167. gpio-controller;
  168. #gpio-cells = <2>;
  169. interrupt-controller;
  170. #interrupt-cells = <2>;
  171. reg = <0x481ac000 0x1000>;
  172. interrupts = <32>;
  173. };
  174. gpio3: gpio@481ae000 {
  175. compatible = "ti,omap4-gpio";
  176. ti,hwmods = "gpio4";
  177. gpio-controller;
  178. #gpio-cells = <2>;
  179. interrupt-controller;
  180. #interrupt-cells = <2>;
  181. reg = <0x481ae000 0x1000>;
  182. interrupts = <62>;
  183. };
  184. uart0: serial@44e09000 {
  185. compatible = "ti,omap3-uart";
  186. ti,hwmods = "uart1";
  187. clock-frequency = <48000000>;
  188. reg = <0x44e09000 0x2000>;
  189. reg-shift = <2>;
  190. interrupts = <72>;
  191. status = "disabled";
  192. dmas = <&edma 26>, <&edma 27>;
  193. dma-names = "tx", "rx";
  194. };
  195. uart1: serial@48022000 {
  196. compatible = "ti,omap3-uart";
  197. ti,hwmods = "uart2";
  198. clock-frequency = <48000000>;
  199. reg = <0x48022000 0x2000>;
  200. reg-shift = <2>;
  201. interrupts = <73>;
  202. status = "disabled";
  203. dmas = <&edma 28>, <&edma 29>;
  204. dma-names = "tx", "rx";
  205. };
  206. uart2: serial@48024000 {
  207. compatible = "ti,omap3-uart";
  208. ti,hwmods = "uart3";
  209. clock-frequency = <48000000>;
  210. reg = <0x48024000 0x2000>;
  211. reg-shift = <2>;
  212. interrupts = <74>;
  213. status = "disabled";
  214. dmas = <&edma 30>, <&edma 31>;
  215. dma-names = "tx", "rx";
  216. };
  217. uart3: serial@481a6000 {
  218. compatible = "ti,omap3-uart";
  219. ti,hwmods = "uart4";
  220. clock-frequency = <48000000>;
  221. reg = <0x481a6000 0x2000>;
  222. reg-shift = <2>;
  223. interrupts = <44>;
  224. status = "disabled";
  225. };
  226. uart4: serial@481a8000 {
  227. compatible = "ti,omap3-uart";
  228. ti,hwmods = "uart5";
  229. clock-frequency = <48000000>;
  230. reg = <0x481a8000 0x2000>;
  231. reg-shift = <2>;
  232. interrupts = <45>;
  233. status = "disabled";
  234. };
  235. uart5: serial@481aa000 {
  236. compatible = "ti,omap3-uart";
  237. ti,hwmods = "uart6";
  238. clock-frequency = <48000000>;
  239. reg = <0x481aa000 0x2000>;
  240. reg-shift = <2>;
  241. interrupts = <46>;
  242. status = "disabled";
  243. };
  244. i2c0: i2c@44e0b000 {
  245. compatible = "ti,omap4-i2c";
  246. #address-cells = <1>;
  247. #size-cells = <0>;
  248. ti,hwmods = "i2c1";
  249. reg = <0x44e0b000 0x1000>;
  250. interrupts = <70>;
  251. status = "disabled";
  252. };
  253. i2c1: i2c@4802a000 {
  254. compatible = "ti,omap4-i2c";
  255. #address-cells = <1>;
  256. #size-cells = <0>;
  257. ti,hwmods = "i2c2";
  258. reg = <0x4802a000 0x1000>;
  259. interrupts = <71>;
  260. status = "disabled";
  261. };
  262. i2c2: i2c@4819c000 {
  263. compatible = "ti,omap4-i2c";
  264. #address-cells = <1>;
  265. #size-cells = <0>;
  266. ti,hwmods = "i2c3";
  267. reg = <0x4819c000 0x1000>;
  268. interrupts = <30>;
  269. status = "disabled";
  270. };
  271. mmc1: mmc@48060000 {
  272. compatible = "ti,omap4-hsmmc";
  273. ti,hwmods = "mmc1";
  274. ti,dual-volt;
  275. ti,needs-special-reset;
  276. ti,needs-special-hs-handling;
  277. dmas = <&edma 24
  278. &edma 25>;
  279. dma-names = "tx", "rx";
  280. interrupts = <64>;
  281. interrupt-parent = <&intc>;
  282. reg = <0x48060000 0x1000>;
  283. status = "disabled";
  284. };
  285. mmc2: mmc@481d8000 {
  286. compatible = "ti,omap4-hsmmc";
  287. ti,hwmods = "mmc2";
  288. ti,needs-special-reset;
  289. dmas = <&edma 2
  290. &edma 3>;
  291. dma-names = "tx", "rx";
  292. interrupts = <28>;
  293. interrupt-parent = <&intc>;
  294. reg = <0x481d8000 0x1000>;
  295. status = "disabled";
  296. };
  297. mmc3: mmc@47810000 {
  298. compatible = "ti,omap4-hsmmc";
  299. ti,hwmods = "mmc3";
  300. ti,needs-special-reset;
  301. interrupts = <29>;
  302. interrupt-parent = <&intc>;
  303. reg = <0x47810000 0x1000>;
  304. status = "disabled";
  305. };
  306. hwspinlock: spinlock@480ca000 {
  307. compatible = "ti,omap4-hwspinlock";
  308. reg = <0x480ca000 0x1000>;
  309. ti,hwmods = "spinlock";
  310. #hwlock-cells = <1>;
  311. };
  312. wdt2: wdt@44e35000 {
  313. compatible = "ti,omap3-wdt";
  314. ti,hwmods = "wd_timer2";
  315. reg = <0x44e35000 0x1000>;
  316. interrupts = <91>;
  317. };
  318. dcan0: can@481cc000 {
  319. compatible = "ti,am3352-d_can";
  320. ti,hwmods = "d_can0";
  321. reg = <0x481cc000 0x2000>;
  322. clocks = <&dcan0_fck>;
  323. clock-names = "fck";
  324. syscon-raminit = <&scm_conf 0x644 0>;
  325. interrupts = <52>;
  326. status = "disabled";
  327. };
  328. dcan1: can@481d0000 {
  329. compatible = "ti,am3352-d_can";
  330. ti,hwmods = "d_can1";
  331. reg = <0x481d0000 0x2000>;
  332. clocks = <&dcan1_fck>;
  333. clock-names = "fck";
  334. syscon-raminit = <&scm_conf 0x644 1>;
  335. interrupts = <55>;
  336. status = "disabled";
  337. };
  338. mailbox: mailbox@480C8000 {
  339. compatible = "ti,omap4-mailbox";
  340. reg = <0x480C8000 0x200>;
  341. interrupts = <77>;
  342. ti,hwmods = "mailbox";
  343. #mbox-cells = <1>;
  344. ti,mbox-num-users = <4>;
  345. ti,mbox-num-fifos = <8>;
  346. mbox_wkupm3: wkup_m3 {
  347. ti,mbox-tx = <0 0 0>;
  348. ti,mbox-rx = <0 0 3>;
  349. };
  350. };
  351. timer1: timer@44e31000 {
  352. compatible = "ti,am335x-timer-1ms";
  353. reg = <0x44e31000 0x400>;
  354. interrupts = <67>;
  355. ti,hwmods = "timer1";
  356. ti,timer-alwon;
  357. };
  358. timer2: timer@48040000 {
  359. compatible = "ti,am335x-timer";
  360. reg = <0x48040000 0x400>;
  361. interrupts = <68>;
  362. ti,hwmods = "timer2";
  363. };
  364. timer3: timer@48042000 {
  365. compatible = "ti,am335x-timer";
  366. reg = <0x48042000 0x400>;
  367. interrupts = <69>;
  368. ti,hwmods = "timer3";
  369. };
  370. timer4: timer@48044000 {
  371. compatible = "ti,am335x-timer";
  372. reg = <0x48044000 0x400>;
  373. interrupts = <92>;
  374. ti,hwmods = "timer4";
  375. ti,timer-pwm;
  376. };
  377. timer5: timer@48046000 {
  378. compatible = "ti,am335x-timer";
  379. reg = <0x48046000 0x400>;
  380. interrupts = <93>;
  381. ti,hwmods = "timer5";
  382. ti,timer-pwm;
  383. };
  384. timer6: timer@48048000 {
  385. compatible = "ti,am335x-timer";
  386. reg = <0x48048000 0x400>;
  387. interrupts = <94>;
  388. ti,hwmods = "timer6";
  389. ti,timer-pwm;
  390. };
  391. timer7: timer@4804a000 {
  392. compatible = "ti,am335x-timer";
  393. reg = <0x4804a000 0x400>;
  394. interrupts = <95>;
  395. ti,hwmods = "timer7";
  396. ti,timer-pwm;
  397. };
  398. rtc: rtc@44e3e000 {
  399. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  400. reg = <0x44e3e000 0x1000>;
  401. interrupts = <75
  402. 76>;
  403. ti,hwmods = "rtc";
  404. };
  405. spi0: spi@48030000 {
  406. compatible = "ti,omap4-mcspi";
  407. #address-cells = <1>;
  408. #size-cells = <0>;
  409. reg = <0x48030000 0x400>;
  410. interrupts = <65>;
  411. ti,spi-num-cs = <2>;
  412. ti,hwmods = "spi0";
  413. dmas = <&edma 16
  414. &edma 17
  415. &edma 18
  416. &edma 19>;
  417. dma-names = "tx0", "rx0", "tx1", "rx1";
  418. status = "disabled";
  419. };
  420. spi1: spi@481a0000 {
  421. compatible = "ti,omap4-mcspi";
  422. #address-cells = <1>;
  423. #size-cells = <0>;
  424. reg = <0x481a0000 0x400>;
  425. interrupts = <125>;
  426. ti,spi-num-cs = <2>;
  427. ti,hwmods = "spi1";
  428. dmas = <&edma 42
  429. &edma 43
  430. &edma 44
  431. &edma 45>;
  432. dma-names = "tx0", "rx0", "tx1", "rx1";
  433. status = "disabled";
  434. };
  435. usb: usb@47400000 {
  436. compatible = "ti,am33xx-usb";
  437. reg = <0x47400000 0x1000>;
  438. ranges;
  439. #address-cells = <1>;
  440. #size-cells = <1>;
  441. ti,hwmods = "usb_otg_hs";
  442. status = "disabled";
  443. usb_ctrl_mod: control@44e10620 {
  444. compatible = "ti,am335x-usb-ctrl-module";
  445. reg = <0x44e10620 0x10
  446. 0x44e10648 0x4>;
  447. reg-names = "phy_ctrl", "wakeup";
  448. status = "disabled";
  449. };
  450. usb0_phy: usb-phy@47401300 {
  451. compatible = "ti,am335x-usb-phy";
  452. reg = <0x47401300 0x100>;
  453. reg-names = "phy";
  454. status = "disabled";
  455. ti,ctrl_mod = <&usb_ctrl_mod>;
  456. };
  457. usb0: usb@47401000 {
  458. compatible = "ti,musb-am33xx";
  459. status = "disabled";
  460. reg = <0x47401400 0x400
  461. 0x47401000 0x200>;
  462. reg-names = "mc", "control";
  463. interrupts = <18>;
  464. interrupt-names = "mc";
  465. dr_mode = "otg";
  466. mentor,multipoint = <1>;
  467. mentor,num-eps = <16>;
  468. mentor,ram-bits = <12>;
  469. mentor,power = <500>;
  470. phys = <&usb0_phy>;
  471. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  472. &cppi41dma 2 0 &cppi41dma 3 0
  473. &cppi41dma 4 0 &cppi41dma 5 0
  474. &cppi41dma 6 0 &cppi41dma 7 0
  475. &cppi41dma 8 0 &cppi41dma 9 0
  476. &cppi41dma 10 0 &cppi41dma 11 0
  477. &cppi41dma 12 0 &cppi41dma 13 0
  478. &cppi41dma 14 0 &cppi41dma 0 1
  479. &cppi41dma 1 1 &cppi41dma 2 1
  480. &cppi41dma 3 1 &cppi41dma 4 1
  481. &cppi41dma 5 1 &cppi41dma 6 1
  482. &cppi41dma 7 1 &cppi41dma 8 1
  483. &cppi41dma 9 1 &cppi41dma 10 1
  484. &cppi41dma 11 1 &cppi41dma 12 1
  485. &cppi41dma 13 1 &cppi41dma 14 1>;
  486. dma-names =
  487. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  488. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  489. "rx14", "rx15",
  490. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  491. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  492. "tx14", "tx15";
  493. };
  494. usb1_phy: usb-phy@47401b00 {
  495. compatible = "ti,am335x-usb-phy";
  496. reg = <0x47401b00 0x100>;
  497. reg-names = "phy";
  498. status = "disabled";
  499. ti,ctrl_mod = <&usb_ctrl_mod>;
  500. };
  501. usb1: usb@47401800 {
  502. compatible = "ti,musb-am33xx";
  503. status = "disabled";
  504. reg = <0x47401c00 0x400
  505. 0x47401800 0x200>;
  506. reg-names = "mc", "control";
  507. interrupts = <19>;
  508. interrupt-names = "mc";
  509. dr_mode = "otg";
  510. mentor,multipoint = <1>;
  511. mentor,num-eps = <16>;
  512. mentor,ram-bits = <12>;
  513. mentor,power = <500>;
  514. phys = <&usb1_phy>;
  515. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  516. &cppi41dma 17 0 &cppi41dma 18 0
  517. &cppi41dma 19 0 &cppi41dma 20 0
  518. &cppi41dma 21 0 &cppi41dma 22 0
  519. &cppi41dma 23 0 &cppi41dma 24 0
  520. &cppi41dma 25 0 &cppi41dma 26 0
  521. &cppi41dma 27 0 &cppi41dma 28 0
  522. &cppi41dma 29 0 &cppi41dma 15 1
  523. &cppi41dma 16 1 &cppi41dma 17 1
  524. &cppi41dma 18 1 &cppi41dma 19 1
  525. &cppi41dma 20 1 &cppi41dma 21 1
  526. &cppi41dma 22 1 &cppi41dma 23 1
  527. &cppi41dma 24 1 &cppi41dma 25 1
  528. &cppi41dma 26 1 &cppi41dma 27 1
  529. &cppi41dma 28 1 &cppi41dma 29 1>;
  530. dma-names =
  531. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  532. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  533. "rx14", "rx15",
  534. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  535. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  536. "tx14", "tx15";
  537. };
  538. cppi41dma: dma-controller@47402000 {
  539. compatible = "ti,am3359-cppi41";
  540. reg = <0x47400000 0x1000
  541. 0x47402000 0x1000
  542. 0x47403000 0x1000
  543. 0x47404000 0x4000>;
  544. reg-names = "glue", "controller", "scheduler", "queuemgr";
  545. interrupts = <17>;
  546. interrupt-names = "glue";
  547. #dma-cells = <2>;
  548. #dma-channels = <30>;
  549. #dma-requests = <256>;
  550. status = "disabled";
  551. };
  552. };
  553. epwmss0: epwmss@48300000 {
  554. compatible = "ti,am33xx-pwmss";
  555. reg = <0x48300000 0x10>;
  556. ti,hwmods = "epwmss0";
  557. #address-cells = <1>;
  558. #size-cells = <1>;
  559. status = "disabled";
  560. ranges = <0x48300100 0x48300100 0x80
  561. 0x48300180 0x48300180 0x80
  562. 0x48300200 0x48300200 0x80>;
  563. ecap0: ecap@48300100 {
  564. compatible = "ti,am33xx-ecap";
  565. #pwm-cells = <3>;
  566. reg = <0x48300100 0x80>;
  567. interrupts = <31>;
  568. interrupt-names = "ecap0";
  569. ti,hwmods = "ecap0";
  570. status = "disabled";
  571. };
  572. ehrpwm0: ehrpwm@48300200 {
  573. compatible = "ti,am33xx-ehrpwm";
  574. #pwm-cells = <3>;
  575. reg = <0x48300200 0x80>;
  576. ti,hwmods = "ehrpwm0";
  577. status = "disabled";
  578. };
  579. };
  580. epwmss1: epwmss@48302000 {
  581. compatible = "ti,am33xx-pwmss";
  582. reg = <0x48302000 0x10>;
  583. ti,hwmods = "epwmss1";
  584. #address-cells = <1>;
  585. #size-cells = <1>;
  586. status = "disabled";
  587. ranges = <0x48302100 0x48302100 0x80
  588. 0x48302180 0x48302180 0x80
  589. 0x48302200 0x48302200 0x80>;
  590. ecap1: ecap@48302100 {
  591. compatible = "ti,am33xx-ecap";
  592. #pwm-cells = <3>;
  593. reg = <0x48302100 0x80>;
  594. interrupts = <47>;
  595. interrupt-names = "ecap1";
  596. ti,hwmods = "ecap1";
  597. status = "disabled";
  598. };
  599. ehrpwm1: ehrpwm@48302200 {
  600. compatible = "ti,am33xx-ehrpwm";
  601. #pwm-cells = <3>;
  602. reg = <0x48302200 0x80>;
  603. ti,hwmods = "ehrpwm1";
  604. status = "disabled";
  605. };
  606. };
  607. epwmss2: epwmss@48304000 {
  608. compatible = "ti,am33xx-pwmss";
  609. reg = <0x48304000 0x10>;
  610. ti,hwmods = "epwmss2";
  611. #address-cells = <1>;
  612. #size-cells = <1>;
  613. status = "disabled";
  614. ranges = <0x48304100 0x48304100 0x80
  615. 0x48304180 0x48304180 0x80
  616. 0x48304200 0x48304200 0x80>;
  617. ecap2: ecap@48304100 {
  618. compatible = "ti,am33xx-ecap";
  619. #pwm-cells = <3>;
  620. reg = <0x48304100 0x80>;
  621. interrupts = <61>;
  622. interrupt-names = "ecap2";
  623. ti,hwmods = "ecap2";
  624. status = "disabled";
  625. };
  626. ehrpwm2: ehrpwm@48304200 {
  627. compatible = "ti,am33xx-ehrpwm";
  628. #pwm-cells = <3>;
  629. reg = <0x48304200 0x80>;
  630. ti,hwmods = "ehrpwm2";
  631. status = "disabled";
  632. };
  633. };
  634. mac: ethernet@4a100000 {
  635. compatible = "ti,cpsw";
  636. ti,hwmods = "cpgmac0";
  637. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  638. clock-names = "fck", "cpts";
  639. cpdma_channels = <8>;
  640. ale_entries = <1024>;
  641. bd_ram_size = <0x2000>;
  642. no_bd_ram = <0>;
  643. rx_descs = <64>;
  644. mac_control = <0x20>;
  645. slaves = <2>;
  646. active_slave = <0>;
  647. cpts_clock_mult = <0x80000000>;
  648. cpts_clock_shift = <29>;
  649. reg = <0x4a100000 0x800
  650. 0x4a101200 0x100>;
  651. #address-cells = <1>;
  652. #size-cells = <1>;
  653. interrupt-parent = <&intc>;
  654. interrupts = <40 41 42 43>;
  655. ranges;
  656. syscon = <&scm_conf>;
  657. status = "disabled";
  658. davinci_mdio: mdio@4a101000 {
  659. compatible = "ti,davinci_mdio";
  660. #address-cells = <1>;
  661. #size-cells = <0>;
  662. ti,hwmods = "davinci_mdio";
  663. bus_freq = <1000000>;
  664. reg = <0x4a101000 0x100>;
  665. status = "disabled";
  666. };
  667. cpsw_emac0: slave@4a100200 {
  668. mac-address = [ 00 00 00 00 00 00 ];
  669. };
  670. cpsw_emac1: slave@4a100300 {
  671. mac-address = [ 00 00 00 00 00 00 ];
  672. };
  673. phy_sel: cpsw-phy-sel@44e10650 {
  674. compatible = "ti,am3352-cpsw-phy-sel";
  675. reg= <0x44e10650 0x4>;
  676. reg-names = "gmii-sel";
  677. };
  678. };
  679. ocmcram: ocmcram@40300000 {
  680. compatible = "mmio-sram";
  681. reg = <0x40300000 0x10000>;
  682. };
  683. wkup_m3: wkup_m3@44d00000 {
  684. compatible = "ti,am3353-wkup-m3";
  685. reg = <0x44d00000 0x4000
  686. 0x44d80000 0x2000>;
  687. ti,hwmods = "wkup_m3";
  688. ti,no-reset-on-init;
  689. };
  690. elm: elm@48080000 {
  691. compatible = "ti,am3352-elm";
  692. reg = <0x48080000 0x2000>;
  693. interrupts = <4>;
  694. ti,hwmods = "elm";
  695. status = "disabled";
  696. };
  697. lcdc: lcdc@4830e000 {
  698. compatible = "ti,am33xx-tilcdc";
  699. reg = <0x4830e000 0x1000>;
  700. interrupt-parent = <&intc>;
  701. interrupts = <36>;
  702. ti,hwmods = "lcdc";
  703. status = "disabled";
  704. };
  705. tscadc: tscadc@44e0d000 {
  706. compatible = "ti,am3359-tscadc";
  707. reg = <0x44e0d000 0x1000>;
  708. interrupt-parent = <&intc>;
  709. interrupts = <16>;
  710. ti,hwmods = "adc_tsc";
  711. status = "disabled";
  712. tsc {
  713. compatible = "ti,am3359-tsc";
  714. };
  715. am335x_adc: adc {
  716. #io-channel-cells = <1>;
  717. compatible = "ti,am3359-adc";
  718. };
  719. };
  720. gpmc: gpmc@50000000 {
  721. compatible = "ti,am3352-gpmc";
  722. ti,hwmods = "gpmc";
  723. ti,no-idle-on-init;
  724. reg = <0x50000000 0x2000>;
  725. interrupts = <100>;
  726. gpmc,num-cs = <7>;
  727. gpmc,num-waitpins = <2>;
  728. #address-cells = <2>;
  729. #size-cells = <1>;
  730. status = "disabled";
  731. };
  732. sham: sham@53100000 {
  733. compatible = "ti,omap4-sham";
  734. ti,hwmods = "sham";
  735. reg = <0x53100000 0x200>;
  736. interrupts = <109>;
  737. dmas = <&edma 36>;
  738. dma-names = "rx";
  739. };
  740. aes: aes@53500000 {
  741. compatible = "ti,omap4-aes";
  742. ti,hwmods = "aes";
  743. reg = <0x53500000 0xa0>;
  744. interrupts = <103>;
  745. dmas = <&edma 6>,
  746. <&edma 5>;
  747. dma-names = "tx", "rx";
  748. };
  749. mcasp0: mcasp@48038000 {
  750. compatible = "ti,am33xx-mcasp-audio";
  751. ti,hwmods = "mcasp0";
  752. reg = <0x48038000 0x2000>,
  753. <0x46000000 0x400000>;
  754. reg-names = "mpu", "dat";
  755. interrupts = <80>, <81>;
  756. interrupt-names = "tx", "rx";
  757. status = "disabled";
  758. dmas = <&edma 8>,
  759. <&edma 9>;
  760. dma-names = "tx", "rx";
  761. };
  762. mcasp1: mcasp@4803C000 {
  763. compatible = "ti,am33xx-mcasp-audio";
  764. ti,hwmods = "mcasp1";
  765. reg = <0x4803C000 0x2000>,
  766. <0x46400000 0x400000>;
  767. reg-names = "mpu", "dat";
  768. interrupts = <82>, <83>;
  769. interrupt-names = "tx", "rx";
  770. status = "disabled";
  771. dmas = <&edma 10>,
  772. <&edma 11>;
  773. dma-names = "tx", "rx";
  774. };
  775. rng: rng@48310000 {
  776. compatible = "ti,omap4-rng";
  777. ti,hwmods = "rng";
  778. reg = <0x48310000 0x2000>;
  779. interrupts = <111>;
  780. };
  781. };
  782. };
  783. /include/ "am33xx-clocks.dtsi"
  784. # 15 "<stdin>" 2
  785. # 1 "./arch/arm/dts/include/dt-bindings/input/input.h" 1
  786. # 12 "./arch/arm/dts/include/dt-bindings/input/input.h"
  787. # 1 "./arch/arm/dts/include/dt-bindings/input/linux-event-codes.h" 1
  788. # 13 "./arch/arm/dts/include/dt-bindings/input/input.h" 2
  789. # 16 "<stdin>" 2
  790. / {
  791. model = "RUT";
  792. compatible = "ti,am335x-evm", "ti,am33xx";
  793. buzzer {
  794. compatible = "pwm-beeper";
  795. pwms = <&ecap0 0 16000 0>;
  796. };
  797. chosen {
  798. stdout-path = &uart0;
  799. tick-timer = &timer2;
  800. };
  801. cpus {
  802. cpu@0 {
  803. cpu0-supply = <&dcdc2_reg>;
  804. };
  805. };
  806. gpio_keys: powerfail-keys {
  807. compatible = "gpio-keys";
  808. #address-cells = <1>;
  809. #size-cells = <0>;
  810. autorepeat;
  811. pwr-fail0 {
  812. label = "power-fail";
  813. linux,code = <116>;
  814. gpios = <&gpio3 4 0>;
  815. gpio-key,wakeup;
  816. };
  817. pwr-fail1 {
  818. label = "power-fail-redundant";
  819. linux,code = <116>;
  820. gpios = <&gpio1 27 0>;
  821. gpio-key,wakeup;
  822. };
  823. };
  824. leds {
  825. compatible = "gpio-leds";
  826. led_green {
  827. label = "rut:green:debug:run_mode";
  828. gpios = <&gpio3 20 1>;
  829. };
  830. led_yellow {
  831. label = "rut:debug:yellow:osc_ch1";
  832. gpios = <&gpio0 17 1>;
  833. };
  834. led_red {
  835. label = "rut:debug:red:osc_ch2";
  836. gpios = <&gpio0 16 1>;
  837. };
  838. led_alive {
  839. label = "rut:alive";
  840. gpios = <&gpio0 15 1>;
  841. linux,default-trigger = "heartbeat";
  842. };
  843. };
  844. memory {
  845. device_type = "memory";
  846. reg = <0x80000000 0x10000000>;
  847. };
  848. panel {
  849. compatible = "ti,tilcdc,panel";
  850. pinctrl-names = "default";
  851. pinctrl-0 = <&lcd_pins_s0>;
  852. status = "okay";
  853. panel-info {
  854. ac-bias = <255>;
  855. ac-bias-intrpt = <0>;
  856. dma-burst-sz = <16>;
  857. bpp = <16>;
  858. fdd = <0x80>;
  859. sync-edge = <0>;
  860. sync-ctrl = <1>;
  861. raster-order = <0>;
  862. fifo-th = <0>;
  863. tft-alt-mode = <0>;
  864. invert-pxl-clk = <1>;
  865. };
  866. display-timings {
  867. native-mode = <&timing1>;
  868. timing1: 480x800p60 {
  869. clock-frequency = <29925000>;
  870. hactive = <480>;
  871. vactive = <800>;
  872. hfront-porch = <50>;
  873. hback-porch = <50>;
  874. hsync-len = <50>;
  875. vback-porch = <50>;
  876. vfront-porch = <50>;
  877. vsync-len = <50>;
  878. hsync-active = <1>;
  879. vsync-active = <1>;
  880. };
  881. };
  882. };
  883. vmmc: fixedregulator3 {
  884. compatible = "regulator-fixed";
  885. regulator-name = "vmmc";
  886. regulator-min-microvolt = <3300000>;
  887. regulator-max-microvolt = <3300000>;
  888. };
  889. watchdog {
  890. compatible = "linux,wdt-gpio";
  891. gpios = <&gpio0 14 0>;
  892. hw_algo = "level";
  893. hw_margin_ms = <30000>;
  894. };
  895. };
  896. &aes {
  897. status = "okay";
  898. };
  899. &cppi41dma {
  900. status = "okay";
  901. };
  902. &cpsw_emac0 {
  903. phy_id = <&davinci_mdio>, <1>;
  904. phy-mode = "rmii";
  905. };
  906. &cpsw_emac1 {
  907. phy_id = <&davinci_mdio>, <0>;
  908. phy-mode = "rmii";
  909. };
  910. &davinci_mdio {
  911. pinctrl-names = "default", "sleep";
  912. pinctrl-0 = <&davinci_mdio_default>;
  913. pinctrl-1 = <&davinci_mdio_sleep>;
  914. status = "okay";
  915. gpios = <&gpio2 18 0>;
  916. ethernet_phy: ethernet-phy@1 {
  917. compatible = "ethernet-phy-id2000.5ce1";
  918. reg = <1>;
  919. natsemi,master_mode_fixup;
  920. };
  921. };
  922. &elm {
  923. status = "okay";
  924. };
  925. &epwmss0 {
  926. status = "okay";
  927. ecap0: ecap@48300100 {
  928. status = "okay";
  929. pinctrl-names = "default";
  930. pinctrl-0 = <&ecap0_pins>;
  931. };
  932. };
  933. &epwmss1 {
  934. status = "okay";
  935. ehrpwm1: ehrpwm@48302200 {
  936. status = "okay";
  937. pinctrl-names = "default";
  938. pinctrl-0 = <&epwmss1_pins>;
  939. };
  940. };
  941. &gpmc {
  942. pinctrl-names = "default";
  943. pinctrl-0 = <&nandflash_pins>;
  944. status = "okay";
  945. ranges = <0 0 0x08000000 0x10000000>;
  946. nand@0,0 {
  947. reg = <0 0 0>;
  948. nand-bus-width = <8>;
  949. ti,nand-ecc-opt = "bch8";
  950. gpmc,device-nand = "true";
  951. gpmc,device-width = <1>;
  952. gpmc,sync-clk-ps = <0>;
  953. gpmc,cs-on-ns = <0>;
  954. gpmc,cs-rd-off-ns = <57>;
  955. gpmc,cs-wr-off-ns = <57>;
  956. gpmc,adv-on-ns = <0>;
  957. gpmc,adv-rd-off-ns = <57>;
  958. gpmc,adv-wr-off-ns = <57>;
  959. gpmc,we-on-ns = <0>;
  960. gpmc,we-off-ns = <48>;
  961. gpmc,oe-on-ns = <0>;
  962. gpmc,oe-off-ns = <57>;
  963. gpmc,access-ns = <38>;
  964. gpmc,rd-cycle-ns = <67>;
  965. gpmc,wr-cycle-ns = <67>;
  966. gpmc,wait-on-read = "true";
  967. gpmc,wait-on-write = "true";
  968. gpmc,bus-turnaround-ns = <0>;
  969. gpmc,cycle2cycle-delay-ns = <0>;
  970. gpmc,clk-activation-ns = <0>;
  971. gpmc,wait-monitoring-ns = <0>;
  972. gpmc,wr-access-ns = <96>;
  973. gpmc,wr-data-mux-bus-ns = <0>;
  974. #address-cells = <1>;
  975. #size-cells = <1>;
  976. elm_id = <&elm>;
  977. };
  978. };
  979. &i2c0 {
  980. pinctrl-names = "default";
  981. pinctrl-0 = <&i2c0_pins>;
  982. clock-frequency = <400000>;
  983. status = "okay";
  984. eeprom: eeprom@50 {
  985. compatible = "atmel,24c128";
  986. reg = <0x50>;
  987. pagesize = <32>;
  988. };
  989. tps: tps@24 {
  990. reg = <0x24>;
  991. };
  992. };
  993. &i2c1 {
  994. pinctrl-names = "default";
  995. pinctrl-0 = <&i2c1_pins>;
  996. clock-frequency = <100000>;
  997. status = "okay";
  998. atmel: atmel_mxt_ts@4a {
  999. compatible = "atmel,maxtouch";
  1000. reg = <0x4a>;
  1001. interrupt-parent = <&gpio1>;
  1002. interrupts = <28 8>;
  1003. gpios = <&gpio3 18 0>;
  1004. };
  1005. temp@48 {
  1006. compatible = "st,ds75";
  1007. reg = <0x4c>;
  1008. };
  1009. };
  1010. &lcdc {
  1011. status = "okay";
  1012. };
  1013. &mac {
  1014. pinctrl-names = "default", "sleep";
  1015. pinctrl-0 = <&cpsw_default>;
  1016. pinctrl-1 = <&cpsw_sleep>;
  1017. status = "okay";
  1018. };
  1019. &mmc1 {
  1020. vmmc-supply = <&vmmc>;
  1021. pinctrl-names = "default";
  1022. pinctrl-0 = <&mmc1_pins>;
  1023. status = "okay";
  1024. };
  1025. &phy_sel {
  1026. rmii-clock-ext;
  1027. };
  1028. &sham {
  1029. status = "okay";
  1030. };
  1031. &spi0 {
  1032. pinctrl-names = "default";
  1033. pinctrl-0 = <&spi0_pins>;
  1034. status = "okay";
  1035. spi-flash@0 {
  1036. #address-cells = <1>;
  1037. #size-cells = <1>;
  1038. compatible = "mx25l25635e";
  1039. reg = <0>;
  1040. spi-max-frequency = <24000000>;
  1041. partition@0 {
  1042. label = "dummy";
  1043. reg = <0x0000000 0x8000>;
  1044. };
  1045. };
  1046. };
  1047. &spi1 {
  1048. pinctrl-names = "default";
  1049. pinctrl-0 = <&spi1_pins>;
  1050. status = "okay";
  1051. lcd_init: lcd@0 {
  1052. compatible = "formike,kwh043st20";
  1053. reg = <0>;
  1054. reset-gpios = <&gpio3 19 0>;
  1055. spi-max-frequency = <1200000>;
  1056. spi-cpol;
  1057. spi-cpha;
  1058. power-on-delay = <10>;
  1059. reset-delay = <10>;
  1060. };
  1061. };
  1062. /include/ "tps65217.dtsi"
  1063. &tps {
  1064. backlight0: backlight {
  1065. isel = <1>;
  1066. fdim = <1000>;
  1067. default-brightness = <80>;
  1068. };
  1069. regulators {
  1070. dcdc1_reg: regulator@0 {
  1071. regulator-always-on;
  1072. };
  1073. dcdc2_reg: regulator@1 {
  1074. regulator-name = "vdd_mpu";
  1075. regulator-min-microvolt = <925000>;
  1076. regulator-max-microvolt = <1325000>;
  1077. regulator-boot-on;
  1078. regulator-always-on;
  1079. };
  1080. dcdc3_reg: regulator@2 {
  1081. regulator-name = "vdd_core";
  1082. regulator-min-microvolt = <925000>;
  1083. regulator-max-microvolt = <1150000>;
  1084. regulator-boot-on;
  1085. regulator-always-on;
  1086. };
  1087. ldo1_reg: regulator@3 {
  1088. regulator-always-on;
  1089. };
  1090. ldo2_reg: regulator@4 {
  1091. regulator-always-on;
  1092. };
  1093. ldo3_reg: regulator@5 {
  1094. regulator-always-on;
  1095. };
  1096. ldo4_reg: regulator@6 {
  1097. regulator-always-on;
  1098. };
  1099. };
  1100. };
  1101. &tscadc {
  1102. status = "okay";
  1103. adc {
  1104. ti,adc-channels = <4 5 6 7>;
  1105. };
  1106. };
  1107. &uart0 {
  1108. pinctrl-names = "default";
  1109. pinctrl-0 = <&uart0_pins>;
  1110. status = "okay";
  1111. };
  1112. &usb {
  1113. status = "okay";
  1114. };
  1115. &usb_ctrl_mod {
  1116. status = "okay";
  1117. };
  1118. &usb0 {
  1119. dr_mode = "device";
  1120. status = "okay";
  1121. };
  1122. &usb0_phy {
  1123. status = "okay";
  1124. };
  1125. &am33xx_pinmux {
  1126. pinctrl-names = "default";
  1127. pinctrl-0 = <&clkout2_pin &gpio_pin>;
  1128. clkout2_pin: pinmux_clkout2_pin {
  1129. pinctrl-single,pins = <
  1130. 0x1b4 (0 | 3)
  1131. >;
  1132. };
  1133. cpsw_default: cpsw_default {
  1134. pinctrl-single,pins = <
  1135. 0x10c (((1 << 5)) | 1)
  1136. 0x110 (((1 << 5)) | 1)
  1137. 0x114 (1)
  1138. 0x124 (1)
  1139. 0x128 (1)
  1140. 0x13c (((1 << 5)) | 1)
  1141. 0x140 (((1 << 5)) | 1)
  1142. 0x144 (((1 << 5)) | 0)
  1143. >;
  1144. };
  1145. cpsw_sleep: cpsw_sleep {
  1146. pinctrl-single,pins = <
  1147. 0x10c (((1 << 5)) | 7)
  1148. 0x110 (((1 << 5)) | 7)
  1149. 0x114 (((1 << 5)) | 7)
  1150. 0x124 (((1 << 5)) | 7)
  1151. 0x128 (((1 << 5)) | 7)
  1152. 0x13c (((1 << 5)) | 7)
  1153. 0x140 (((1 << 5)) | 7)
  1154. 0x144 (((1 << 5)) | 7)
  1155. >;
  1156. };
  1157. davinci_mdio_default: davinci_mdio_default {
  1158. pinctrl-single,pins = <
  1159. 0x148 (((1 << 5) | (1 << 4)) | (1 << 6) | 0)
  1160. 0x14c (((1 << 4)) | 0)
  1161. >;
  1162. };
  1163. davinci_mdio_sleep: davinci_mdio_sleep {
  1164. pinctrl-single,pins = <
  1165. 0x148 (((1 << 5)) | 7)
  1166. 0x14c (((1 << 5)) | 7)
  1167. >;
  1168. };
  1169. ecap0_pins: ecap_pins {
  1170. pinctrl-single,pins = <
  1171. 0x164 (0)
  1172. >;
  1173. };
  1174. epwmss1_pins: epwmss_pins {
  1175. pinctrl-single,pins = <
  1176. 0x48 (((1 << 5) | (1 << 3)) | 7)
  1177. 0x4c (6)
  1178. >;
  1179. };
  1180. gpio_pin: gpio_pin {
  1181. pinctrl-single,pins = <
  1182. 0x6c (((1 << 5) | (1 << 3)) | 7)
  1183. 0x78 (((1 << 4)) | (1 << 5) | 7)
  1184. 0x88 (((1 << 4)) | (1 << 5) | 7)
  1185. 0x118 (((1 << 5) | (1 << 3)) | 7)
  1186. 0x11c (7)
  1187. 0x120 (7)
  1188. 0x134 (7)
  1189. 0x138 (((1 << 5)) | 7)
  1190. 0x180 (7)
  1191. 0x184 (7)
  1192. 0x1a0 (7)
  1193. 0x1a4 (7)
  1194. 0x1a8 (7)
  1195. 0x1ac (((1 << 5)) | 7)
  1196. 0x1b0 (((1 << 3)) | 3)
  1197. >;
  1198. };
  1199. i2c0_pins: pinmux_i2c0_pins {
  1200. pinctrl-single,pins = <
  1201. 0x188 (((1 << 5) | (1 << 4)) | 0)
  1202. 0x18c (((1 << 5) | (1 << 4)) | 0)
  1203. >;
  1204. };
  1205. i2c1_pins: pinmux_i2c1_pins {
  1206. pinctrl-single,pins = <
  1207. 0x168 (((1 << 5) | (1 << 3)) | 3)
  1208. 0x16c (((1 << 5) | (1 << 3)) | 3)
  1209. >;
  1210. };
  1211. lcd_pins_s0: lcd_pins_s0 {
  1212. pinctrl-single,pins = <
  1213. 0x20 (0 | 1)
  1214. 0x24 (0 | 1)
  1215. 0x28 (0 | 1)
  1216. 0x2c (0 | 1)
  1217. 0x30 (0 | 1)
  1218. 0x34 (0 | 1)
  1219. 0x38 (0 | 1)
  1220. 0x3c (0 | 1)
  1221. 0xa0 (((1 << 3)) | 0)
  1222. 0xa4 (((1 << 3)) | 0)
  1223. 0xa8 (((1 << 3)) | 0)
  1224. 0xac (((1 << 3)) | 0)
  1225. 0xb0 (((1 << 3)) | 0)
  1226. 0xb4 (((1 << 3)) | 0)
  1227. 0xb8 (((1 << 3)) | 0)
  1228. 0xbc (((1 << 3)) | 0)
  1229. 0xc0 (((1 << 3)) | 0)
  1230. 0xc4 (((1 << 3)) | 0)
  1231. 0xc8 (((1 << 3)) | 0)
  1232. 0xcc (((1 << 3)) | 0)
  1233. 0xd0 (((1 << 3)) | 0)
  1234. 0xd4 (((1 << 3)) | 0)
  1235. 0xd8 (((1 << 3)) | 0)
  1236. 0xdc (((1 << 3)) | 0)
  1237. 0xe0 (0 | 0)
  1238. 0xe4 (0 | 0)
  1239. 0xe8 (0 | 0)
  1240. 0xec (0 | 0)
  1241. >;
  1242. };
  1243. mmc1_pins: mmc1_pins {
  1244. pinctrl-single,pins = <
  1245. 0xf0 (((1 << 5) | (1 << 4)) | 0)
  1246. 0xf4 (((1 << 5) | (1 << 4)) | 0)
  1247. 0xf8 (((1 << 5) | (1 << 4)) | 0)
  1248. 0xfc (((1 << 5) | (1 << 4)) | 0)
  1249. 0x100 (((1 << 5) | (1 << 4)) | 0)
  1250. 0x104 (((1 << 5) | (1 << 4)) | 0)
  1251. >;
  1252. };
  1253. nandflash_pins: pinmux_nandflash_pins {
  1254. pinctrl-single,pins = <
  1255. 0x0 (((1 << 5) | (1 << 4)) | 0)
  1256. 0x4 (((1 << 5) | (1 << 4)) | 0)
  1257. 0x8 (((1 << 5) | (1 << 4)) | 0)
  1258. 0xc (((1 << 5) | (1 << 4)) | 0)
  1259. 0x10 (((1 << 5) | (1 << 4)) | 0)
  1260. 0x14 (((1 << 5) | (1 << 4)) | 0)
  1261. 0x18 (((1 << 5) | (1 << 4)) | 0)
  1262. 0x1c (((1 << 5) | (1 << 4)) | 0)
  1263. 0x70 (((1 << 5) | (1 << 4)) | 0)
  1264. 0x74 (((1 << 5) | (1 << 4)) | 7)
  1265. 0x7c (((1 << 3)) | 0)
  1266. 0x90 (((1 << 3)) | 0)
  1267. 0x94 (((1 << 3)) | 0)
  1268. 0x98 (((1 << 3)) | 0)
  1269. 0x9c (((1 << 3)) | 0)
  1270. >;
  1271. };
  1272. spi0_pins: pinmux_spi0_pins {
  1273. pinctrl-single,pins = <
  1274. 0x150 (((1 << 5)) | 0)
  1275. 0x154 (((1 << 5) | (1 << 4)) | 0)
  1276. 0x158 (((1 << 5)) | 0)
  1277. 0x15c (((1 << 5) | (1 << 4)) | 0)
  1278. >;
  1279. };
  1280. spi1_pins: pinmux_spi1_pins {
  1281. pinctrl-single,pins = <
  1282. 0x190 (((1 << 5)) | 3)
  1283. 0x194 (((1 << 5) | (1 << 4)) | 3)
  1284. 0x198 (((1 << 5)) | 3)
  1285. 0x19c (((1 << 5) | (1 << 4)) | 3)
  1286. >;
  1287. };
  1288. uart0_pins: pinmux_uart0_pins {
  1289. pinctrl-single,pins = <
  1290. 0x170 (((1 << 5) | (1 << 3)) | 0)
  1291. 0x174 (((1 << 3)) | 0)
  1292. >;
  1293. };
  1294. };