.am335x-pxm50.dtb.dts.tmp 31 KB

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  1. # 1 "<stdin>"
  2. # 1 "<built-in>"
  3. # 1 "<command-line>"
  4. # 1 "././include/linux/kconfig.h" 1
  5. # 1 "include/generated/autoconf.h" 1
  6. # 5 "././include/linux/kconfig.h" 2
  7. # 1 "<command-line>" 2
  8. # 1 "<stdin>"
  9. # 11 "<stdin>"
  10. /dts-v1/;
  11. # 1 "./arch/arm/dts/am335x-pxm2.dtsi" 1
  12. # 13 "./arch/arm/dts/am335x-pxm2.dtsi"
  13. # 1 "./arch/arm/dts/am33xx.dtsi" 1
  14. # 11 "./arch/arm/dts/am33xx.dtsi"
  15. # 1 "./arch/arm/dts/include/dt-bindings/gpio/gpio.h" 1
  16. # 12 "./arch/arm/dts/am33xx.dtsi" 2
  17. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 1
  18. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/omap.h" 1
  19. # 9 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 2
  20. # 13 "./arch/arm/dts/am33xx.dtsi" 2
  21. # 1 "./arch/arm/dts/skeleton.dtsi" 1
  22. / {
  23. #address-cells = <1>;
  24. #size-cells = <1>;
  25. chosen { };
  26. aliases { };
  27. memory { device_type = "memory"; reg = <0 0>; };
  28. };
  29. # 15 "./arch/arm/dts/am33xx.dtsi" 2
  30. / {
  31. compatible = "ti,am33xx";
  32. interrupt-parent = <&intc>;
  33. aliases {
  34. i2c0 = &i2c0;
  35. i2c1 = &i2c1;
  36. i2c2 = &i2c2;
  37. serial0 = &uart0;
  38. serial1 = &uart1;
  39. serial2 = &uart2;
  40. serial3 = &uart3;
  41. serial4 = &uart4;
  42. serial5 = &uart5;
  43. d_can0 = &dcan0;
  44. d_can1 = &dcan1;
  45. usb0 = &usb0;
  46. usb1 = &usb1;
  47. phy0 = &usb0_phy;
  48. phy1 = &usb1_phy;
  49. ethernet0 = &cpsw_emac0;
  50. ethernet1 = &cpsw_emac1;
  51. };
  52. cpus {
  53. #address-cells = <1>;
  54. #size-cells = <0>;
  55. cpu@0 {
  56. compatible = "arm,cortex-a8";
  57. device_type = "cpu";
  58. reg = <0>;
  59. operating-points = <
  60. 720000 1285000
  61. 600000 1225000
  62. 500000 1125000
  63. 275000 1125000
  64. >;
  65. voltage-tolerance = <2>;
  66. clocks = <&dpll_mpu_ck>;
  67. clock-names = "cpu";
  68. clock-latency = <300000>;
  69. };
  70. };
  71. pmu {
  72. compatible = "arm,cortex-a8-pmu";
  73. interrupts = <3>;
  74. };
  75. soc {
  76. compatible = "ti,omap-infra";
  77. mpu {
  78. compatible = "ti,omap3-mpu";
  79. ti,hwmods = "mpu";
  80. };
  81. };
  82. # 93 "./arch/arm/dts/am33xx.dtsi"
  83. ocp {
  84. compatible = "simple-bus";
  85. #address-cells = <1>;
  86. #size-cells = <1>;
  87. ranges;
  88. ti,hwmods = "l3_main";
  89. l4_wkup: l4_wkup@44c00000 {
  90. compatible = "ti,am3-l4-wkup", "simple-bus";
  91. #address-cells = <1>;
  92. #size-cells = <1>;
  93. ranges = <0 0x44c00000 0x280000>;
  94. prcm: prcm@200000 {
  95. compatible = "ti,am3-prcm";
  96. reg = <0x200000 0x4000>;
  97. prcm_clocks: clocks {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. };
  101. prcm_clockdomains: clockdomains {
  102. };
  103. };
  104. scm: scm@210000 {
  105. compatible = "ti,am3-scm", "simple-bus";
  106. reg = <0x210000 0x2000>;
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. ranges = <0 0x210000 0x2000>;
  110. am33xx_pinmux: pinmux@800 {
  111. compatible = "pinctrl-single";
  112. reg = <0x800 0x238>;
  113. #address-cells = <1>;
  114. #size-cells = <0>;
  115. pinctrl-single,register-width = <32>;
  116. pinctrl-single,function-mask = <0x7f>;
  117. };
  118. scm_conf: scm_conf@0 {
  119. compatible = "syscon";
  120. reg = <0x0 0x800>;
  121. #address-cells = <1>;
  122. #size-cells = <1>;
  123. scm_clocks: clocks {
  124. #address-cells = <1>;
  125. #size-cells = <0>;
  126. };
  127. };
  128. scm_clockdomains: clockdomains {
  129. };
  130. };
  131. };
  132. intc: interrupt-controller@48200000 {
  133. compatible = "ti,am33xx-intc";
  134. interrupt-controller;
  135. #interrupt-cells = <1>;
  136. reg = <0x48200000 0x1000>;
  137. };
  138. edma: edma@49000000 {
  139. compatible = "ti,edma3";
  140. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  141. reg = <0x49000000 0x10000>,
  142. <0x44e10f90 0x40>;
  143. interrupts = <12 13 14>;
  144. #dma-cells = <1>;
  145. };
  146. gpio0: gpio@44e07000 {
  147. compatible = "ti,omap4-gpio";
  148. ti,hwmods = "gpio1";
  149. gpio-controller;
  150. #gpio-cells = <2>;
  151. interrupt-controller;
  152. #interrupt-cells = <2>;
  153. reg = <0x44e07000 0x1000>;
  154. interrupts = <96>;
  155. };
  156. gpio1: gpio@4804c000 {
  157. compatible = "ti,omap4-gpio";
  158. ti,hwmods = "gpio2";
  159. gpio-controller;
  160. #gpio-cells = <2>;
  161. interrupt-controller;
  162. #interrupt-cells = <2>;
  163. reg = <0x4804c000 0x1000>;
  164. interrupts = <98>;
  165. };
  166. gpio2: gpio@481ac000 {
  167. compatible = "ti,omap4-gpio";
  168. ti,hwmods = "gpio3";
  169. gpio-controller;
  170. #gpio-cells = <2>;
  171. interrupt-controller;
  172. #interrupt-cells = <2>;
  173. reg = <0x481ac000 0x1000>;
  174. interrupts = <32>;
  175. };
  176. gpio3: gpio@481ae000 {
  177. compatible = "ti,omap4-gpio";
  178. ti,hwmods = "gpio4";
  179. gpio-controller;
  180. #gpio-cells = <2>;
  181. interrupt-controller;
  182. #interrupt-cells = <2>;
  183. reg = <0x481ae000 0x1000>;
  184. interrupts = <62>;
  185. };
  186. uart0: serial@44e09000 {
  187. compatible = "ti,omap3-uart";
  188. ti,hwmods = "uart1";
  189. clock-frequency = <48000000>;
  190. reg = <0x44e09000 0x2000>;
  191. reg-shift = <2>;
  192. interrupts = <72>;
  193. status = "disabled";
  194. dmas = <&edma 26>, <&edma 27>;
  195. dma-names = "tx", "rx";
  196. };
  197. uart1: serial@48022000 {
  198. compatible = "ti,omap3-uart";
  199. ti,hwmods = "uart2";
  200. clock-frequency = <48000000>;
  201. reg = <0x48022000 0x2000>;
  202. reg-shift = <2>;
  203. interrupts = <73>;
  204. status = "disabled";
  205. dmas = <&edma 28>, <&edma 29>;
  206. dma-names = "tx", "rx";
  207. };
  208. uart2: serial@48024000 {
  209. compatible = "ti,omap3-uart";
  210. ti,hwmods = "uart3";
  211. clock-frequency = <48000000>;
  212. reg = <0x48024000 0x2000>;
  213. reg-shift = <2>;
  214. interrupts = <74>;
  215. status = "disabled";
  216. dmas = <&edma 30>, <&edma 31>;
  217. dma-names = "tx", "rx";
  218. };
  219. uart3: serial@481a6000 {
  220. compatible = "ti,omap3-uart";
  221. ti,hwmods = "uart4";
  222. clock-frequency = <48000000>;
  223. reg = <0x481a6000 0x2000>;
  224. reg-shift = <2>;
  225. interrupts = <44>;
  226. status = "disabled";
  227. };
  228. uart4: serial@481a8000 {
  229. compatible = "ti,omap3-uart";
  230. ti,hwmods = "uart5";
  231. clock-frequency = <48000000>;
  232. reg = <0x481a8000 0x2000>;
  233. reg-shift = <2>;
  234. interrupts = <45>;
  235. status = "disabled";
  236. };
  237. uart5: serial@481aa000 {
  238. compatible = "ti,omap3-uart";
  239. ti,hwmods = "uart6";
  240. clock-frequency = <48000000>;
  241. reg = <0x481aa000 0x2000>;
  242. reg-shift = <2>;
  243. interrupts = <46>;
  244. status = "disabled";
  245. };
  246. i2c0: i2c@44e0b000 {
  247. compatible = "ti,omap4-i2c";
  248. #address-cells = <1>;
  249. #size-cells = <0>;
  250. ti,hwmods = "i2c1";
  251. reg = <0x44e0b000 0x1000>;
  252. interrupts = <70>;
  253. status = "disabled";
  254. };
  255. i2c1: i2c@4802a000 {
  256. compatible = "ti,omap4-i2c";
  257. #address-cells = <1>;
  258. #size-cells = <0>;
  259. ti,hwmods = "i2c2";
  260. reg = <0x4802a000 0x1000>;
  261. interrupts = <71>;
  262. status = "disabled";
  263. };
  264. i2c2: i2c@4819c000 {
  265. compatible = "ti,omap4-i2c";
  266. #address-cells = <1>;
  267. #size-cells = <0>;
  268. ti,hwmods = "i2c3";
  269. reg = <0x4819c000 0x1000>;
  270. interrupts = <30>;
  271. status = "disabled";
  272. };
  273. mmc1: mmc@48060000 {
  274. compatible = "ti,omap4-hsmmc";
  275. ti,hwmods = "mmc1";
  276. ti,dual-volt;
  277. ti,needs-special-reset;
  278. ti,needs-special-hs-handling;
  279. dmas = <&edma 24
  280. &edma 25>;
  281. dma-names = "tx", "rx";
  282. interrupts = <64>;
  283. interrupt-parent = <&intc>;
  284. reg = <0x48060000 0x1000>;
  285. status = "disabled";
  286. };
  287. mmc2: mmc@481d8000 {
  288. compatible = "ti,omap4-hsmmc";
  289. ti,hwmods = "mmc2";
  290. ti,needs-special-reset;
  291. dmas = <&edma 2
  292. &edma 3>;
  293. dma-names = "tx", "rx";
  294. interrupts = <28>;
  295. interrupt-parent = <&intc>;
  296. reg = <0x481d8000 0x1000>;
  297. status = "disabled";
  298. };
  299. mmc3: mmc@47810000 {
  300. compatible = "ti,omap4-hsmmc";
  301. ti,hwmods = "mmc3";
  302. ti,needs-special-reset;
  303. interrupts = <29>;
  304. interrupt-parent = <&intc>;
  305. reg = <0x47810000 0x1000>;
  306. status = "disabled";
  307. };
  308. hwspinlock: spinlock@480ca000 {
  309. compatible = "ti,omap4-hwspinlock";
  310. reg = <0x480ca000 0x1000>;
  311. ti,hwmods = "spinlock";
  312. #hwlock-cells = <1>;
  313. };
  314. wdt2: wdt@44e35000 {
  315. compatible = "ti,omap3-wdt";
  316. ti,hwmods = "wd_timer2";
  317. reg = <0x44e35000 0x1000>;
  318. interrupts = <91>;
  319. };
  320. dcan0: can@481cc000 {
  321. compatible = "ti,am3352-d_can";
  322. ti,hwmods = "d_can0";
  323. reg = <0x481cc000 0x2000>;
  324. clocks = <&dcan0_fck>;
  325. clock-names = "fck";
  326. syscon-raminit = <&scm_conf 0x644 0>;
  327. interrupts = <52>;
  328. status = "disabled";
  329. };
  330. dcan1: can@481d0000 {
  331. compatible = "ti,am3352-d_can";
  332. ti,hwmods = "d_can1";
  333. reg = <0x481d0000 0x2000>;
  334. clocks = <&dcan1_fck>;
  335. clock-names = "fck";
  336. syscon-raminit = <&scm_conf 0x644 1>;
  337. interrupts = <55>;
  338. status = "disabled";
  339. };
  340. mailbox: mailbox@480C8000 {
  341. compatible = "ti,omap4-mailbox";
  342. reg = <0x480C8000 0x200>;
  343. interrupts = <77>;
  344. ti,hwmods = "mailbox";
  345. #mbox-cells = <1>;
  346. ti,mbox-num-users = <4>;
  347. ti,mbox-num-fifos = <8>;
  348. mbox_wkupm3: wkup_m3 {
  349. ti,mbox-tx = <0 0 0>;
  350. ti,mbox-rx = <0 0 3>;
  351. };
  352. };
  353. timer1: timer@44e31000 {
  354. compatible = "ti,am335x-timer-1ms";
  355. reg = <0x44e31000 0x400>;
  356. interrupts = <67>;
  357. ti,hwmods = "timer1";
  358. ti,timer-alwon;
  359. };
  360. timer2: timer@48040000 {
  361. compatible = "ti,am335x-timer";
  362. reg = <0x48040000 0x400>;
  363. interrupts = <68>;
  364. ti,hwmods = "timer2";
  365. };
  366. timer3: timer@48042000 {
  367. compatible = "ti,am335x-timer";
  368. reg = <0x48042000 0x400>;
  369. interrupts = <69>;
  370. ti,hwmods = "timer3";
  371. };
  372. timer4: timer@48044000 {
  373. compatible = "ti,am335x-timer";
  374. reg = <0x48044000 0x400>;
  375. interrupts = <92>;
  376. ti,hwmods = "timer4";
  377. ti,timer-pwm;
  378. };
  379. timer5: timer@48046000 {
  380. compatible = "ti,am335x-timer";
  381. reg = <0x48046000 0x400>;
  382. interrupts = <93>;
  383. ti,hwmods = "timer5";
  384. ti,timer-pwm;
  385. };
  386. timer6: timer@48048000 {
  387. compatible = "ti,am335x-timer";
  388. reg = <0x48048000 0x400>;
  389. interrupts = <94>;
  390. ti,hwmods = "timer6";
  391. ti,timer-pwm;
  392. };
  393. timer7: timer@4804a000 {
  394. compatible = "ti,am335x-timer";
  395. reg = <0x4804a000 0x400>;
  396. interrupts = <95>;
  397. ti,hwmods = "timer7";
  398. ti,timer-pwm;
  399. };
  400. rtc: rtc@44e3e000 {
  401. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  402. reg = <0x44e3e000 0x1000>;
  403. interrupts = <75
  404. 76>;
  405. ti,hwmods = "rtc";
  406. };
  407. spi0: spi@48030000 {
  408. compatible = "ti,omap4-mcspi";
  409. #address-cells = <1>;
  410. #size-cells = <0>;
  411. reg = <0x48030000 0x400>;
  412. interrupts = <65>;
  413. ti,spi-num-cs = <2>;
  414. ti,hwmods = "spi0";
  415. dmas = <&edma 16
  416. &edma 17
  417. &edma 18
  418. &edma 19>;
  419. dma-names = "tx0", "rx0", "tx1", "rx1";
  420. status = "disabled";
  421. };
  422. spi1: spi@481a0000 {
  423. compatible = "ti,omap4-mcspi";
  424. #address-cells = <1>;
  425. #size-cells = <0>;
  426. reg = <0x481a0000 0x400>;
  427. interrupts = <125>;
  428. ti,spi-num-cs = <2>;
  429. ti,hwmods = "spi1";
  430. dmas = <&edma 42
  431. &edma 43
  432. &edma 44
  433. &edma 45>;
  434. dma-names = "tx0", "rx0", "tx1", "rx1";
  435. status = "disabled";
  436. };
  437. usb: usb@47400000 {
  438. compatible = "ti,am33xx-usb";
  439. reg = <0x47400000 0x1000>;
  440. ranges;
  441. #address-cells = <1>;
  442. #size-cells = <1>;
  443. ti,hwmods = "usb_otg_hs";
  444. status = "disabled";
  445. usb_ctrl_mod: control@44e10620 {
  446. compatible = "ti,am335x-usb-ctrl-module";
  447. reg = <0x44e10620 0x10
  448. 0x44e10648 0x4>;
  449. reg-names = "phy_ctrl", "wakeup";
  450. status = "disabled";
  451. };
  452. usb0_phy: usb-phy@47401300 {
  453. compatible = "ti,am335x-usb-phy";
  454. reg = <0x47401300 0x100>;
  455. reg-names = "phy";
  456. status = "disabled";
  457. ti,ctrl_mod = <&usb_ctrl_mod>;
  458. };
  459. usb0: usb@47401000 {
  460. compatible = "ti,musb-am33xx";
  461. status = "disabled";
  462. reg = <0x47401400 0x400
  463. 0x47401000 0x200>;
  464. reg-names = "mc", "control";
  465. interrupts = <18>;
  466. interrupt-names = "mc";
  467. dr_mode = "otg";
  468. mentor,multipoint = <1>;
  469. mentor,num-eps = <16>;
  470. mentor,ram-bits = <12>;
  471. mentor,power = <500>;
  472. phys = <&usb0_phy>;
  473. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  474. &cppi41dma 2 0 &cppi41dma 3 0
  475. &cppi41dma 4 0 &cppi41dma 5 0
  476. &cppi41dma 6 0 &cppi41dma 7 0
  477. &cppi41dma 8 0 &cppi41dma 9 0
  478. &cppi41dma 10 0 &cppi41dma 11 0
  479. &cppi41dma 12 0 &cppi41dma 13 0
  480. &cppi41dma 14 0 &cppi41dma 0 1
  481. &cppi41dma 1 1 &cppi41dma 2 1
  482. &cppi41dma 3 1 &cppi41dma 4 1
  483. &cppi41dma 5 1 &cppi41dma 6 1
  484. &cppi41dma 7 1 &cppi41dma 8 1
  485. &cppi41dma 9 1 &cppi41dma 10 1
  486. &cppi41dma 11 1 &cppi41dma 12 1
  487. &cppi41dma 13 1 &cppi41dma 14 1>;
  488. dma-names =
  489. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  490. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  491. "rx14", "rx15",
  492. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  493. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  494. "tx14", "tx15";
  495. };
  496. usb1_phy: usb-phy@47401b00 {
  497. compatible = "ti,am335x-usb-phy";
  498. reg = <0x47401b00 0x100>;
  499. reg-names = "phy";
  500. status = "disabled";
  501. ti,ctrl_mod = <&usb_ctrl_mod>;
  502. };
  503. usb1: usb@47401800 {
  504. compatible = "ti,musb-am33xx";
  505. status = "disabled";
  506. reg = <0x47401c00 0x400
  507. 0x47401800 0x200>;
  508. reg-names = "mc", "control";
  509. interrupts = <19>;
  510. interrupt-names = "mc";
  511. dr_mode = "otg";
  512. mentor,multipoint = <1>;
  513. mentor,num-eps = <16>;
  514. mentor,ram-bits = <12>;
  515. mentor,power = <500>;
  516. phys = <&usb1_phy>;
  517. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  518. &cppi41dma 17 0 &cppi41dma 18 0
  519. &cppi41dma 19 0 &cppi41dma 20 0
  520. &cppi41dma 21 0 &cppi41dma 22 0
  521. &cppi41dma 23 0 &cppi41dma 24 0
  522. &cppi41dma 25 0 &cppi41dma 26 0
  523. &cppi41dma 27 0 &cppi41dma 28 0
  524. &cppi41dma 29 0 &cppi41dma 15 1
  525. &cppi41dma 16 1 &cppi41dma 17 1
  526. &cppi41dma 18 1 &cppi41dma 19 1
  527. &cppi41dma 20 1 &cppi41dma 21 1
  528. &cppi41dma 22 1 &cppi41dma 23 1
  529. &cppi41dma 24 1 &cppi41dma 25 1
  530. &cppi41dma 26 1 &cppi41dma 27 1
  531. &cppi41dma 28 1 &cppi41dma 29 1>;
  532. dma-names =
  533. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  534. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  535. "rx14", "rx15",
  536. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  537. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  538. "tx14", "tx15";
  539. };
  540. cppi41dma: dma-controller@47402000 {
  541. compatible = "ti,am3359-cppi41";
  542. reg = <0x47400000 0x1000
  543. 0x47402000 0x1000
  544. 0x47403000 0x1000
  545. 0x47404000 0x4000>;
  546. reg-names = "glue", "controller", "scheduler", "queuemgr";
  547. interrupts = <17>;
  548. interrupt-names = "glue";
  549. #dma-cells = <2>;
  550. #dma-channels = <30>;
  551. #dma-requests = <256>;
  552. status = "disabled";
  553. };
  554. };
  555. epwmss0: epwmss@48300000 {
  556. compatible = "ti,am33xx-pwmss";
  557. reg = <0x48300000 0x10>;
  558. ti,hwmods = "epwmss0";
  559. #address-cells = <1>;
  560. #size-cells = <1>;
  561. status = "disabled";
  562. ranges = <0x48300100 0x48300100 0x80
  563. 0x48300180 0x48300180 0x80
  564. 0x48300200 0x48300200 0x80>;
  565. ecap0: ecap@48300100 {
  566. compatible = "ti,am33xx-ecap";
  567. #pwm-cells = <3>;
  568. reg = <0x48300100 0x80>;
  569. interrupts = <31>;
  570. interrupt-names = "ecap0";
  571. ti,hwmods = "ecap0";
  572. status = "disabled";
  573. };
  574. ehrpwm0: ehrpwm@48300200 {
  575. compatible = "ti,am33xx-ehrpwm";
  576. #pwm-cells = <3>;
  577. reg = <0x48300200 0x80>;
  578. ti,hwmods = "ehrpwm0";
  579. status = "disabled";
  580. };
  581. };
  582. epwmss1: epwmss@48302000 {
  583. compatible = "ti,am33xx-pwmss";
  584. reg = <0x48302000 0x10>;
  585. ti,hwmods = "epwmss1";
  586. #address-cells = <1>;
  587. #size-cells = <1>;
  588. status = "disabled";
  589. ranges = <0x48302100 0x48302100 0x80
  590. 0x48302180 0x48302180 0x80
  591. 0x48302200 0x48302200 0x80>;
  592. ecap1: ecap@48302100 {
  593. compatible = "ti,am33xx-ecap";
  594. #pwm-cells = <3>;
  595. reg = <0x48302100 0x80>;
  596. interrupts = <47>;
  597. interrupt-names = "ecap1";
  598. ti,hwmods = "ecap1";
  599. status = "disabled";
  600. };
  601. ehrpwm1: ehrpwm@48302200 {
  602. compatible = "ti,am33xx-ehrpwm";
  603. #pwm-cells = <3>;
  604. reg = <0x48302200 0x80>;
  605. ti,hwmods = "ehrpwm1";
  606. status = "disabled";
  607. };
  608. };
  609. epwmss2: epwmss@48304000 {
  610. compatible = "ti,am33xx-pwmss";
  611. reg = <0x48304000 0x10>;
  612. ti,hwmods = "epwmss2";
  613. #address-cells = <1>;
  614. #size-cells = <1>;
  615. status = "disabled";
  616. ranges = <0x48304100 0x48304100 0x80
  617. 0x48304180 0x48304180 0x80
  618. 0x48304200 0x48304200 0x80>;
  619. ecap2: ecap@48304100 {
  620. compatible = "ti,am33xx-ecap";
  621. #pwm-cells = <3>;
  622. reg = <0x48304100 0x80>;
  623. interrupts = <61>;
  624. interrupt-names = "ecap2";
  625. ti,hwmods = "ecap2";
  626. status = "disabled";
  627. };
  628. ehrpwm2: ehrpwm@48304200 {
  629. compatible = "ti,am33xx-ehrpwm";
  630. #pwm-cells = <3>;
  631. reg = <0x48304200 0x80>;
  632. ti,hwmods = "ehrpwm2";
  633. status = "disabled";
  634. };
  635. };
  636. mac: ethernet@4a100000 {
  637. compatible = "ti,cpsw";
  638. ti,hwmods = "cpgmac0";
  639. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  640. clock-names = "fck", "cpts";
  641. cpdma_channels = <8>;
  642. ale_entries = <1024>;
  643. bd_ram_size = <0x2000>;
  644. no_bd_ram = <0>;
  645. rx_descs = <64>;
  646. mac_control = <0x20>;
  647. slaves = <2>;
  648. active_slave = <0>;
  649. cpts_clock_mult = <0x80000000>;
  650. cpts_clock_shift = <29>;
  651. reg = <0x4a100000 0x800
  652. 0x4a101200 0x100>;
  653. #address-cells = <1>;
  654. #size-cells = <1>;
  655. interrupt-parent = <&intc>;
  656. interrupts = <40 41 42 43>;
  657. ranges;
  658. syscon = <&scm_conf>;
  659. status = "disabled";
  660. davinci_mdio: mdio@4a101000 {
  661. compatible = "ti,davinci_mdio";
  662. #address-cells = <1>;
  663. #size-cells = <0>;
  664. ti,hwmods = "davinci_mdio";
  665. bus_freq = <1000000>;
  666. reg = <0x4a101000 0x100>;
  667. status = "disabled";
  668. };
  669. cpsw_emac0: slave@4a100200 {
  670. mac-address = [ 00 00 00 00 00 00 ];
  671. };
  672. cpsw_emac1: slave@4a100300 {
  673. mac-address = [ 00 00 00 00 00 00 ];
  674. };
  675. phy_sel: cpsw-phy-sel@44e10650 {
  676. compatible = "ti,am3352-cpsw-phy-sel";
  677. reg= <0x44e10650 0x4>;
  678. reg-names = "gmii-sel";
  679. };
  680. };
  681. ocmcram: ocmcram@40300000 {
  682. compatible = "mmio-sram";
  683. reg = <0x40300000 0x10000>;
  684. };
  685. wkup_m3: wkup_m3@44d00000 {
  686. compatible = "ti,am3353-wkup-m3";
  687. reg = <0x44d00000 0x4000
  688. 0x44d80000 0x2000>;
  689. ti,hwmods = "wkup_m3";
  690. ti,no-reset-on-init;
  691. };
  692. elm: elm@48080000 {
  693. compatible = "ti,am3352-elm";
  694. reg = <0x48080000 0x2000>;
  695. interrupts = <4>;
  696. ti,hwmods = "elm";
  697. status = "disabled";
  698. };
  699. lcdc: lcdc@4830e000 {
  700. compatible = "ti,am33xx-tilcdc";
  701. reg = <0x4830e000 0x1000>;
  702. interrupt-parent = <&intc>;
  703. interrupts = <36>;
  704. ti,hwmods = "lcdc";
  705. status = "disabled";
  706. };
  707. tscadc: tscadc@44e0d000 {
  708. compatible = "ti,am3359-tscadc";
  709. reg = <0x44e0d000 0x1000>;
  710. interrupt-parent = <&intc>;
  711. interrupts = <16>;
  712. ti,hwmods = "adc_tsc";
  713. status = "disabled";
  714. tsc {
  715. compatible = "ti,am3359-tsc";
  716. };
  717. am335x_adc: adc {
  718. #io-channel-cells = <1>;
  719. compatible = "ti,am3359-adc";
  720. };
  721. };
  722. gpmc: gpmc@50000000 {
  723. compatible = "ti,am3352-gpmc";
  724. ti,hwmods = "gpmc";
  725. ti,no-idle-on-init;
  726. reg = <0x50000000 0x2000>;
  727. interrupts = <100>;
  728. gpmc,num-cs = <7>;
  729. gpmc,num-waitpins = <2>;
  730. #address-cells = <2>;
  731. #size-cells = <1>;
  732. status = "disabled";
  733. };
  734. sham: sham@53100000 {
  735. compatible = "ti,omap4-sham";
  736. ti,hwmods = "sham";
  737. reg = <0x53100000 0x200>;
  738. interrupts = <109>;
  739. dmas = <&edma 36>;
  740. dma-names = "rx";
  741. };
  742. aes: aes@53500000 {
  743. compatible = "ti,omap4-aes";
  744. ti,hwmods = "aes";
  745. reg = <0x53500000 0xa0>;
  746. interrupts = <103>;
  747. dmas = <&edma 6>,
  748. <&edma 5>;
  749. dma-names = "tx", "rx";
  750. };
  751. mcasp0: mcasp@48038000 {
  752. compatible = "ti,am33xx-mcasp-audio";
  753. ti,hwmods = "mcasp0";
  754. reg = <0x48038000 0x2000>,
  755. <0x46000000 0x400000>;
  756. reg-names = "mpu", "dat";
  757. interrupts = <80>, <81>;
  758. interrupt-names = "tx", "rx";
  759. status = "disabled";
  760. dmas = <&edma 8>,
  761. <&edma 9>;
  762. dma-names = "tx", "rx";
  763. };
  764. mcasp1: mcasp@4803C000 {
  765. compatible = "ti,am33xx-mcasp-audio";
  766. ti,hwmods = "mcasp1";
  767. reg = <0x4803C000 0x2000>,
  768. <0x46400000 0x400000>;
  769. reg-names = "mpu", "dat";
  770. interrupts = <82>, <83>;
  771. interrupt-names = "tx", "rx";
  772. status = "disabled";
  773. dmas = <&edma 10>,
  774. <&edma 11>;
  775. dma-names = "tx", "rx";
  776. };
  777. rng: rng@48310000 {
  778. compatible = "ti,omap4-rng";
  779. ti,hwmods = "rng";
  780. reg = <0x48310000 0x2000>;
  781. interrupts = <111>;
  782. };
  783. };
  784. };
  785. /include/ "am33xx-clocks.dtsi"
  786. # 14 "./arch/arm/dts/am335x-pxm2.dtsi" 2
  787. # 1 "./arch/arm/dts/include/dt-bindings/input/input.h" 1
  788. # 12 "./arch/arm/dts/include/dt-bindings/input/input.h"
  789. # 1 "./arch/arm/dts/include/dt-bindings/input/linux-event-codes.h" 1
  790. # 13 "./arch/arm/dts/include/dt-bindings/input/input.h" 2
  791. # 15 "./arch/arm/dts/am335x-pxm2.dtsi" 2
  792. / {
  793. chosen {
  794. stdout-path = &uart0;
  795. tick-timer = &timer2;
  796. };
  797. cpus {
  798. cpu@0 {
  799. cpu0-supply = <&vdd1_reg>;
  800. };
  801. };
  802. backlight0: backlight {
  803. compatible = "pwm-backlight";
  804. pwms = <&ecap0 0 50000 0>;
  805. brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
  806. 38 40 43 45 48 51 53 56 58 61 63 66 68 71
  807. 73 76 79 81 84 86 89 91 94 96 99 102 104
  808. 107 109 112 114 117 119 122 124 127 130
  809. 132 135 137 140 142 145 147 150 153 155
  810. 158 160 163 165 168 170 173 175 178 181
  811. 183 186 188 191 193 196 198 201 204 206
  812. 209 211 214 216 219 221 224 226 229 232
  813. 234 237 239 242 244 247 249 252 255>;
  814. default-brightness-level = <80>;
  815. power-supply = <&backlight_reg>;
  816. enable-gpios = <&gpio3 16 0>;
  817. };
  818. backlight_reg: fixedregulator0 {
  819. compatible = "regulator-fixed";
  820. regulator-name = "backlight_reg";
  821. regulator-boot-on;
  822. };
  823. gpio_keys: restart-keys {
  824. compatible = "gpio-keys";
  825. #address-cells = <1>;
  826. #size-cells = <0>;
  827. autorepeat;
  828. restart0 {
  829. label = "restart";
  830. linux,code = <0x198>;
  831. gpios = <&gpio1 27 1>;
  832. gpio-key,wakeup;
  833. };
  834. };
  835. leds {
  836. compatible = "gpio-leds";
  837. led_blue {
  838. label = "blue";
  839. gpios = <&gpio3 20 0>;
  840. };
  841. led_green {
  842. label = "green";
  843. gpios = <&gpio1 31 0>;
  844. };
  845. led_red {
  846. label = "red";
  847. gpios = <&gpio3 21 0>;
  848. };
  849. };
  850. memory {
  851. device_type = "memory";
  852. reg = <0x80000000 0x10000000>;
  853. };
  854. reg_lcd_3v3: fixedregulator1 {
  855. compatible = "regulator-gpio";
  856. regulator-name = "lcd-3v3";
  857. regulator-min-microvolt = <1800000>;
  858. regulator-max-microvolt = <3300000>;
  859. regulator-type = "voltage";
  860. startup-delay-us = <100>;
  861. states = <1800000 0x1
  862. 2900000 0x0>;
  863. enable-at-boot;
  864. gpios = <&gpio3 19 0>;
  865. enable-active-high;
  866. };
  867. vbat: fixedregulator2 {
  868. compatible = "regulator-fixed";
  869. regulator-name = "vbat";
  870. regulator-min-microvolt = <5000000>;
  871. regulator-max-microvolt = <5000000>;
  872. regulator-boot-on;
  873. };
  874. vmmc: fixedregulator3 {
  875. compatible = "regulator-fixed";
  876. regulator-name = "vmmc";
  877. regulator-min-microvolt = <3300000>;
  878. regulator-max-microvolt = <3300000>;
  879. };
  880. };
  881. &cppi41dma {
  882. status = "okay";
  883. };
  884. &cpsw_emac0 {
  885. phy_id = <&davinci_mdio>, <0>;
  886. phy-mode = "rgmii-txid";
  887. };
  888. &cpsw_emac1 {
  889. phy_id = <&davinci_mdio>, <1>;
  890. phy-mode = "rgmii-txid";
  891. };
  892. &davinci_mdio {
  893. pinctrl-names = "default", "sleep";
  894. pinctrl-0 = <&davinci_mdio_default>;
  895. pinctrl-1 = <&davinci_mdio_sleep>;
  896. status = "okay";
  897. };
  898. &elm {
  899. status = "okay";
  900. };
  901. &epwmss0 {
  902. status = "okay";
  903. ecap0: ecap@48300100 {
  904. status = "okay";
  905. pinctrl-names = "default";
  906. pinctrl-0 = <&ecap0_pins>;
  907. };
  908. };
  909. &gpmc {
  910. pinctrl-names = "default";
  911. pinctrl-0 = <&nandflash_pins>;
  912. status = "okay";
  913. ranges = <0 0 0x08000000 0x10000000>;
  914. nand@0,0 {
  915. reg = <0 0 0>;
  916. nand-bus-width = <8>;
  917. ti,nand-ecc-opt = "bch8";
  918. gpmc,device-nand = "true";
  919. gpmc,device-width = <1>;
  920. gpmc,sync-clk-ps = <0>;
  921. gpmc,cs-on-ns = <0>;
  922. gpmc,cs-rd-off-ns = <44>;
  923. gpmc,cs-wr-off-ns = <44>;
  924. gpmc,adv-on-ns = <6>;
  925. gpmc,adv-rd-off-ns = <34>;
  926. gpmc,adv-wr-off-ns = <44>;
  927. gpmc,we-on-ns = <0>;
  928. gpmc,we-off-ns = <40>;
  929. gpmc,oe-on-ns = <0>;
  930. gpmc,oe-off-ns = <54>;
  931. gpmc,access-ns = <64>;
  932. gpmc,rd-cycle-ns = <82>;
  933. gpmc,wr-cycle-ns = <82>;
  934. gpmc,wait-on-read = "true";
  935. gpmc,wait-on-write = "true";
  936. gpmc,bus-turnaround-ns = <0>;
  937. gpmc,cycle2cycle-delay-ns = <0>;
  938. gpmc,clk-activation-ns = <0>;
  939. gpmc,wait-monitoring-ns = <0>;
  940. gpmc,wr-access-ns = <40>;
  941. gpmc,wr-data-mux-bus-ns = <0>;
  942. #address-cells = <1>;
  943. #size-cells = <1>;
  944. elm_id = <&elm>;
  945. };
  946. };
  947. &i2c0 {
  948. pinctrl-names = "default";
  949. pinctrl-0 = <&i2c0_pins>;
  950. clock-frequency = <400000>;
  951. status = "okay";
  952. tps: tps@2d {
  953. reg = <0x2d>;
  954. };
  955. eeprom: eeprom@50 {
  956. compatible = "atmel,24c128";
  957. reg = <0x50>;
  958. pagesize = <32>;
  959. };
  960. };
  961. &i2c1 {
  962. pinctrl-names = "default";
  963. pinctrl-0 = <&i2c1_pins>;
  964. clock-frequency = <100000>;
  965. status = "okay";
  966. tsl2563: tsl2563@49 {
  967. compatible = "amstaos,tsl2563";
  968. reg = <0x49>;
  969. };
  970. };
  971. &i2c2 {
  972. pinctrl-names = "default";
  973. pinctrl-0 = <&i2c2_pins>;
  974. clock-frequency = <100000>;
  975. status = "okay";
  976. egalax_ts@04 {
  977. compatible = "eeti,egalax_ts";
  978. reg = <0x04>;
  979. interrupt-parent = <&gpio1>;
  980. interrupts = <24 2>;
  981. wakeup-gpios = <&gpio1 25 0>;
  982. };
  983. };
  984. &lcdc {
  985. status = "okay";
  986. };
  987. &mac {
  988. pinctrl-names = "default", "sleep";
  989. pinctrl-0 = <&cpsw_default>;
  990. pinctrl-1 = <&cpsw_sleep>;
  991. status = "okay";
  992. };
  993. &mmc1 {
  994. vmmc-supply = <&vmmc>;
  995. bus-width = <4>;
  996. cd-gpios = <&gpio0 6 0>;
  997. wp-gpios = <&gpio3 18 0>;
  998. status = "okay";
  999. };
  1000. &phy_sel {
  1001. rgmii-no-delay;
  1002. };
  1003. # 1 "./arch/arm/dts/tps65910.dtsi" 1
  1004. # 14 "./arch/arm/dts/tps65910.dtsi"
  1005. &tps {
  1006. compatible = "ti,tps65910";
  1007. regulators {
  1008. #address-cells = <1>;
  1009. #size-cells = <0>;
  1010. vrtc_reg: regulator@0 {
  1011. reg = <0>;
  1012. regulator-compatible = "vrtc";
  1013. };
  1014. vio_reg: regulator@1 {
  1015. reg = <1>;
  1016. regulator-compatible = "vio";
  1017. };
  1018. vdd1_reg: regulator@2 {
  1019. reg = <2>;
  1020. regulator-compatible = "vdd1";
  1021. };
  1022. vdd2_reg: regulator@3 {
  1023. reg = <3>;
  1024. regulator-compatible = "vdd2";
  1025. };
  1026. vdd3_reg: regulator@4 {
  1027. reg = <4>;
  1028. regulator-compatible = "vdd3";
  1029. };
  1030. vdig1_reg: regulator@5 {
  1031. reg = <5>;
  1032. regulator-compatible = "vdig1";
  1033. };
  1034. vdig2_reg: regulator@6 {
  1035. reg = <6>;
  1036. regulator-compatible = "vdig2";
  1037. };
  1038. vpll_reg: regulator@7 {
  1039. reg = <7>;
  1040. regulator-compatible = "vpll";
  1041. };
  1042. vdac_reg: regulator@8 {
  1043. reg = <8>;
  1044. regulator-compatible = "vdac";
  1045. };
  1046. vaux1_reg: regulator@9 {
  1047. reg = <9>;
  1048. regulator-compatible = "vaux1";
  1049. };
  1050. vaux2_reg: regulator@10 {
  1051. reg = <10>;
  1052. regulator-compatible = "vaux2";
  1053. };
  1054. vaux33_reg: regulator@11 {
  1055. reg = <11>;
  1056. regulator-compatible = "vaux33";
  1057. };
  1058. vmmc_reg: regulator@12 {
  1059. reg = <12>;
  1060. regulator-compatible = "vmmc";
  1061. };
  1062. vbb_reg: regulator@13 {
  1063. reg = <13>;
  1064. regulator-compatible = "vbb";
  1065. };
  1066. };
  1067. };
  1068. # 261 "./arch/arm/dts/am335x-pxm2.dtsi" 2
  1069. &tps {
  1070. vcc1-supply = <&vbat>;
  1071. vcc2-supply = <&vbat>;
  1072. vcc3-supply = <&vbat>;
  1073. vcc4-supply = <&vbat>;
  1074. vcc5-supply = <&vbat>;
  1075. vcc6-supply = <&vbat>;
  1076. vcc7-supply = <&vbat>;
  1077. vccio-supply = <&vbat>;
  1078. regulators {
  1079. vrtc_reg: regulator@0 {
  1080. regulator-always-on;
  1081. };
  1082. vio_reg: regulator@1 {
  1083. regulator-always-on;
  1084. };
  1085. vdd1_reg: regulator@2 {
  1086. regulator-name = "vdd_mpu";
  1087. regulator-min-microvolt = <912500>;
  1088. regulator-max-microvolt = <1312500>;
  1089. regulator-boot-on;
  1090. regulator-always-on;
  1091. };
  1092. vdd2_reg: regulator@3 {
  1093. regulator-name = "vdd_core";
  1094. regulator-min-microvolt = <912500>;
  1095. regulator-max-microvolt = <1150000>;
  1096. regulator-boot-on;
  1097. regulator-always-on;
  1098. };
  1099. vdd3_reg: regulator@4 {
  1100. regulator-always-on;
  1101. };
  1102. vdig1_reg: regulator@5 {
  1103. regulator-always-on;
  1104. };
  1105. vdig2_reg: regulator@6 {
  1106. regulator-always-on;
  1107. };
  1108. vpll_reg: regulator@7 {
  1109. regulator-always-on;
  1110. };
  1111. vdac_reg: regulator@8 {
  1112. regulator-always-on;
  1113. };
  1114. vaux1_reg: regulator@9 {
  1115. regulator-always-on;
  1116. };
  1117. vaux2_reg: regulator@10 {
  1118. regulator-always-on;
  1119. };
  1120. vaux33_reg: regulator@11 {
  1121. regulator-always-on;
  1122. };
  1123. vmmc_reg: regulator@12 {
  1124. regulator-min-microvolt = <1800000>;
  1125. regulator-max-microvolt = <3300000>;
  1126. regulator-always-on;
  1127. };
  1128. };
  1129. };
  1130. &uart0 {
  1131. pinctrl-names = "default";
  1132. pinctrl-0 = <&uart0_pins>;
  1133. status = "okay";
  1134. };
  1135. &usb {
  1136. status = "okay";
  1137. };
  1138. &usb_ctrl_mod {
  1139. status = "okay";
  1140. };
  1141. &usb0 {
  1142. status = "okay";
  1143. };
  1144. &usb1 {
  1145. dr_mode = "host";
  1146. status = "okay";
  1147. };
  1148. &usb0_phy {
  1149. status = "okay";
  1150. };
  1151. &usb1_phy {
  1152. status = "okay";
  1153. };
  1154. &am33xx_pinmux {
  1155. pinctrl-names = "default";
  1156. pinctrl-0 = <&clkout2_pin &gpio_pin>;
  1157. clkout2_pin: pinmux_clkout2_pin {
  1158. pinctrl-single,pins = <
  1159. 0x1b4 (0 | 3)
  1160. >;
  1161. };
  1162. cpsw_default: cpsw_default {
  1163. pinctrl-single,pins = <
  1164. 0x114 (0 | 2)
  1165. 0x118 (((1 << 5)) | 2)
  1166. 0x11c (0 | 2)
  1167. 0x120 (0 | 2)
  1168. 0x124 (0 | 2)
  1169. 0x128 (0 | 2)
  1170. 0x12c (0 | 2)
  1171. 0x130 (((1 << 5)) | 2)
  1172. 0x134 (((1 << 5)) | 2)
  1173. 0x138 (((1 << 5)) | 2)
  1174. 0x13c (((1 << 5)) | 2)
  1175. 0x140 (((1 << 5)) | 2)
  1176. >;
  1177. };
  1178. cpsw_sleep: cpsw_sleep {
  1179. pinctrl-single,pins = <
  1180. 0x114 (((1 << 5)) | 7)
  1181. 0x118 (((1 << 5)) | 7)
  1182. 0x11c (((1 << 5)) | 7)
  1183. 0x120 (((1 << 5)) | 7)
  1184. 0x124 (((1 << 5)) | 7)
  1185. 0x128 (((1 << 5)) | 7)
  1186. 0x12c (((1 << 5)) | 7)
  1187. 0x130 (((1 << 5)) | 7)
  1188. 0x134 (((1 << 5)) | 7)
  1189. 0x138 (((1 << 5)) | 7)
  1190. 0x13c (((1 << 5)) | 7)
  1191. 0x140 (((1 << 5)) | 7)
  1192. >;
  1193. };
  1194. davinci_mdio_default: davinci_mdio_default {
  1195. pinctrl-single,pins = <
  1196. 0x148 (((1 << 5) | (1 << 4)) | (1 << 6) | 0)
  1197. 0x14c (((1 << 4)) | 0)
  1198. >;
  1199. };
  1200. davinci_mdio_sleep: davinci_mdio_sleep {
  1201. pinctrl-single,pins = <
  1202. 0x148 (((1 << 5)) | 7)
  1203. 0x14c (((1 << 5)) | 7)
  1204. >;
  1205. };
  1206. ecap0_pins: ecap_pins {
  1207. pinctrl-single,pins = <
  1208. 0x198 (((1 << 4)) | 7)
  1209. 0x164 (0)
  1210. >;
  1211. };
  1212. gpio_pin: gpio_pin {
  1213. pinctrl-single,pins = <
  1214. 0x58 (((1 << 4)) | 7)
  1215. 0x60 (((1 << 5) | (1 << 4)) | 7)
  1216. 0x64 (((1 << 5) | (1 << 4)) | 7)
  1217. 0x6c (((1 << 5) | (1 << 4)) | 7)
  1218. 0x21c (0)
  1219. 0x234 (0)
  1220. 0x1a0 (((1 << 5) | (1 << 4)) | 4)
  1221. 0x160 (((1 << 5) | (1 << 4)) | 5)
  1222. >;
  1223. };
  1224. i2c0_pins: pinmux_i2c0_pins {
  1225. pinctrl-single,pins = <
  1226. 0x188 (((1 << 5) | (1 << 4)) | 0)
  1227. 0x18c (((1 << 5) | (1 << 4)) | 0)
  1228. >;
  1229. };
  1230. i2c1_pins: pinmux_i2c1_pins {
  1231. pinctrl-single,pins = <
  1232. 0x158 (((1 << 5) | (1 << 4)) | 2)
  1233. 0x15c (((1 << 5) | (1 << 4)) | 2)
  1234. >;
  1235. };
  1236. i2c2_pins: pinmux_i2c2_pins {
  1237. pinctrl-single,pins = <
  1238. 0x150 (((1 << 5) | (1 << 4)) | (1 << 6) | 2)
  1239. 0x154 (((1 << 5) | (1 << 4)) | (1 << 6) | 2)
  1240. >;
  1241. };
  1242. lcd_pins_s0: lcd_pins_s0 {
  1243. pinctrl-single,pins = <
  1244. 0x20 (0 | 1)
  1245. 0x24 (0 | 1)
  1246. 0x28 (0 | 1)
  1247. 0x2c (0 | 1)
  1248. 0x30 (0 | 1)
  1249. 0x34 (0 | 1)
  1250. 0x38 (0 | 1)
  1251. 0x3c (0 | 1)
  1252. 0xa0 (((1 << 3)) | 0)
  1253. 0xa4 (((1 << 3)) | 0)
  1254. 0xa8 (((1 << 3)) | 0)
  1255. 0xac (((1 << 3)) | 0)
  1256. 0xb0 (((1 << 3)) | 0)
  1257. 0xb4 (((1 << 3)) | 0)
  1258. 0xb8 (((1 << 3)) | 0)
  1259. 0xbc (((1 << 3)) | 0)
  1260. 0xc0 (((1 << 3)) | 0)
  1261. 0xc4 (((1 << 3)) | 0)
  1262. 0xc8 (((1 << 3)) | 0)
  1263. 0xcc (((1 << 3)) | 0)
  1264. 0xd0 (((1 << 3)) | 0)
  1265. 0xd4 (((1 << 3)) | 0)
  1266. 0xd8 (((1 << 3)) | 0)
  1267. 0xdc (((1 << 3)) | 0)
  1268. 0xe0 (0 | 0)
  1269. 0xe4 (0 | 0)
  1270. 0xe8 (0 | 0)
  1271. 0xec (0 | 0)
  1272. 0x194 (((1 << 4)) | 7)
  1273. >;
  1274. };
  1275. nandflash_pins: pinmux_nandflash_pins {
  1276. pinctrl-single,pins = <
  1277. 0x0 (((1 << 5) | (1 << 4)) | 0)
  1278. 0x4 (((1 << 5) | (1 << 4)) | 0)
  1279. 0x8 (((1 << 5) | (1 << 4)) | 0)
  1280. 0xc (((1 << 5) | (1 << 4)) | 0)
  1281. 0x10 (((1 << 5) | (1 << 4)) | 0)
  1282. 0x14 (((1 << 5) | (1 << 4)) | 0)
  1283. 0x18 (((1 << 5) | (1 << 4)) | 0)
  1284. 0x1c (((1 << 5) | (1 << 4)) | 0)
  1285. 0x70 (((1 << 5) | (1 << 4)) | 0)
  1286. 0x74 (((1 << 5) | (1 << 4)) | 7)
  1287. 0x7c (((1 << 3)) | 0)
  1288. 0x90 (((1 << 3)) | 0)
  1289. 0x94 (((1 << 3)) | 0)
  1290. 0x98 (((1 << 3)) | 0)
  1291. 0x9c (((1 << 3)) | 0)
  1292. >;
  1293. };
  1294. uart0_pins: pinmux_uart0_pins {
  1295. pinctrl-single,pins = <
  1296. 0x170 (((1 << 5) | (1 << 4)) | 0)
  1297. 0x174 (0 | 0)
  1298. >;
  1299. };
  1300. };
  1301. &wdt2 {
  1302. wdt-keep-enabled;
  1303. };
  1304. # 14 "<stdin>" 2
  1305. / {
  1306. model = "PXM2/PXM50";
  1307. compatible = "ti,am335x-evm", "ti,am33xx";
  1308. panel {
  1309. compatible = "ti,tilcdc,panel";
  1310. backlight = <&backlight0>;
  1311. pinctrl-names = "default";
  1312. pinctrl-0 = <&lcd_pins_s0>;
  1313. enable-gpios = <&gpio3 15 0>;
  1314. status = "okay";
  1315. panel-info {
  1316. ac-bias = <255>;
  1317. ac-bias-intrpt = <0>;
  1318. dma-burst-sz = <16>;
  1319. bpp = <32>;
  1320. fdd = <0x80>;
  1321. sync-edge = <0>;
  1322. sync-ctrl = <1>;
  1323. raster-order = <0>;
  1324. fifo-th = <0>;
  1325. tft-alt-mode = <0>;
  1326. invert-pxl-clk = <0>;
  1327. };
  1328. display-timings {
  1329. native-mode = <&timing1>;
  1330. timing1: 1376x768p50 {
  1331. clock-frequency = <60000000>;
  1332. hactive = <1376>;
  1333. vactive = <768>;
  1334. hfront-porch = <14>;
  1335. hback-porch = <64>;
  1336. hsync-len = <56>;
  1337. vback-porch = <28>;
  1338. vfront-porch = <1>;
  1339. vsync-len = <6>;
  1340. hsync-active = <1>;
  1341. vsync-active = <1>;
  1342. };
  1343. };
  1344. };
  1345. };