.am335x-evmsk.dtb.dts.tmp 37 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693
  1. # 1 "<stdin>"
  2. # 1 "<built-in>"
  3. # 1 "<command-line>"
  4. # 1 "././include/linux/kconfig.h" 1
  5. # 1 "include/generated/autoconf.h" 1
  6. # 5 "././include/linux/kconfig.h" 2
  7. # 1 "<command-line>" 2
  8. # 1 "<stdin>"
  9. # 14 "<stdin>"
  10. /dts-v1/;
  11. # 1 "./arch/arm/dts/am33xx.dtsi" 1
  12. # 11 "./arch/arm/dts/am33xx.dtsi"
  13. # 1 "./arch/arm/dts/include/dt-bindings/gpio/gpio.h" 1
  14. # 12 "./arch/arm/dts/am33xx.dtsi" 2
  15. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 1
  16. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/omap.h" 1
  17. # 9 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 2
  18. # 13 "./arch/arm/dts/am33xx.dtsi" 2
  19. # 1 "./arch/arm/dts/skeleton.dtsi" 1
  20. / {
  21. #address-cells = <1>;
  22. #size-cells = <1>;
  23. chosen { };
  24. aliases { };
  25. memory { device_type = "memory"; reg = <0 0>; };
  26. };
  27. # 15 "./arch/arm/dts/am33xx.dtsi" 2
  28. / {
  29. compatible = "ti,am33xx";
  30. interrupt-parent = <&intc>;
  31. aliases {
  32. i2c0 = &i2c0;
  33. i2c1 = &i2c1;
  34. i2c2 = &i2c2;
  35. serial0 = &uart0;
  36. serial1 = &uart1;
  37. serial2 = &uart2;
  38. serial3 = &uart3;
  39. serial4 = &uart4;
  40. serial5 = &uart5;
  41. d_can0 = &dcan0;
  42. d_can1 = &dcan1;
  43. usb0 = &usb0;
  44. usb1 = &usb1;
  45. phy0 = &usb0_phy;
  46. phy1 = &usb1_phy;
  47. ethernet0 = &cpsw_emac0;
  48. ethernet1 = &cpsw_emac1;
  49. };
  50. cpus {
  51. #address-cells = <1>;
  52. #size-cells = <0>;
  53. cpu@0 {
  54. compatible = "arm,cortex-a8";
  55. device_type = "cpu";
  56. reg = <0>;
  57. operating-points = <
  58. 720000 1285000
  59. 600000 1225000
  60. 500000 1125000
  61. 275000 1125000
  62. >;
  63. voltage-tolerance = <2>;
  64. clocks = <&dpll_mpu_ck>;
  65. clock-names = "cpu";
  66. clock-latency = <300000>;
  67. };
  68. };
  69. pmu {
  70. compatible = "arm,cortex-a8-pmu";
  71. interrupts = <3>;
  72. };
  73. soc {
  74. compatible = "ti,omap-infra";
  75. mpu {
  76. compatible = "ti,omap3-mpu";
  77. ti,hwmods = "mpu";
  78. };
  79. };
  80. # 93 "./arch/arm/dts/am33xx.dtsi"
  81. ocp {
  82. compatible = "simple-bus";
  83. #address-cells = <1>;
  84. #size-cells = <1>;
  85. ranges;
  86. ti,hwmods = "l3_main";
  87. l4_wkup: l4_wkup@44c00000 {
  88. compatible = "ti,am3-l4-wkup", "simple-bus";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. ranges = <0 0x44c00000 0x280000>;
  92. prcm: prcm@200000 {
  93. compatible = "ti,am3-prcm";
  94. reg = <0x200000 0x4000>;
  95. prcm_clocks: clocks {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. };
  99. prcm_clockdomains: clockdomains {
  100. };
  101. };
  102. scm: scm@210000 {
  103. compatible = "ti,am3-scm", "simple-bus";
  104. reg = <0x210000 0x2000>;
  105. #address-cells = <1>;
  106. #size-cells = <1>;
  107. ranges = <0 0x210000 0x2000>;
  108. am33xx_pinmux: pinmux@800 {
  109. compatible = "pinctrl-single";
  110. reg = <0x800 0x238>;
  111. #address-cells = <1>;
  112. #size-cells = <0>;
  113. pinctrl-single,register-width = <32>;
  114. pinctrl-single,function-mask = <0x7f>;
  115. };
  116. scm_conf: scm_conf@0 {
  117. compatible = "syscon";
  118. reg = <0x0 0x800>;
  119. #address-cells = <1>;
  120. #size-cells = <1>;
  121. scm_clocks: clocks {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. };
  125. };
  126. scm_clockdomains: clockdomains {
  127. };
  128. };
  129. };
  130. intc: interrupt-controller@48200000 {
  131. compatible = "ti,am33xx-intc";
  132. interrupt-controller;
  133. #interrupt-cells = <1>;
  134. reg = <0x48200000 0x1000>;
  135. };
  136. edma: edma@49000000 {
  137. compatible = "ti,edma3";
  138. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  139. reg = <0x49000000 0x10000>,
  140. <0x44e10f90 0x40>;
  141. interrupts = <12 13 14>;
  142. #dma-cells = <1>;
  143. };
  144. gpio0: gpio@44e07000 {
  145. compatible = "ti,omap4-gpio";
  146. ti,hwmods = "gpio1";
  147. gpio-controller;
  148. #gpio-cells = <2>;
  149. interrupt-controller;
  150. #interrupt-cells = <2>;
  151. reg = <0x44e07000 0x1000>;
  152. interrupts = <96>;
  153. };
  154. gpio1: gpio@4804c000 {
  155. compatible = "ti,omap4-gpio";
  156. ti,hwmods = "gpio2";
  157. gpio-controller;
  158. #gpio-cells = <2>;
  159. interrupt-controller;
  160. #interrupt-cells = <2>;
  161. reg = <0x4804c000 0x1000>;
  162. interrupts = <98>;
  163. };
  164. gpio2: gpio@481ac000 {
  165. compatible = "ti,omap4-gpio";
  166. ti,hwmods = "gpio3";
  167. gpio-controller;
  168. #gpio-cells = <2>;
  169. interrupt-controller;
  170. #interrupt-cells = <2>;
  171. reg = <0x481ac000 0x1000>;
  172. interrupts = <32>;
  173. };
  174. gpio3: gpio@481ae000 {
  175. compatible = "ti,omap4-gpio";
  176. ti,hwmods = "gpio4";
  177. gpio-controller;
  178. #gpio-cells = <2>;
  179. interrupt-controller;
  180. #interrupt-cells = <2>;
  181. reg = <0x481ae000 0x1000>;
  182. interrupts = <62>;
  183. };
  184. uart0: serial@44e09000 {
  185. compatible = "ti,omap3-uart";
  186. ti,hwmods = "uart1";
  187. clock-frequency = <48000000>;
  188. reg = <0x44e09000 0x2000>;
  189. reg-shift = <2>;
  190. interrupts = <72>;
  191. status = "disabled";
  192. dmas = <&edma 26>, <&edma 27>;
  193. dma-names = "tx", "rx";
  194. };
  195. uart1: serial@48022000 {
  196. compatible = "ti,omap3-uart";
  197. ti,hwmods = "uart2";
  198. clock-frequency = <48000000>;
  199. reg = <0x48022000 0x2000>;
  200. reg-shift = <2>;
  201. interrupts = <73>;
  202. status = "disabled";
  203. dmas = <&edma 28>, <&edma 29>;
  204. dma-names = "tx", "rx";
  205. };
  206. uart2: serial@48024000 {
  207. compatible = "ti,omap3-uart";
  208. ti,hwmods = "uart3";
  209. clock-frequency = <48000000>;
  210. reg = <0x48024000 0x2000>;
  211. reg-shift = <2>;
  212. interrupts = <74>;
  213. status = "disabled";
  214. dmas = <&edma 30>, <&edma 31>;
  215. dma-names = "tx", "rx";
  216. };
  217. uart3: serial@481a6000 {
  218. compatible = "ti,omap3-uart";
  219. ti,hwmods = "uart4";
  220. clock-frequency = <48000000>;
  221. reg = <0x481a6000 0x2000>;
  222. reg-shift = <2>;
  223. interrupts = <44>;
  224. status = "disabled";
  225. };
  226. uart4: serial@481a8000 {
  227. compatible = "ti,omap3-uart";
  228. ti,hwmods = "uart5";
  229. clock-frequency = <48000000>;
  230. reg = <0x481a8000 0x2000>;
  231. reg-shift = <2>;
  232. interrupts = <45>;
  233. status = "disabled";
  234. };
  235. uart5: serial@481aa000 {
  236. compatible = "ti,omap3-uart";
  237. ti,hwmods = "uart6";
  238. clock-frequency = <48000000>;
  239. reg = <0x481aa000 0x2000>;
  240. reg-shift = <2>;
  241. interrupts = <46>;
  242. status = "disabled";
  243. };
  244. i2c0: i2c@44e0b000 {
  245. compatible = "ti,omap4-i2c";
  246. #address-cells = <1>;
  247. #size-cells = <0>;
  248. ti,hwmods = "i2c1";
  249. reg = <0x44e0b000 0x1000>;
  250. interrupts = <70>;
  251. status = "disabled";
  252. };
  253. i2c1: i2c@4802a000 {
  254. compatible = "ti,omap4-i2c";
  255. #address-cells = <1>;
  256. #size-cells = <0>;
  257. ti,hwmods = "i2c2";
  258. reg = <0x4802a000 0x1000>;
  259. interrupts = <71>;
  260. status = "disabled";
  261. };
  262. i2c2: i2c@4819c000 {
  263. compatible = "ti,omap4-i2c";
  264. #address-cells = <1>;
  265. #size-cells = <0>;
  266. ti,hwmods = "i2c3";
  267. reg = <0x4819c000 0x1000>;
  268. interrupts = <30>;
  269. status = "disabled";
  270. };
  271. mmc1: mmc@48060000 {
  272. compatible = "ti,omap4-hsmmc";
  273. ti,hwmods = "mmc1";
  274. ti,dual-volt;
  275. ti,needs-special-reset;
  276. ti,needs-special-hs-handling;
  277. dmas = <&edma 24
  278. &edma 25>;
  279. dma-names = "tx", "rx";
  280. interrupts = <64>;
  281. interrupt-parent = <&intc>;
  282. reg = <0x48060000 0x1000>;
  283. status = "disabled";
  284. };
  285. mmc2: mmc@481d8000 {
  286. compatible = "ti,omap4-hsmmc";
  287. ti,hwmods = "mmc2";
  288. ti,needs-special-reset;
  289. dmas = <&edma 2
  290. &edma 3>;
  291. dma-names = "tx", "rx";
  292. interrupts = <28>;
  293. interrupt-parent = <&intc>;
  294. reg = <0x481d8000 0x1000>;
  295. status = "disabled";
  296. };
  297. mmc3: mmc@47810000 {
  298. compatible = "ti,omap4-hsmmc";
  299. ti,hwmods = "mmc3";
  300. ti,needs-special-reset;
  301. interrupts = <29>;
  302. interrupt-parent = <&intc>;
  303. reg = <0x47810000 0x1000>;
  304. status = "disabled";
  305. };
  306. hwspinlock: spinlock@480ca000 {
  307. compatible = "ti,omap4-hwspinlock";
  308. reg = <0x480ca000 0x1000>;
  309. ti,hwmods = "spinlock";
  310. #hwlock-cells = <1>;
  311. };
  312. wdt2: wdt@44e35000 {
  313. compatible = "ti,omap3-wdt";
  314. ti,hwmods = "wd_timer2";
  315. reg = <0x44e35000 0x1000>;
  316. interrupts = <91>;
  317. };
  318. dcan0: can@481cc000 {
  319. compatible = "ti,am3352-d_can";
  320. ti,hwmods = "d_can0";
  321. reg = <0x481cc000 0x2000>;
  322. clocks = <&dcan0_fck>;
  323. clock-names = "fck";
  324. syscon-raminit = <&scm_conf 0x644 0>;
  325. interrupts = <52>;
  326. status = "disabled";
  327. };
  328. dcan1: can@481d0000 {
  329. compatible = "ti,am3352-d_can";
  330. ti,hwmods = "d_can1";
  331. reg = <0x481d0000 0x2000>;
  332. clocks = <&dcan1_fck>;
  333. clock-names = "fck";
  334. syscon-raminit = <&scm_conf 0x644 1>;
  335. interrupts = <55>;
  336. status = "disabled";
  337. };
  338. mailbox: mailbox@480C8000 {
  339. compatible = "ti,omap4-mailbox";
  340. reg = <0x480C8000 0x200>;
  341. interrupts = <77>;
  342. ti,hwmods = "mailbox";
  343. #mbox-cells = <1>;
  344. ti,mbox-num-users = <4>;
  345. ti,mbox-num-fifos = <8>;
  346. mbox_wkupm3: wkup_m3 {
  347. ti,mbox-tx = <0 0 0>;
  348. ti,mbox-rx = <0 0 3>;
  349. };
  350. };
  351. timer1: timer@44e31000 {
  352. compatible = "ti,am335x-timer-1ms";
  353. reg = <0x44e31000 0x400>;
  354. interrupts = <67>;
  355. ti,hwmods = "timer1";
  356. ti,timer-alwon;
  357. };
  358. timer2: timer@48040000 {
  359. compatible = "ti,am335x-timer";
  360. reg = <0x48040000 0x400>;
  361. interrupts = <68>;
  362. ti,hwmods = "timer2";
  363. };
  364. timer3: timer@48042000 {
  365. compatible = "ti,am335x-timer";
  366. reg = <0x48042000 0x400>;
  367. interrupts = <69>;
  368. ti,hwmods = "timer3";
  369. };
  370. timer4: timer@48044000 {
  371. compatible = "ti,am335x-timer";
  372. reg = <0x48044000 0x400>;
  373. interrupts = <92>;
  374. ti,hwmods = "timer4";
  375. ti,timer-pwm;
  376. };
  377. timer5: timer@48046000 {
  378. compatible = "ti,am335x-timer";
  379. reg = <0x48046000 0x400>;
  380. interrupts = <93>;
  381. ti,hwmods = "timer5";
  382. ti,timer-pwm;
  383. };
  384. timer6: timer@48048000 {
  385. compatible = "ti,am335x-timer";
  386. reg = <0x48048000 0x400>;
  387. interrupts = <94>;
  388. ti,hwmods = "timer6";
  389. ti,timer-pwm;
  390. };
  391. timer7: timer@4804a000 {
  392. compatible = "ti,am335x-timer";
  393. reg = <0x4804a000 0x400>;
  394. interrupts = <95>;
  395. ti,hwmods = "timer7";
  396. ti,timer-pwm;
  397. };
  398. rtc: rtc@44e3e000 {
  399. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  400. reg = <0x44e3e000 0x1000>;
  401. interrupts = <75
  402. 76>;
  403. ti,hwmods = "rtc";
  404. };
  405. spi0: spi@48030000 {
  406. compatible = "ti,omap4-mcspi";
  407. #address-cells = <1>;
  408. #size-cells = <0>;
  409. reg = <0x48030000 0x400>;
  410. interrupts = <65>;
  411. ti,spi-num-cs = <2>;
  412. ti,hwmods = "spi0";
  413. dmas = <&edma 16
  414. &edma 17
  415. &edma 18
  416. &edma 19>;
  417. dma-names = "tx0", "rx0", "tx1", "rx1";
  418. status = "disabled";
  419. };
  420. spi1: spi@481a0000 {
  421. compatible = "ti,omap4-mcspi";
  422. #address-cells = <1>;
  423. #size-cells = <0>;
  424. reg = <0x481a0000 0x400>;
  425. interrupts = <125>;
  426. ti,spi-num-cs = <2>;
  427. ti,hwmods = "spi1";
  428. dmas = <&edma 42
  429. &edma 43
  430. &edma 44
  431. &edma 45>;
  432. dma-names = "tx0", "rx0", "tx1", "rx1";
  433. status = "disabled";
  434. };
  435. usb: usb@47400000 {
  436. compatible = "ti,am33xx-usb";
  437. reg = <0x47400000 0x1000>;
  438. ranges;
  439. #address-cells = <1>;
  440. #size-cells = <1>;
  441. ti,hwmods = "usb_otg_hs";
  442. status = "disabled";
  443. usb_ctrl_mod: control@44e10620 {
  444. compatible = "ti,am335x-usb-ctrl-module";
  445. reg = <0x44e10620 0x10
  446. 0x44e10648 0x4>;
  447. reg-names = "phy_ctrl", "wakeup";
  448. status = "disabled";
  449. };
  450. usb0_phy: usb-phy@47401300 {
  451. compatible = "ti,am335x-usb-phy";
  452. reg = <0x47401300 0x100>;
  453. reg-names = "phy";
  454. status = "disabled";
  455. ti,ctrl_mod = <&usb_ctrl_mod>;
  456. };
  457. usb0: usb@47401000 {
  458. compatible = "ti,musb-am33xx";
  459. status = "disabled";
  460. reg = <0x47401400 0x400
  461. 0x47401000 0x200>;
  462. reg-names = "mc", "control";
  463. interrupts = <18>;
  464. interrupt-names = "mc";
  465. dr_mode = "otg";
  466. mentor,multipoint = <1>;
  467. mentor,num-eps = <16>;
  468. mentor,ram-bits = <12>;
  469. mentor,power = <500>;
  470. phys = <&usb0_phy>;
  471. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  472. &cppi41dma 2 0 &cppi41dma 3 0
  473. &cppi41dma 4 0 &cppi41dma 5 0
  474. &cppi41dma 6 0 &cppi41dma 7 0
  475. &cppi41dma 8 0 &cppi41dma 9 0
  476. &cppi41dma 10 0 &cppi41dma 11 0
  477. &cppi41dma 12 0 &cppi41dma 13 0
  478. &cppi41dma 14 0 &cppi41dma 0 1
  479. &cppi41dma 1 1 &cppi41dma 2 1
  480. &cppi41dma 3 1 &cppi41dma 4 1
  481. &cppi41dma 5 1 &cppi41dma 6 1
  482. &cppi41dma 7 1 &cppi41dma 8 1
  483. &cppi41dma 9 1 &cppi41dma 10 1
  484. &cppi41dma 11 1 &cppi41dma 12 1
  485. &cppi41dma 13 1 &cppi41dma 14 1>;
  486. dma-names =
  487. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  488. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  489. "rx14", "rx15",
  490. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  491. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  492. "tx14", "tx15";
  493. };
  494. usb1_phy: usb-phy@47401b00 {
  495. compatible = "ti,am335x-usb-phy";
  496. reg = <0x47401b00 0x100>;
  497. reg-names = "phy";
  498. status = "disabled";
  499. ti,ctrl_mod = <&usb_ctrl_mod>;
  500. };
  501. usb1: usb@47401800 {
  502. compatible = "ti,musb-am33xx";
  503. status = "disabled";
  504. reg = <0x47401c00 0x400
  505. 0x47401800 0x200>;
  506. reg-names = "mc", "control";
  507. interrupts = <19>;
  508. interrupt-names = "mc";
  509. dr_mode = "otg";
  510. mentor,multipoint = <1>;
  511. mentor,num-eps = <16>;
  512. mentor,ram-bits = <12>;
  513. mentor,power = <500>;
  514. phys = <&usb1_phy>;
  515. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  516. &cppi41dma 17 0 &cppi41dma 18 0
  517. &cppi41dma 19 0 &cppi41dma 20 0
  518. &cppi41dma 21 0 &cppi41dma 22 0
  519. &cppi41dma 23 0 &cppi41dma 24 0
  520. &cppi41dma 25 0 &cppi41dma 26 0
  521. &cppi41dma 27 0 &cppi41dma 28 0
  522. &cppi41dma 29 0 &cppi41dma 15 1
  523. &cppi41dma 16 1 &cppi41dma 17 1
  524. &cppi41dma 18 1 &cppi41dma 19 1
  525. &cppi41dma 20 1 &cppi41dma 21 1
  526. &cppi41dma 22 1 &cppi41dma 23 1
  527. &cppi41dma 24 1 &cppi41dma 25 1
  528. &cppi41dma 26 1 &cppi41dma 27 1
  529. &cppi41dma 28 1 &cppi41dma 29 1>;
  530. dma-names =
  531. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  532. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  533. "rx14", "rx15",
  534. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  535. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  536. "tx14", "tx15";
  537. };
  538. cppi41dma: dma-controller@47402000 {
  539. compatible = "ti,am3359-cppi41";
  540. reg = <0x47400000 0x1000
  541. 0x47402000 0x1000
  542. 0x47403000 0x1000
  543. 0x47404000 0x4000>;
  544. reg-names = "glue", "controller", "scheduler", "queuemgr";
  545. interrupts = <17>;
  546. interrupt-names = "glue";
  547. #dma-cells = <2>;
  548. #dma-channels = <30>;
  549. #dma-requests = <256>;
  550. status = "disabled";
  551. };
  552. };
  553. epwmss0: epwmss@48300000 {
  554. compatible = "ti,am33xx-pwmss";
  555. reg = <0x48300000 0x10>;
  556. ti,hwmods = "epwmss0";
  557. #address-cells = <1>;
  558. #size-cells = <1>;
  559. status = "disabled";
  560. ranges = <0x48300100 0x48300100 0x80
  561. 0x48300180 0x48300180 0x80
  562. 0x48300200 0x48300200 0x80>;
  563. ecap0: ecap@48300100 {
  564. compatible = "ti,am33xx-ecap";
  565. #pwm-cells = <3>;
  566. reg = <0x48300100 0x80>;
  567. interrupts = <31>;
  568. interrupt-names = "ecap0";
  569. ti,hwmods = "ecap0";
  570. status = "disabled";
  571. };
  572. ehrpwm0: ehrpwm@48300200 {
  573. compatible = "ti,am33xx-ehrpwm";
  574. #pwm-cells = <3>;
  575. reg = <0x48300200 0x80>;
  576. ti,hwmods = "ehrpwm0";
  577. status = "disabled";
  578. };
  579. };
  580. epwmss1: epwmss@48302000 {
  581. compatible = "ti,am33xx-pwmss";
  582. reg = <0x48302000 0x10>;
  583. ti,hwmods = "epwmss1";
  584. #address-cells = <1>;
  585. #size-cells = <1>;
  586. status = "disabled";
  587. ranges = <0x48302100 0x48302100 0x80
  588. 0x48302180 0x48302180 0x80
  589. 0x48302200 0x48302200 0x80>;
  590. ecap1: ecap@48302100 {
  591. compatible = "ti,am33xx-ecap";
  592. #pwm-cells = <3>;
  593. reg = <0x48302100 0x80>;
  594. interrupts = <47>;
  595. interrupt-names = "ecap1";
  596. ti,hwmods = "ecap1";
  597. status = "disabled";
  598. };
  599. ehrpwm1: ehrpwm@48302200 {
  600. compatible = "ti,am33xx-ehrpwm";
  601. #pwm-cells = <3>;
  602. reg = <0x48302200 0x80>;
  603. ti,hwmods = "ehrpwm1";
  604. status = "disabled";
  605. };
  606. };
  607. epwmss2: epwmss@48304000 {
  608. compatible = "ti,am33xx-pwmss";
  609. reg = <0x48304000 0x10>;
  610. ti,hwmods = "epwmss2";
  611. #address-cells = <1>;
  612. #size-cells = <1>;
  613. status = "disabled";
  614. ranges = <0x48304100 0x48304100 0x80
  615. 0x48304180 0x48304180 0x80
  616. 0x48304200 0x48304200 0x80>;
  617. ecap2: ecap@48304100 {
  618. compatible = "ti,am33xx-ecap";
  619. #pwm-cells = <3>;
  620. reg = <0x48304100 0x80>;
  621. interrupts = <61>;
  622. interrupt-names = "ecap2";
  623. ti,hwmods = "ecap2";
  624. status = "disabled";
  625. };
  626. ehrpwm2: ehrpwm@48304200 {
  627. compatible = "ti,am33xx-ehrpwm";
  628. #pwm-cells = <3>;
  629. reg = <0x48304200 0x80>;
  630. ti,hwmods = "ehrpwm2";
  631. status = "disabled";
  632. };
  633. };
  634. mac: ethernet@4a100000 {
  635. compatible = "ti,cpsw";
  636. ti,hwmods = "cpgmac0";
  637. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  638. clock-names = "fck", "cpts";
  639. cpdma_channels = <8>;
  640. ale_entries = <1024>;
  641. bd_ram_size = <0x2000>;
  642. no_bd_ram = <0>;
  643. rx_descs = <64>;
  644. mac_control = <0x20>;
  645. slaves = <2>;
  646. active_slave = <0>;
  647. cpts_clock_mult = <0x80000000>;
  648. cpts_clock_shift = <29>;
  649. reg = <0x4a100000 0x800
  650. 0x4a101200 0x100>;
  651. #address-cells = <1>;
  652. #size-cells = <1>;
  653. interrupt-parent = <&intc>;
  654. interrupts = <40 41 42 43>;
  655. ranges;
  656. syscon = <&scm_conf>;
  657. status = "disabled";
  658. davinci_mdio: mdio@4a101000 {
  659. compatible = "ti,davinci_mdio";
  660. #address-cells = <1>;
  661. #size-cells = <0>;
  662. ti,hwmods = "davinci_mdio";
  663. bus_freq = <1000000>;
  664. reg = <0x4a101000 0x100>;
  665. status = "disabled";
  666. };
  667. cpsw_emac0: slave@4a100200 {
  668. mac-address = [ 00 00 00 00 00 00 ];
  669. };
  670. cpsw_emac1: slave@4a100300 {
  671. mac-address = [ 00 00 00 00 00 00 ];
  672. };
  673. phy_sel: cpsw-phy-sel@44e10650 {
  674. compatible = "ti,am3352-cpsw-phy-sel";
  675. reg= <0x44e10650 0x4>;
  676. reg-names = "gmii-sel";
  677. };
  678. };
  679. ocmcram: ocmcram@40300000 {
  680. compatible = "mmio-sram";
  681. reg = <0x40300000 0x10000>;
  682. };
  683. wkup_m3: wkup_m3@44d00000 {
  684. compatible = "ti,am3353-wkup-m3";
  685. reg = <0x44d00000 0x4000
  686. 0x44d80000 0x2000>;
  687. ti,hwmods = "wkup_m3";
  688. ti,no-reset-on-init;
  689. };
  690. elm: elm@48080000 {
  691. compatible = "ti,am3352-elm";
  692. reg = <0x48080000 0x2000>;
  693. interrupts = <4>;
  694. ti,hwmods = "elm";
  695. status = "disabled";
  696. };
  697. lcdc: lcdc@4830e000 {
  698. compatible = "ti,am33xx-tilcdc";
  699. reg = <0x4830e000 0x1000>;
  700. interrupt-parent = <&intc>;
  701. interrupts = <36>;
  702. ti,hwmods = "lcdc";
  703. status = "disabled";
  704. };
  705. tscadc: tscadc@44e0d000 {
  706. compatible = "ti,am3359-tscadc";
  707. reg = <0x44e0d000 0x1000>;
  708. interrupt-parent = <&intc>;
  709. interrupts = <16>;
  710. ti,hwmods = "adc_tsc";
  711. status = "disabled";
  712. tsc {
  713. compatible = "ti,am3359-tsc";
  714. };
  715. am335x_adc: adc {
  716. #io-channel-cells = <1>;
  717. compatible = "ti,am3359-adc";
  718. };
  719. };
  720. gpmc: gpmc@50000000 {
  721. compatible = "ti,am3352-gpmc";
  722. ti,hwmods = "gpmc";
  723. ti,no-idle-on-init;
  724. reg = <0x50000000 0x2000>;
  725. interrupts = <100>;
  726. gpmc,num-cs = <7>;
  727. gpmc,num-waitpins = <2>;
  728. #address-cells = <2>;
  729. #size-cells = <1>;
  730. status = "disabled";
  731. };
  732. sham: sham@53100000 {
  733. compatible = "ti,omap4-sham";
  734. ti,hwmods = "sham";
  735. reg = <0x53100000 0x200>;
  736. interrupts = <109>;
  737. dmas = <&edma 36>;
  738. dma-names = "rx";
  739. };
  740. aes: aes@53500000 {
  741. compatible = "ti,omap4-aes";
  742. ti,hwmods = "aes";
  743. reg = <0x53500000 0xa0>;
  744. interrupts = <103>;
  745. dmas = <&edma 6>,
  746. <&edma 5>;
  747. dma-names = "tx", "rx";
  748. };
  749. mcasp0: mcasp@48038000 {
  750. compatible = "ti,am33xx-mcasp-audio";
  751. ti,hwmods = "mcasp0";
  752. reg = <0x48038000 0x2000>,
  753. <0x46000000 0x400000>;
  754. reg-names = "mpu", "dat";
  755. interrupts = <80>, <81>;
  756. interrupt-names = "tx", "rx";
  757. status = "disabled";
  758. dmas = <&edma 8>,
  759. <&edma 9>;
  760. dma-names = "tx", "rx";
  761. };
  762. mcasp1: mcasp@4803C000 {
  763. compatible = "ti,am33xx-mcasp-audio";
  764. ti,hwmods = "mcasp1";
  765. reg = <0x4803C000 0x2000>,
  766. <0x46400000 0x400000>;
  767. reg-names = "mpu", "dat";
  768. interrupts = <82>, <83>;
  769. interrupt-names = "tx", "rx";
  770. status = "disabled";
  771. dmas = <&edma 10>,
  772. <&edma 11>;
  773. dma-names = "tx", "rx";
  774. };
  775. rng: rng@48310000 {
  776. compatible = "ti,omap4-rng";
  777. ti,hwmods = "rng";
  778. reg = <0x48310000 0x2000>;
  779. interrupts = <111>;
  780. };
  781. };
  782. };
  783. /include/ "am33xx-clocks.dtsi"
  784. # 17 "<stdin>" 2
  785. # 1 "./arch/arm/dts/include/dt-bindings/pwm/pwm.h" 1
  786. # 18 "<stdin>" 2
  787. # 1 "./arch/arm/dts/include/dt-bindings/interrupt-controller/irq.h" 1
  788. # 19 "<stdin>" 2
  789. / {
  790. model = "TI AM335x EVM-SK";
  791. compatible = "ti,am335x-evmsk", "ti,am33xx";
  792. chosen {
  793. stdout-path = &uart0;
  794. tick-timer = &timer2;
  795. };
  796. cpus {
  797. cpu@0 {
  798. cpu0-supply = <&vdd1_reg>;
  799. };
  800. };
  801. memory {
  802. device_type = "memory";
  803. reg = <0x80000000 0x10000000>;
  804. };
  805. vbat: fixedregulator@0 {
  806. compatible = "regulator-fixed";
  807. regulator-name = "vbat";
  808. regulator-min-microvolt = <5000000>;
  809. regulator-max-microvolt = <5000000>;
  810. regulator-boot-on;
  811. };
  812. lis3_reg: fixedregulator@1 {
  813. compatible = "regulator-fixed";
  814. regulator-name = "lis3_reg";
  815. regulator-boot-on;
  816. };
  817. wl12xx_vmmc: fixedregulator@2 {
  818. pinctrl-names = "default";
  819. pinctrl-0 = <&wl12xx_gpio>;
  820. compatible = "regulator-fixed";
  821. regulator-name = "vwl1271";
  822. regulator-min-microvolt = <1800000>;
  823. regulator-max-microvolt = <1800000>;
  824. gpio = <&gpio1 29 0>;
  825. startup-delay-us = <70000>;
  826. enable-active-high;
  827. };
  828. vtt_fixed: fixedregulator@3 {
  829. compatible = "regulator-fixed";
  830. regulator-name = "vtt";
  831. regulator-min-microvolt = <1500000>;
  832. regulator-max-microvolt = <1500000>;
  833. gpio = <&gpio0 7 0>;
  834. regulator-always-on;
  835. regulator-boot-on;
  836. enable-active-high;
  837. };
  838. leds {
  839. pinctrl-names = "default";
  840. pinctrl-0 = <&user_leds_s0>;
  841. compatible = "gpio-leds";
  842. led@1 {
  843. label = "evmsk:green:usr0";
  844. gpios = <&gpio1 4 0>;
  845. default-state = "off";
  846. };
  847. led@2 {
  848. label = "evmsk:green:usr1";
  849. gpios = <&gpio1 5 0>;
  850. default-state = "off";
  851. };
  852. led@3 {
  853. label = "evmsk:green:mmc0";
  854. gpios = <&gpio1 6 0>;
  855. linux,default-trigger = "mmc0";
  856. default-state = "off";
  857. };
  858. led@4 {
  859. label = "evmsk:green:heartbeat";
  860. gpios = <&gpio1 7 0>;
  861. linux,default-trigger = "heartbeat";
  862. default-state = "off";
  863. };
  864. };
  865. gpio_buttons: gpio_buttons@0 {
  866. compatible = "gpio-keys";
  867. #address-cells = <1>;
  868. #size-cells = <0>;
  869. switch@1 {
  870. label = "button0";
  871. linux,code = <0x100>;
  872. gpios = <&gpio2 3 0>;
  873. };
  874. switch@2 {
  875. label = "button1";
  876. linux,code = <0x101>;
  877. gpios = <&gpio2 2 0>;
  878. };
  879. switch@3 {
  880. label = "button2";
  881. linux,code = <0x102>;
  882. gpios = <&gpio0 30 0>;
  883. wakeup-source;
  884. };
  885. switch@4 {
  886. label = "button3";
  887. linux,code = <0x103>;
  888. gpios = <&gpio2 5 0>;
  889. };
  890. };
  891. backlight {
  892. compatible = "pwm-backlight";
  893. pwms = <&ecap2 0 50000 (1 << 0)>;
  894. brightness-levels = <0 58 61 66 75 90 125 170 255>;
  895. default-brightness-level = <8>;
  896. };
  897. sound {
  898. compatible = "simple-audio-card";
  899. simple-audio-card,name = "AM335x-EVMSK";
  900. simple-audio-card,widgets =
  901. "Headphone", "Headphone Jack";
  902. simple-audio-card,routing =
  903. "Headphone Jack", "HPLOUT",
  904. "Headphone Jack", "HPROUT";
  905. simple-audio-card,format = "dsp_b";
  906. simple-audio-card,bitclock-master = <&sound_master>;
  907. simple-audio-card,frame-master = <&sound_master>;
  908. simple-audio-card,bitclock-inversion;
  909. simple-audio-card,cpu {
  910. sound-dai = <&mcasp1>;
  911. };
  912. sound_master: simple-audio-card,codec {
  913. sound-dai = <&tlv320aic3106>;
  914. system-clock-frequency = <24000000>;
  915. };
  916. };
  917. panel {
  918. compatible = "ti,tilcdc,panel";
  919. pinctrl-names = "default", "sleep";
  920. pinctrl-0 = <&lcd_pins_default>;
  921. pinctrl-1 = <&lcd_pins_sleep>;
  922. status = "okay";
  923. panel-info {
  924. ac-bias = <255>;
  925. ac-bias-intrpt = <0>;
  926. dma-burst-sz = <16>;
  927. bpp = <32>;
  928. fdd = <0x80>;
  929. sync-edge = <0>;
  930. sync-ctrl = <1>;
  931. raster-order = <0>;
  932. fifo-th = <0>;
  933. };
  934. display-timings {
  935. 480x272 {
  936. hactive = <480>;
  937. vactive = <272>;
  938. hback-porch = <43>;
  939. hfront-porch = <8>;
  940. hsync-len = <4>;
  941. vback-porch = <12>;
  942. vfront-porch = <4>;
  943. vsync-len = <10>;
  944. clock-frequency = <9000000>;
  945. hsync-active = <0>;
  946. vsync-active = <0>;
  947. };
  948. };
  949. };
  950. };
  951. &am33xx_pinmux {
  952. pinctrl-names = "default";
  953. pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
  954. lcd_pins_default: lcd_pins_default {
  955. pinctrl-single,pins = <
  956. ((((0x820)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  957. ((((0x824)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  958. ((((0x828)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  959. ((((0x82c)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  960. ((((0x830)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  961. ((((0x834)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  962. ((((0x838)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  963. ((((0x83c)) & 0xffff) - (0x0800)) (((1 << 3)) | 1)
  964. ((((0x8a0)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  965. ((((0x8a4)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  966. ((((0x8a8)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  967. ((((0x8ac)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  968. ((((0x8b0)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  969. ((((0x8b4)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  970. ((((0x8b8)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  971. ((((0x8bc)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  972. ((((0x8c0)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  973. ((((0x8c4)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  974. ((((0x8c8)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  975. ((((0x8cc)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  976. ((((0x8d0)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  977. ((((0x8d4)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  978. ((((0x8d8)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  979. ((((0x8dc)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  980. ((((0x8e0)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  981. ((((0x8e4)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  982. ((((0x8e8)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  983. ((((0x8ec)) & 0xffff) - (0x0800)) (((1 << 3)) | 0)
  984. >;
  985. };
  986. lcd_pins_sleep: lcd_pins_sleep {
  987. pinctrl-single,pins = <
  988. ((((0x820)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  989. ((((0x824)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  990. ((((0x828)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  991. ((((0x82c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  992. ((((0x830)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  993. ((((0x834)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  994. ((((0x838)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  995. ((((0x83c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  996. ((((0x8a0)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  997. ((((0x8a4)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  998. ((((0x8a8)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  999. ((((0x8ac)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1000. ((((0x8b0)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1001. ((((0x8b4)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1002. ((((0x8b8)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1003. ((((0x8bc)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1004. ((((0x8c0)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1005. ((((0x8c4)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1006. ((((0x8c8)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1007. ((((0x8cc)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1008. ((((0x8d0)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1009. ((((0x8d4)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1010. ((((0x8d8)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1011. ((((0x8dc)) & 0xffff) - (0x0800)) ((1 << 3) | 7)
  1012. ((((0x8e0)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1013. ((((0x8e4)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1014. ((((0x8e8)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1015. ((((0x8ec)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1016. >;
  1017. };
  1018. user_leds_s0: user_leds_s0 {
  1019. pinctrl-single,pins = <
  1020. ((((0x810)) & 0xffff) - (0x0800)) (0 | 7)
  1021. ((((0x814)) & 0xffff) - (0x0800)) (0 | 7)
  1022. ((((0x818)) & 0xffff) - (0x0800)) (0 | 7)
  1023. ((((0x81c)) & 0xffff) - (0x0800)) (0 | 7)
  1024. >;
  1025. };
  1026. gpio_keys_s0: gpio_keys_s0 {
  1027. pinctrl-single,pins = <
  1028. ((((0x894)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1029. ((((0x890)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1030. ((((0x870)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1031. ((((0x89c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1032. >;
  1033. };
  1034. i2c0_pins: pinmux_i2c0_pins {
  1035. pinctrl-single,pins = <
  1036. ((((0x988)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 0)
  1037. ((((0x98c)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 0)
  1038. >;
  1039. };
  1040. uart0_pins: pinmux_uart0_pins {
  1041. pinctrl-single,pins = <
  1042. ((((0x970)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 0)
  1043. ((((0x974)) & 0xffff) - (0x0800)) (0 | 0)
  1044. >;
  1045. };
  1046. clkout2_pin: pinmux_clkout2_pin {
  1047. pinctrl-single,pins = <
  1048. ((((0x9b4)) & 0xffff) - (0x0800)) (0 | 3)
  1049. >;
  1050. };
  1051. ecap2_pins: backlight_pins {
  1052. pinctrl-single,pins = <
  1053. ((((0x99c)) & 0xffff) - (0x0800)) (4)
  1054. >;
  1055. };
  1056. cpsw_default: cpsw_default {
  1057. pinctrl-single,pins = <
  1058. ((((0x914)) & 0xffff) - (0x0800)) (0 | 2)
  1059. ((((0x918)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1060. ((((0x91c)) & 0xffff) - (0x0800)) (0 | 2)
  1061. ((((0x920)) & 0xffff) - (0x0800)) (0 | 2)
  1062. ((((0x924)) & 0xffff) - (0x0800)) (0 | 2)
  1063. ((((0x928)) & 0xffff) - (0x0800)) (0 | 2)
  1064. ((((0x92c)) & 0xffff) - (0x0800)) (0 | 2)
  1065. ((((0x930)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1066. ((((0x934)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1067. ((((0x938)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1068. ((((0x93c)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1069. ((((0x940)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1070. ((((0x840)) & 0xffff) - (0x0800)) (0 | 2)
  1071. ((((0x844)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1072. ((((0x848)) & 0xffff) - (0x0800)) (0 | 2)
  1073. ((((0x84c)) & 0xffff) - (0x0800)) (0 | 2)
  1074. ((((0x850)) & 0xffff) - (0x0800)) (0 | 2)
  1075. ((((0x854)) & 0xffff) - (0x0800)) (0 | 2)
  1076. ((((0x858)) & 0xffff) - (0x0800)) (0 | 2)
  1077. ((((0x85c)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1078. ((((0x860)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1079. ((((0x864)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1080. ((((0x868)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1081. ((((0x86c)) & 0xffff) - (0x0800)) (((1 << 5)) | 2)
  1082. >;
  1083. };
  1084. cpsw_sleep: cpsw_sleep {
  1085. pinctrl-single,pins = <
  1086. ((((0x914)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1087. ((((0x918)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1088. ((((0x91c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1089. ((((0x920)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1090. ((((0x924)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1091. ((((0x928)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1092. ((((0x92c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1093. ((((0x930)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1094. ((((0x934)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1095. ((((0x938)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1096. ((((0x93c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1097. ((((0x940)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1098. ((((0x840)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1099. ((((0x844)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1100. ((((0x848)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1101. ((((0x84c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1102. ((((0x850)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1103. ((((0x854)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1104. ((((0x858)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1105. ((((0x85c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1106. ((((0x860)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1107. ((((0x864)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1108. ((((0x868)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1109. ((((0x86c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1110. >;
  1111. };
  1112. davinci_mdio_default: davinci_mdio_default {
  1113. pinctrl-single,pins = <
  1114. ((((0x948)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | (1 << 6) | 0)
  1115. ((((0x94c)) & 0xffff) - (0x0800)) (((1 << 4)) | 0)
  1116. >;
  1117. };
  1118. davinci_mdio_sleep: davinci_mdio_sleep {
  1119. pinctrl-single,pins = <
  1120. ((((0x948)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1121. ((((0x94c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1122. >;
  1123. };
  1124. mmc1_pins: pinmux_mmc1_pins {
  1125. pinctrl-single,pins = <
  1126. ((((0x960)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 3)) | 7)
  1127. >;
  1128. };
  1129. mcasp1_pins: mcasp1_pins {
  1130. pinctrl-single,pins = <
  1131. ((((0x90c)) & 0xffff) - (0x0800)) (((1 << 5)) | 4)
  1132. ((((0x910)) & 0xffff) - (0x0800)) (((1 << 5)) | 4)
  1133. ((((0x908)) & 0xffff) - (0x0800)) (0 | 4)
  1134. ((((0x944)) & 0xffff) - (0x0800)) (((1 << 5)) | 4)
  1135. >;
  1136. };
  1137. mcasp1_pins_sleep: mcasp1_pins_sleep {
  1138. pinctrl-single,pins = <
  1139. ((((0x90c)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1140. ((((0x910)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1141. ((((0x908)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1142. ((((0x944)) & 0xffff) - (0x0800)) (((1 << 5)) | 7)
  1143. >;
  1144. };
  1145. mmc2_pins: pinmux_mmc2_pins {
  1146. pinctrl-single,pins = <
  1147. ((((0x874)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 7)
  1148. ((((0x880)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 2)
  1149. ((((0x884)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 2)
  1150. ((((0x800)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 1)
  1151. ((((0x804)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 1)
  1152. ((((0x808)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 1)
  1153. ((((0x80c)) & 0xffff) - (0x0800)) (((1 << 5) | (1 << 4)) | 1)
  1154. >;
  1155. };
  1156. wl12xx_gpio: pinmux_wl12xx_gpio {
  1157. pinctrl-single,pins = <
  1158. ((((0x87c)) & 0xffff) - (0x0800)) (((1 << 4)) | 7)
  1159. >;
  1160. };
  1161. };
  1162. &uart0 {
  1163. pinctrl-names = "default";
  1164. pinctrl-0 = <&uart0_pins>;
  1165. status = "okay";
  1166. };
  1167. &i2c0 {
  1168. pinctrl-names = "default";
  1169. pinctrl-0 = <&i2c0_pins>;
  1170. status = "okay";
  1171. clock-frequency = <400000>;
  1172. tps: tps@2d {
  1173. reg = <0x2d>;
  1174. };
  1175. lis331dlh: lis331dlh@18 {
  1176. compatible = "st,lis331dlh", "st,lis3lv02d";
  1177. reg = <0x18>;
  1178. Vdd-supply = <&lis3_reg>;
  1179. Vdd_IO-supply = <&lis3_reg>;
  1180. st,click-single-x;
  1181. st,click-single-y;
  1182. st,click-single-z;
  1183. st,click-thresh-x = <10>;
  1184. st,click-thresh-y = <10>;
  1185. st,click-thresh-z = <10>;
  1186. st,irq1-click;
  1187. st,irq2-click;
  1188. st,wakeup-x-lo;
  1189. st,wakeup-x-hi;
  1190. st,wakeup-y-lo;
  1191. st,wakeup-y-hi;
  1192. st,wakeup-z-lo;
  1193. st,wakeup-z-hi;
  1194. st,min-limit-x = <120>;
  1195. st,min-limit-y = <120>;
  1196. st,min-limit-z = <140>;
  1197. st,max-limit-x = <550>;
  1198. st,max-limit-y = <550>;
  1199. st,max-limit-z = <750>;
  1200. };
  1201. tlv320aic3106: tlv320aic3106@1b {
  1202. #sound-dai-cells = <0>;
  1203. compatible = "ti,tlv320aic3106";
  1204. reg = <0x1b>;
  1205. status = "okay";
  1206. AVDD-supply = <&vaux2_reg>;
  1207. IOVDD-supply = <&vaux2_reg>;
  1208. DRVDD-supply = <&vaux2_reg>;
  1209. DVDD-supply = <&vbat>;
  1210. };
  1211. };
  1212. &usb {
  1213. status = "okay";
  1214. };
  1215. &usb_ctrl_mod {
  1216. status = "okay";
  1217. };
  1218. &usb0_phy {
  1219. status = "okay";
  1220. };
  1221. &usb1_phy {
  1222. status = "okay";
  1223. };
  1224. &usb0 {
  1225. status = "okay";
  1226. };
  1227. &usb1 {
  1228. status = "okay";
  1229. dr_mode = "host";
  1230. };
  1231. &cppi41dma {
  1232. status = "okay";
  1233. };
  1234. &epwmss2 {
  1235. status = "okay";
  1236. ecap2: ecap@48304100 {
  1237. status = "okay";
  1238. pinctrl-names = "default";
  1239. pinctrl-0 = <&ecap2_pins>;
  1240. };
  1241. };
  1242. # 1 "./arch/arm/dts/tps65910.dtsi" 1
  1243. # 14 "./arch/arm/dts/tps65910.dtsi"
  1244. &tps {
  1245. compatible = "ti,tps65910";
  1246. regulators {
  1247. #address-cells = <1>;
  1248. #size-cells = <0>;
  1249. vrtc_reg: regulator@0 {
  1250. reg = <0>;
  1251. regulator-compatible = "vrtc";
  1252. };
  1253. vio_reg: regulator@1 {
  1254. reg = <1>;
  1255. regulator-compatible = "vio";
  1256. };
  1257. vdd1_reg: regulator@2 {
  1258. reg = <2>;
  1259. regulator-compatible = "vdd1";
  1260. };
  1261. vdd2_reg: regulator@3 {
  1262. reg = <3>;
  1263. regulator-compatible = "vdd2";
  1264. };
  1265. vdd3_reg: regulator@4 {
  1266. reg = <4>;
  1267. regulator-compatible = "vdd3";
  1268. };
  1269. vdig1_reg: regulator@5 {
  1270. reg = <5>;
  1271. regulator-compatible = "vdig1";
  1272. };
  1273. vdig2_reg: regulator@6 {
  1274. reg = <6>;
  1275. regulator-compatible = "vdig2";
  1276. };
  1277. vpll_reg: regulator@7 {
  1278. reg = <7>;
  1279. regulator-compatible = "vpll";
  1280. };
  1281. vdac_reg: regulator@8 {
  1282. reg = <8>;
  1283. regulator-compatible = "vdac";
  1284. };
  1285. vaux1_reg: regulator@9 {
  1286. reg = <9>;
  1287. regulator-compatible = "vaux1";
  1288. };
  1289. vaux2_reg: regulator@10 {
  1290. reg = <10>;
  1291. regulator-compatible = "vaux2";
  1292. };
  1293. vaux33_reg: regulator@11 {
  1294. reg = <11>;
  1295. regulator-compatible = "vaux33";
  1296. };
  1297. vmmc_reg: regulator@12 {
  1298. reg = <12>;
  1299. regulator-compatible = "vmmc";
  1300. };
  1301. vbb_reg: regulator@13 {
  1302. reg = <13>;
  1303. regulator-compatible = "vbb";
  1304. };
  1305. };
  1306. };
  1307. # 544 "<stdin>" 2
  1308. &tps {
  1309. vcc1-supply = <&vbat>;
  1310. vcc2-supply = <&vbat>;
  1311. vcc3-supply = <&vbat>;
  1312. vcc4-supply = <&vbat>;
  1313. vcc5-supply = <&vbat>;
  1314. vcc6-supply = <&vbat>;
  1315. vcc7-supply = <&vbat>;
  1316. vccio-supply = <&vbat>;
  1317. regulators {
  1318. vrtc_reg: regulator@0 {
  1319. regulator-always-on;
  1320. };
  1321. vio_reg: regulator@1 {
  1322. regulator-always-on;
  1323. };
  1324. vdd1_reg: regulator@2 {
  1325. regulator-name = "vdd_mpu";
  1326. regulator-min-microvolt = <912500>;
  1327. regulator-max-microvolt = <1312500>;
  1328. regulator-boot-on;
  1329. regulator-always-on;
  1330. };
  1331. vdd2_reg: regulator@3 {
  1332. regulator-name = "vdd_core";
  1333. regulator-min-microvolt = <912500>;
  1334. regulator-max-microvolt = <1150000>;
  1335. regulator-boot-on;
  1336. regulator-always-on;
  1337. };
  1338. vdd3_reg: regulator@4 {
  1339. regulator-always-on;
  1340. };
  1341. vdig1_reg: regulator@5 {
  1342. regulator-always-on;
  1343. };
  1344. vdig2_reg: regulator@6 {
  1345. regulator-always-on;
  1346. };
  1347. vpll_reg: regulator@7 {
  1348. regulator-always-on;
  1349. };
  1350. vdac_reg: regulator@8 {
  1351. regulator-always-on;
  1352. };
  1353. vaux1_reg: regulator@9 {
  1354. regulator-always-on;
  1355. };
  1356. vaux2_reg: regulator@10 {
  1357. regulator-always-on;
  1358. };
  1359. vaux33_reg: regulator@11 {
  1360. regulator-always-on;
  1361. };
  1362. vmmc_reg: regulator@12 {
  1363. regulator-min-microvolt = <1800000>;
  1364. regulator-max-microvolt = <3300000>;
  1365. regulator-always-on;
  1366. };
  1367. };
  1368. };
  1369. &mac {
  1370. pinctrl-names = "default", "sleep";
  1371. pinctrl-0 = <&cpsw_default>;
  1372. pinctrl-1 = <&cpsw_sleep>;
  1373. dual_emac = <1>;
  1374. status = "okay";
  1375. };
  1376. &davinci_mdio {
  1377. pinctrl-names = "default", "sleep";
  1378. pinctrl-0 = <&davinci_mdio_default>;
  1379. pinctrl-1 = <&davinci_mdio_sleep>;
  1380. status = "okay";
  1381. };
  1382. &cpsw_emac0 {
  1383. phy_id = <&davinci_mdio>, <0>;
  1384. phy-mode = "rgmii-txid";
  1385. dual_emac_res_vlan = <1>;
  1386. };
  1387. &cpsw_emac1 {
  1388. phy_id = <&davinci_mdio>, <1>;
  1389. phy-mode = "rgmii-txid";
  1390. dual_emac_res_vlan = <2>;
  1391. };
  1392. &mmc1 {
  1393. status = "okay";
  1394. vmmc-supply = <&vmmc_reg>;
  1395. bus-width = <4>;
  1396. pinctrl-names = "default";
  1397. pinctrl-0 = <&mmc1_pins>;
  1398. cd-gpios = <&gpio0 6 1>;
  1399. };
  1400. &sham {
  1401. status = "okay";
  1402. };
  1403. &aes {
  1404. status = "okay";
  1405. };
  1406. &gpio0 {
  1407. ti,no-reset-on-init;
  1408. };
  1409. &mmc2 {
  1410. status = "okay";
  1411. vmmc-supply = <&wl12xx_vmmc>;
  1412. ti,non-removable;
  1413. bus-width = <4>;
  1414. cap-power-off-card;
  1415. pinctrl-names = "default";
  1416. pinctrl-0 = <&mmc2_pins>;
  1417. #address-cells = <1>;
  1418. #size-cells = <0>;
  1419. wlcore: wlcore@2 {
  1420. compatible = "ti,wl1271";
  1421. reg = <2>;
  1422. interrupt-parent = <&gpio0>;
  1423. interrupts = <31 4>;
  1424. ref-clock-frequency = <38400000>;
  1425. };
  1426. };
  1427. &mcasp1 {
  1428. #sound-dai-cells = <0>;
  1429. pinctrl-names = "default", "sleep";
  1430. pinctrl-0 = <&mcasp1_pins>;
  1431. pinctrl-1 = <&mcasp1_pins_sleep>;
  1432. status = "okay";
  1433. op-mode = <0>;
  1434. tdm-slots = <2>;
  1435. serial-dir = <
  1436. 0 0 1 2
  1437. >;
  1438. tx-num-evt = <32>;
  1439. rx-num-evt = <32>;
  1440. };
  1441. &tscadc {
  1442. status = "okay";
  1443. tsc {
  1444. ti,wires = <4>;
  1445. ti,x-plate-resistance = <200>;
  1446. ti,coordinate-readouts = <5>;
  1447. ti,wire-config = <0x00 0x11 0x22 0x33>;
  1448. };
  1449. };
  1450. &lcdc {
  1451. status = "okay";
  1452. };