.am335x-boneblack.dtb.dts.tmp 27 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371
  1. # 1 "<stdin>"
  2. # 1 "<built-in>"
  3. # 1 "<command-line>"
  4. # 1 "././include/linux/kconfig.h" 1
  5. # 1 "include/generated/autoconf.h" 1
  6. # 5 "././include/linux/kconfig.h" 2
  7. # 1 "<command-line>" 2
  8. # 1 "<stdin>"
  9. /dts-v1/;
  10. # 1 "./arch/arm/dts/am33xx.dtsi" 1
  11. # 11 "./arch/arm/dts/am33xx.dtsi"
  12. # 1 "./arch/arm/dts/include/dt-bindings/gpio/gpio.h" 1
  13. # 12 "./arch/arm/dts/am33xx.dtsi" 2
  14. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 1
  15. # 1 "./arch/arm/dts/include/dt-bindings/pinctrl/omap.h" 1
  16. # 9 "./arch/arm/dts/include/dt-bindings/pinctrl/am33xx.h" 2
  17. # 13 "./arch/arm/dts/am33xx.dtsi" 2
  18. # 1 "./arch/arm/dts/skeleton.dtsi" 1
  19. / {
  20. #address-cells = <1>;
  21. #size-cells = <1>;
  22. chosen { };
  23. aliases { };
  24. memory { device_type = "memory"; reg = <0 0>; };
  25. };
  26. # 15 "./arch/arm/dts/am33xx.dtsi" 2
  27. / {
  28. compatible = "ti,am33xx";
  29. interrupt-parent = <&intc>;
  30. aliases {
  31. i2c0 = &i2c0;
  32. i2c1 = &i2c1;
  33. i2c2 = &i2c2;
  34. serial0 = &uart0;
  35. serial1 = &uart1;
  36. serial2 = &uart2;
  37. serial3 = &uart3;
  38. serial4 = &uart4;
  39. serial5 = &uart5;
  40. d_can0 = &dcan0;
  41. d_can1 = &dcan1;
  42. usb0 = &usb0;
  43. usb1 = &usb1;
  44. phy0 = &usb0_phy;
  45. phy1 = &usb1_phy;
  46. ethernet0 = &cpsw_emac0;
  47. ethernet1 = &cpsw_emac1;
  48. };
  49. cpus {
  50. #address-cells = <1>;
  51. #size-cells = <0>;
  52. cpu@0 {
  53. compatible = "arm,cortex-a8";
  54. device_type = "cpu";
  55. reg = <0>;
  56. operating-points = <
  57. 720000 1285000
  58. 600000 1225000
  59. 500000 1125000
  60. 275000 1125000
  61. >;
  62. voltage-tolerance = <2>;
  63. clocks = <&dpll_mpu_ck>;
  64. clock-names = "cpu";
  65. clock-latency = <300000>;
  66. };
  67. };
  68. pmu {
  69. compatible = "arm,cortex-a8-pmu";
  70. interrupts = <3>;
  71. };
  72. soc {
  73. compatible = "ti,omap-infra";
  74. mpu {
  75. compatible = "ti,omap3-mpu";
  76. ti,hwmods = "mpu";
  77. };
  78. };
  79. # 93 "./arch/arm/dts/am33xx.dtsi"
  80. ocp {
  81. compatible = "simple-bus";
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. ranges;
  85. ti,hwmods = "l3_main";
  86. l4_wkup: l4_wkup@44c00000 {
  87. compatible = "ti,am3-l4-wkup", "simple-bus";
  88. #address-cells = <1>;
  89. #size-cells = <1>;
  90. ranges = <0 0x44c00000 0x280000>;
  91. prcm: prcm@200000 {
  92. compatible = "ti,am3-prcm";
  93. reg = <0x200000 0x4000>;
  94. prcm_clocks: clocks {
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. };
  98. prcm_clockdomains: clockdomains {
  99. };
  100. };
  101. scm: scm@210000 {
  102. compatible = "ti,am3-scm", "simple-bus";
  103. reg = <0x210000 0x2000>;
  104. #address-cells = <1>;
  105. #size-cells = <1>;
  106. ranges = <0 0x210000 0x2000>;
  107. am33xx_pinmux: pinmux@800 {
  108. compatible = "pinctrl-single";
  109. reg = <0x800 0x238>;
  110. #address-cells = <1>;
  111. #size-cells = <0>;
  112. pinctrl-single,register-width = <32>;
  113. pinctrl-single,function-mask = <0x7f>;
  114. };
  115. scm_conf: scm_conf@0 {
  116. compatible = "syscon";
  117. reg = <0x0 0x800>;
  118. #address-cells = <1>;
  119. #size-cells = <1>;
  120. scm_clocks: clocks {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. };
  124. };
  125. scm_clockdomains: clockdomains {
  126. };
  127. };
  128. };
  129. intc: interrupt-controller@48200000 {
  130. compatible = "ti,am33xx-intc";
  131. interrupt-controller;
  132. #interrupt-cells = <1>;
  133. reg = <0x48200000 0x1000>;
  134. };
  135. edma: edma@49000000 {
  136. compatible = "ti,edma3";
  137. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  138. reg = <0x49000000 0x10000>,
  139. <0x44e10f90 0x40>;
  140. interrupts = <12 13 14>;
  141. #dma-cells = <1>;
  142. };
  143. gpio0: gpio@44e07000 {
  144. compatible = "ti,omap4-gpio";
  145. ti,hwmods = "gpio1";
  146. gpio-controller;
  147. #gpio-cells = <2>;
  148. interrupt-controller;
  149. #interrupt-cells = <2>;
  150. reg = <0x44e07000 0x1000>;
  151. interrupts = <96>;
  152. };
  153. gpio1: gpio@4804c000 {
  154. compatible = "ti,omap4-gpio";
  155. ti,hwmods = "gpio2";
  156. gpio-controller;
  157. #gpio-cells = <2>;
  158. interrupt-controller;
  159. #interrupt-cells = <2>;
  160. reg = <0x4804c000 0x1000>;
  161. interrupts = <98>;
  162. };
  163. gpio2: gpio@481ac000 {
  164. compatible = "ti,omap4-gpio";
  165. ti,hwmods = "gpio3";
  166. gpio-controller;
  167. #gpio-cells = <2>;
  168. interrupt-controller;
  169. #interrupt-cells = <2>;
  170. reg = <0x481ac000 0x1000>;
  171. interrupts = <32>;
  172. };
  173. gpio3: gpio@481ae000 {
  174. compatible = "ti,omap4-gpio";
  175. ti,hwmods = "gpio4";
  176. gpio-controller;
  177. #gpio-cells = <2>;
  178. interrupt-controller;
  179. #interrupt-cells = <2>;
  180. reg = <0x481ae000 0x1000>;
  181. interrupts = <62>;
  182. };
  183. uart0: serial@44e09000 {
  184. compatible = "ti,omap3-uart";
  185. ti,hwmods = "uart1";
  186. clock-frequency = <48000000>;
  187. reg = <0x44e09000 0x2000>;
  188. reg-shift = <2>;
  189. interrupts = <72>;
  190. status = "disabled";
  191. dmas = <&edma 26>, <&edma 27>;
  192. dma-names = "tx", "rx";
  193. };
  194. uart1: serial@48022000 {
  195. compatible = "ti,omap3-uart";
  196. ti,hwmods = "uart2";
  197. clock-frequency = <48000000>;
  198. reg = <0x48022000 0x2000>;
  199. reg-shift = <2>;
  200. interrupts = <73>;
  201. status = "disabled";
  202. dmas = <&edma 28>, <&edma 29>;
  203. dma-names = "tx", "rx";
  204. };
  205. uart2: serial@48024000 {
  206. compatible = "ti,omap3-uart";
  207. ti,hwmods = "uart3";
  208. clock-frequency = <48000000>;
  209. reg = <0x48024000 0x2000>;
  210. reg-shift = <2>;
  211. interrupts = <74>;
  212. status = "disabled";
  213. dmas = <&edma 30>, <&edma 31>;
  214. dma-names = "tx", "rx";
  215. };
  216. uart3: serial@481a6000 {
  217. compatible = "ti,omap3-uart";
  218. ti,hwmods = "uart4";
  219. clock-frequency = <48000000>;
  220. reg = <0x481a6000 0x2000>;
  221. reg-shift = <2>;
  222. interrupts = <44>;
  223. status = "disabled";
  224. };
  225. uart4: serial@481a8000 {
  226. compatible = "ti,omap3-uart";
  227. ti,hwmods = "uart5";
  228. clock-frequency = <48000000>;
  229. reg = <0x481a8000 0x2000>;
  230. reg-shift = <2>;
  231. interrupts = <45>;
  232. status = "disabled";
  233. };
  234. uart5: serial@481aa000 {
  235. compatible = "ti,omap3-uart";
  236. ti,hwmods = "uart6";
  237. clock-frequency = <48000000>;
  238. reg = <0x481aa000 0x2000>;
  239. reg-shift = <2>;
  240. interrupts = <46>;
  241. status = "disabled";
  242. };
  243. i2c0: i2c@44e0b000 {
  244. compatible = "ti,omap4-i2c";
  245. #address-cells = <1>;
  246. #size-cells = <0>;
  247. ti,hwmods = "i2c1";
  248. reg = <0x44e0b000 0x1000>;
  249. interrupts = <70>;
  250. status = "disabled";
  251. };
  252. i2c1: i2c@4802a000 {
  253. compatible = "ti,omap4-i2c";
  254. #address-cells = <1>;
  255. #size-cells = <0>;
  256. ti,hwmods = "i2c2";
  257. reg = <0x4802a000 0x1000>;
  258. interrupts = <71>;
  259. status = "disabled";
  260. };
  261. i2c2: i2c@4819c000 {
  262. compatible = "ti,omap4-i2c";
  263. #address-cells = <1>;
  264. #size-cells = <0>;
  265. ti,hwmods = "i2c3";
  266. reg = <0x4819c000 0x1000>;
  267. interrupts = <30>;
  268. status = "disabled";
  269. };
  270. mmc1: mmc@48060000 {
  271. compatible = "ti,omap4-hsmmc";
  272. ti,hwmods = "mmc1";
  273. ti,dual-volt;
  274. ti,needs-special-reset;
  275. ti,needs-special-hs-handling;
  276. dmas = <&edma 24
  277. &edma 25>;
  278. dma-names = "tx", "rx";
  279. interrupts = <64>;
  280. interrupt-parent = <&intc>;
  281. reg = <0x48060000 0x1000>;
  282. status = "disabled";
  283. };
  284. mmc2: mmc@481d8000 {
  285. compatible = "ti,omap4-hsmmc";
  286. ti,hwmods = "mmc2";
  287. ti,needs-special-reset;
  288. dmas = <&edma 2
  289. &edma 3>;
  290. dma-names = "tx", "rx";
  291. interrupts = <28>;
  292. interrupt-parent = <&intc>;
  293. reg = <0x481d8000 0x1000>;
  294. status = "disabled";
  295. };
  296. mmc3: mmc@47810000 {
  297. compatible = "ti,omap4-hsmmc";
  298. ti,hwmods = "mmc3";
  299. ti,needs-special-reset;
  300. interrupts = <29>;
  301. interrupt-parent = <&intc>;
  302. reg = <0x47810000 0x1000>;
  303. status = "disabled";
  304. };
  305. hwspinlock: spinlock@480ca000 {
  306. compatible = "ti,omap4-hwspinlock";
  307. reg = <0x480ca000 0x1000>;
  308. ti,hwmods = "spinlock";
  309. #hwlock-cells = <1>;
  310. };
  311. wdt2: wdt@44e35000 {
  312. compatible = "ti,omap3-wdt";
  313. ti,hwmods = "wd_timer2";
  314. reg = <0x44e35000 0x1000>;
  315. interrupts = <91>;
  316. };
  317. dcan0: can@481cc000 {
  318. compatible = "ti,am3352-d_can";
  319. ti,hwmods = "d_can0";
  320. reg = <0x481cc000 0x2000>;
  321. clocks = <&dcan0_fck>;
  322. clock-names = "fck";
  323. syscon-raminit = <&scm_conf 0x644 0>;
  324. interrupts = <52>;
  325. status = "disabled";
  326. };
  327. dcan1: can@481d0000 {
  328. compatible = "ti,am3352-d_can";
  329. ti,hwmods = "d_can1";
  330. reg = <0x481d0000 0x2000>;
  331. clocks = <&dcan1_fck>;
  332. clock-names = "fck";
  333. syscon-raminit = <&scm_conf 0x644 1>;
  334. interrupts = <55>;
  335. status = "disabled";
  336. };
  337. mailbox: mailbox@480C8000 {
  338. compatible = "ti,omap4-mailbox";
  339. reg = <0x480C8000 0x200>;
  340. interrupts = <77>;
  341. ti,hwmods = "mailbox";
  342. #mbox-cells = <1>;
  343. ti,mbox-num-users = <4>;
  344. ti,mbox-num-fifos = <8>;
  345. mbox_wkupm3: wkup_m3 {
  346. ti,mbox-tx = <0 0 0>;
  347. ti,mbox-rx = <0 0 3>;
  348. };
  349. };
  350. timer1: timer@44e31000 {
  351. compatible = "ti,am335x-timer-1ms";
  352. reg = <0x44e31000 0x400>;
  353. interrupts = <67>;
  354. ti,hwmods = "timer1";
  355. ti,timer-alwon;
  356. };
  357. timer2: timer@48040000 {
  358. compatible = "ti,am335x-timer";
  359. reg = <0x48040000 0x400>;
  360. interrupts = <68>;
  361. ti,hwmods = "timer2";
  362. };
  363. timer3: timer@48042000 {
  364. compatible = "ti,am335x-timer";
  365. reg = <0x48042000 0x400>;
  366. interrupts = <69>;
  367. ti,hwmods = "timer3";
  368. };
  369. timer4: timer@48044000 {
  370. compatible = "ti,am335x-timer";
  371. reg = <0x48044000 0x400>;
  372. interrupts = <92>;
  373. ti,hwmods = "timer4";
  374. ti,timer-pwm;
  375. };
  376. timer5: timer@48046000 {
  377. compatible = "ti,am335x-timer";
  378. reg = <0x48046000 0x400>;
  379. interrupts = <93>;
  380. ti,hwmods = "timer5";
  381. ti,timer-pwm;
  382. };
  383. timer6: timer@48048000 {
  384. compatible = "ti,am335x-timer";
  385. reg = <0x48048000 0x400>;
  386. interrupts = <94>;
  387. ti,hwmods = "timer6";
  388. ti,timer-pwm;
  389. };
  390. timer7: timer@4804a000 {
  391. compatible = "ti,am335x-timer";
  392. reg = <0x4804a000 0x400>;
  393. interrupts = <95>;
  394. ti,hwmods = "timer7";
  395. ti,timer-pwm;
  396. };
  397. rtc: rtc@44e3e000 {
  398. compatible = "ti,am3352-rtc", "ti,da830-rtc";
  399. reg = <0x44e3e000 0x1000>;
  400. interrupts = <75
  401. 76>;
  402. ti,hwmods = "rtc";
  403. };
  404. spi0: spi@48030000 {
  405. compatible = "ti,omap4-mcspi";
  406. #address-cells = <1>;
  407. #size-cells = <0>;
  408. reg = <0x48030000 0x400>;
  409. interrupts = <65>;
  410. ti,spi-num-cs = <2>;
  411. ti,hwmods = "spi0";
  412. dmas = <&edma 16
  413. &edma 17
  414. &edma 18
  415. &edma 19>;
  416. dma-names = "tx0", "rx0", "tx1", "rx1";
  417. status = "disabled";
  418. };
  419. spi1: spi@481a0000 {
  420. compatible = "ti,omap4-mcspi";
  421. #address-cells = <1>;
  422. #size-cells = <0>;
  423. reg = <0x481a0000 0x400>;
  424. interrupts = <125>;
  425. ti,spi-num-cs = <2>;
  426. ti,hwmods = "spi1";
  427. dmas = <&edma 42
  428. &edma 43
  429. &edma 44
  430. &edma 45>;
  431. dma-names = "tx0", "rx0", "tx1", "rx1";
  432. status = "disabled";
  433. };
  434. usb: usb@47400000 {
  435. compatible = "ti,am33xx-usb";
  436. reg = <0x47400000 0x1000>;
  437. ranges;
  438. #address-cells = <1>;
  439. #size-cells = <1>;
  440. ti,hwmods = "usb_otg_hs";
  441. status = "disabled";
  442. usb_ctrl_mod: control@44e10620 {
  443. compatible = "ti,am335x-usb-ctrl-module";
  444. reg = <0x44e10620 0x10
  445. 0x44e10648 0x4>;
  446. reg-names = "phy_ctrl", "wakeup";
  447. status = "disabled";
  448. };
  449. usb0_phy: usb-phy@47401300 {
  450. compatible = "ti,am335x-usb-phy";
  451. reg = <0x47401300 0x100>;
  452. reg-names = "phy";
  453. status = "disabled";
  454. ti,ctrl_mod = <&usb_ctrl_mod>;
  455. };
  456. usb0: usb@47401000 {
  457. compatible = "ti,musb-am33xx";
  458. status = "disabled";
  459. reg = <0x47401400 0x400
  460. 0x47401000 0x200>;
  461. reg-names = "mc", "control";
  462. interrupts = <18>;
  463. interrupt-names = "mc";
  464. dr_mode = "otg";
  465. mentor,multipoint = <1>;
  466. mentor,num-eps = <16>;
  467. mentor,ram-bits = <12>;
  468. mentor,power = <500>;
  469. phys = <&usb0_phy>;
  470. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  471. &cppi41dma 2 0 &cppi41dma 3 0
  472. &cppi41dma 4 0 &cppi41dma 5 0
  473. &cppi41dma 6 0 &cppi41dma 7 0
  474. &cppi41dma 8 0 &cppi41dma 9 0
  475. &cppi41dma 10 0 &cppi41dma 11 0
  476. &cppi41dma 12 0 &cppi41dma 13 0
  477. &cppi41dma 14 0 &cppi41dma 0 1
  478. &cppi41dma 1 1 &cppi41dma 2 1
  479. &cppi41dma 3 1 &cppi41dma 4 1
  480. &cppi41dma 5 1 &cppi41dma 6 1
  481. &cppi41dma 7 1 &cppi41dma 8 1
  482. &cppi41dma 9 1 &cppi41dma 10 1
  483. &cppi41dma 11 1 &cppi41dma 12 1
  484. &cppi41dma 13 1 &cppi41dma 14 1>;
  485. dma-names =
  486. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  487. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  488. "rx14", "rx15",
  489. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  490. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  491. "tx14", "tx15";
  492. };
  493. usb1_phy: usb-phy@47401b00 {
  494. compatible = "ti,am335x-usb-phy";
  495. reg = <0x47401b00 0x100>;
  496. reg-names = "phy";
  497. status = "disabled";
  498. ti,ctrl_mod = <&usb_ctrl_mod>;
  499. };
  500. usb1: usb@47401800 {
  501. compatible = "ti,musb-am33xx";
  502. status = "disabled";
  503. reg = <0x47401c00 0x400
  504. 0x47401800 0x200>;
  505. reg-names = "mc", "control";
  506. interrupts = <19>;
  507. interrupt-names = "mc";
  508. dr_mode = "otg";
  509. mentor,multipoint = <1>;
  510. mentor,num-eps = <16>;
  511. mentor,ram-bits = <12>;
  512. mentor,power = <500>;
  513. phys = <&usb1_phy>;
  514. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  515. &cppi41dma 17 0 &cppi41dma 18 0
  516. &cppi41dma 19 0 &cppi41dma 20 0
  517. &cppi41dma 21 0 &cppi41dma 22 0
  518. &cppi41dma 23 0 &cppi41dma 24 0
  519. &cppi41dma 25 0 &cppi41dma 26 0
  520. &cppi41dma 27 0 &cppi41dma 28 0
  521. &cppi41dma 29 0 &cppi41dma 15 1
  522. &cppi41dma 16 1 &cppi41dma 17 1
  523. &cppi41dma 18 1 &cppi41dma 19 1
  524. &cppi41dma 20 1 &cppi41dma 21 1
  525. &cppi41dma 22 1 &cppi41dma 23 1
  526. &cppi41dma 24 1 &cppi41dma 25 1
  527. &cppi41dma 26 1 &cppi41dma 27 1
  528. &cppi41dma 28 1 &cppi41dma 29 1>;
  529. dma-names =
  530. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  531. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  532. "rx14", "rx15",
  533. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  534. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  535. "tx14", "tx15";
  536. };
  537. cppi41dma: dma-controller@47402000 {
  538. compatible = "ti,am3359-cppi41";
  539. reg = <0x47400000 0x1000
  540. 0x47402000 0x1000
  541. 0x47403000 0x1000
  542. 0x47404000 0x4000>;
  543. reg-names = "glue", "controller", "scheduler", "queuemgr";
  544. interrupts = <17>;
  545. interrupt-names = "glue";
  546. #dma-cells = <2>;
  547. #dma-channels = <30>;
  548. #dma-requests = <256>;
  549. status = "disabled";
  550. };
  551. };
  552. epwmss0: epwmss@48300000 {
  553. compatible = "ti,am33xx-pwmss";
  554. reg = <0x48300000 0x10>;
  555. ti,hwmods = "epwmss0";
  556. #address-cells = <1>;
  557. #size-cells = <1>;
  558. status = "disabled";
  559. ranges = <0x48300100 0x48300100 0x80
  560. 0x48300180 0x48300180 0x80
  561. 0x48300200 0x48300200 0x80>;
  562. ecap0: ecap@48300100 {
  563. compatible = "ti,am33xx-ecap";
  564. #pwm-cells = <3>;
  565. reg = <0x48300100 0x80>;
  566. interrupts = <31>;
  567. interrupt-names = "ecap0";
  568. ti,hwmods = "ecap0";
  569. status = "disabled";
  570. };
  571. ehrpwm0: ehrpwm@48300200 {
  572. compatible = "ti,am33xx-ehrpwm";
  573. #pwm-cells = <3>;
  574. reg = <0x48300200 0x80>;
  575. ti,hwmods = "ehrpwm0";
  576. status = "disabled";
  577. };
  578. };
  579. epwmss1: epwmss@48302000 {
  580. compatible = "ti,am33xx-pwmss";
  581. reg = <0x48302000 0x10>;
  582. ti,hwmods = "epwmss1";
  583. #address-cells = <1>;
  584. #size-cells = <1>;
  585. status = "disabled";
  586. ranges = <0x48302100 0x48302100 0x80
  587. 0x48302180 0x48302180 0x80
  588. 0x48302200 0x48302200 0x80>;
  589. ecap1: ecap@48302100 {
  590. compatible = "ti,am33xx-ecap";
  591. #pwm-cells = <3>;
  592. reg = <0x48302100 0x80>;
  593. interrupts = <47>;
  594. interrupt-names = "ecap1";
  595. ti,hwmods = "ecap1";
  596. status = "disabled";
  597. };
  598. ehrpwm1: ehrpwm@48302200 {
  599. compatible = "ti,am33xx-ehrpwm";
  600. #pwm-cells = <3>;
  601. reg = <0x48302200 0x80>;
  602. ti,hwmods = "ehrpwm1";
  603. status = "disabled";
  604. };
  605. };
  606. epwmss2: epwmss@48304000 {
  607. compatible = "ti,am33xx-pwmss";
  608. reg = <0x48304000 0x10>;
  609. ti,hwmods = "epwmss2";
  610. #address-cells = <1>;
  611. #size-cells = <1>;
  612. status = "disabled";
  613. ranges = <0x48304100 0x48304100 0x80
  614. 0x48304180 0x48304180 0x80
  615. 0x48304200 0x48304200 0x80>;
  616. ecap2: ecap@48304100 {
  617. compatible = "ti,am33xx-ecap";
  618. #pwm-cells = <3>;
  619. reg = <0x48304100 0x80>;
  620. interrupts = <61>;
  621. interrupt-names = "ecap2";
  622. ti,hwmods = "ecap2";
  623. status = "disabled";
  624. };
  625. ehrpwm2: ehrpwm@48304200 {
  626. compatible = "ti,am33xx-ehrpwm";
  627. #pwm-cells = <3>;
  628. reg = <0x48304200 0x80>;
  629. ti,hwmods = "ehrpwm2";
  630. status = "disabled";
  631. };
  632. };
  633. mac: ethernet@4a100000 {
  634. compatible = "ti,cpsw";
  635. ti,hwmods = "cpgmac0";
  636. clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
  637. clock-names = "fck", "cpts";
  638. cpdma_channels = <8>;
  639. ale_entries = <1024>;
  640. bd_ram_size = <0x2000>;
  641. no_bd_ram = <0>;
  642. rx_descs = <64>;
  643. mac_control = <0x20>;
  644. slaves = <2>;
  645. active_slave = <0>;
  646. cpts_clock_mult = <0x80000000>;
  647. cpts_clock_shift = <29>;
  648. reg = <0x4a100000 0x800
  649. 0x4a101200 0x100>;
  650. #address-cells = <1>;
  651. #size-cells = <1>;
  652. interrupt-parent = <&intc>;
  653. interrupts = <40 41 42 43>;
  654. ranges;
  655. syscon = <&scm_conf>;
  656. status = "disabled";
  657. davinci_mdio: mdio@4a101000 {
  658. compatible = "ti,davinci_mdio";
  659. #address-cells = <1>;
  660. #size-cells = <0>;
  661. ti,hwmods = "davinci_mdio";
  662. bus_freq = <1000000>;
  663. reg = <0x4a101000 0x100>;
  664. status = "disabled";
  665. };
  666. cpsw_emac0: slave@4a100200 {
  667. mac-address = [ 00 00 00 00 00 00 ];
  668. };
  669. cpsw_emac1: slave@4a100300 {
  670. mac-address = [ 00 00 00 00 00 00 ];
  671. };
  672. phy_sel: cpsw-phy-sel@44e10650 {
  673. compatible = "ti,am3352-cpsw-phy-sel";
  674. reg= <0x44e10650 0x4>;
  675. reg-names = "gmii-sel";
  676. };
  677. };
  678. ocmcram: ocmcram@40300000 {
  679. compatible = "mmio-sram";
  680. reg = <0x40300000 0x10000>;
  681. };
  682. wkup_m3: wkup_m3@44d00000 {
  683. compatible = "ti,am3353-wkup-m3";
  684. reg = <0x44d00000 0x4000
  685. 0x44d80000 0x2000>;
  686. ti,hwmods = "wkup_m3";
  687. ti,no-reset-on-init;
  688. };
  689. elm: elm@48080000 {
  690. compatible = "ti,am3352-elm";
  691. reg = <0x48080000 0x2000>;
  692. interrupts = <4>;
  693. ti,hwmods = "elm";
  694. status = "disabled";
  695. };
  696. lcdc: lcdc@4830e000 {
  697. compatible = "ti,am33xx-tilcdc";
  698. reg = <0x4830e000 0x1000>;
  699. interrupt-parent = <&intc>;
  700. interrupts = <36>;
  701. ti,hwmods = "lcdc";
  702. status = "disabled";
  703. };
  704. tscadc: tscadc@44e0d000 {
  705. compatible = "ti,am3359-tscadc";
  706. reg = <0x44e0d000 0x1000>;
  707. interrupt-parent = <&intc>;
  708. interrupts = <16>;
  709. ti,hwmods = "adc_tsc";
  710. status = "disabled";
  711. tsc {
  712. compatible = "ti,am3359-tsc";
  713. };
  714. am335x_adc: adc {
  715. #io-channel-cells = <1>;
  716. compatible = "ti,am3359-adc";
  717. };
  718. };
  719. gpmc: gpmc@50000000 {
  720. compatible = "ti,am3352-gpmc";
  721. ti,hwmods = "gpmc";
  722. ti,no-idle-on-init;
  723. reg = <0x50000000 0x2000>;
  724. interrupts = <100>;
  725. gpmc,num-cs = <7>;
  726. gpmc,num-waitpins = <2>;
  727. #address-cells = <2>;
  728. #size-cells = <1>;
  729. status = "disabled";
  730. };
  731. sham: sham@53100000 {
  732. compatible = "ti,omap4-sham";
  733. ti,hwmods = "sham";
  734. reg = <0x53100000 0x200>;
  735. interrupts = <109>;
  736. dmas = <&edma 36>;
  737. dma-names = "rx";
  738. };
  739. aes: aes@53500000 {
  740. compatible = "ti,omap4-aes";
  741. ti,hwmods = "aes";
  742. reg = <0x53500000 0xa0>;
  743. interrupts = <103>;
  744. dmas = <&edma 6>,
  745. <&edma 5>;
  746. dma-names = "tx", "rx";
  747. };
  748. mcasp0: mcasp@48038000 {
  749. compatible = "ti,am33xx-mcasp-audio";
  750. ti,hwmods = "mcasp0";
  751. reg = <0x48038000 0x2000>,
  752. <0x46000000 0x400000>;
  753. reg-names = "mpu", "dat";
  754. interrupts = <80>, <81>;
  755. interrupt-names = "tx", "rx";
  756. status = "disabled";
  757. dmas = <&edma 8>,
  758. <&edma 9>;
  759. dma-names = "tx", "rx";
  760. };
  761. mcasp1: mcasp@4803C000 {
  762. compatible = "ti,am33xx-mcasp-audio";
  763. ti,hwmods = "mcasp1";
  764. reg = <0x4803C000 0x2000>,
  765. <0x46400000 0x400000>;
  766. reg-names = "mpu", "dat";
  767. interrupts = <82>, <83>;
  768. interrupt-names = "tx", "rx";
  769. status = "disabled";
  770. dmas = <&edma 10>,
  771. <&edma 11>;
  772. dma-names = "tx", "rx";
  773. };
  774. rng: rng@48310000 {
  775. compatible = "ti,omap4-rng";
  776. ti,hwmods = "rng";
  777. reg = <0x48310000 0x2000>;
  778. interrupts = <111>;
  779. };
  780. };
  781. };
  782. /include/ "am33xx-clocks.dtsi"
  783. # 11 "<stdin>" 2
  784. # 1 "./arch/arm/dts/am335x-bone-common.dtsi" 1
  785. # 9 "./arch/arm/dts/am335x-bone-common.dtsi"
  786. / {
  787. cpus {
  788. cpu@0 {
  789. cpu0-supply = <&dcdc2_reg>;
  790. };
  791. };
  792. chosen {
  793. stdout-path = &uart0;
  794. tick-timer = &timer2;
  795. };
  796. memory {
  797. device_type = "memory";
  798. reg = <0x80000000 0x10000000>;
  799. };
  800. leds {
  801. pinctrl-names = "default";
  802. pinctrl-0 = <&user_leds_s0>;
  803. compatible = "gpio-leds";
  804. led@2 {
  805. label = "beaglebone:green:heartbeat";
  806. gpios = <&gpio1 21 0>;
  807. linux,default-trigger = "heartbeat";
  808. default-state = "off";
  809. };
  810. led@3 {
  811. label = "beaglebone:green:mmc0";
  812. gpios = <&gpio1 22 0>;
  813. linux,default-trigger = "mmc0";
  814. default-state = "off";
  815. };
  816. led@4 {
  817. label = "beaglebone:green:usr2";
  818. gpios = <&gpio1 23 0>;
  819. linux,default-trigger = "cpu0";
  820. default-state = "off";
  821. };
  822. led@5 {
  823. label = "beaglebone:green:usr3";
  824. gpios = <&gpio1 24 0>;
  825. linux,default-trigger = "mmc1";
  826. default-state = "off";
  827. };
  828. };
  829. vmmcsd_fixed: fixedregulator@0 {
  830. compatible = "regulator-fixed";
  831. regulator-name = "vmmcsd_fixed";
  832. regulator-min-microvolt = <3300000>;
  833. regulator-max-microvolt = <3300000>;
  834. };
  835. };
  836. &am33xx_pinmux {
  837. pinctrl-names = "default";
  838. pinctrl-0 = <&clkout2_pin>;
  839. user_leds_s0: user_leds_s0 {
  840. pinctrl-single,pins = <
  841. 0x54 (0 | 7)
  842. 0x58 (((1 << 4)) | 7)
  843. 0x5c (0 | 7)
  844. 0x60 (((1 << 4)) | 7)
  845. >;
  846. };
  847. i2c0_pins: pinmux_i2c0_pins {
  848. pinctrl-single,pins = <
  849. 0x188 (((1 << 5) | (1 << 4)) | 0)
  850. 0x18c (((1 << 5) | (1 << 4)) | 0)
  851. >;
  852. };
  853. i2c2_pins: pinmux_i2c2_pins {
  854. pinctrl-single,pins = <
  855. 0x178 (((1 << 5) | (1 << 4)) | 3)
  856. 0x17c (((1 << 5) | (1 << 4)) | 3)
  857. >;
  858. };
  859. uart0_pins: pinmux_uart0_pins {
  860. pinctrl-single,pins = <
  861. 0x170 (((1 << 5) | (1 << 4)) | 0)
  862. 0x174 (0 | 0)
  863. >;
  864. };
  865. clkout2_pin: pinmux_clkout2_pin {
  866. pinctrl-single,pins = <
  867. 0x1b4 (0 | 3)
  868. >;
  869. };
  870. cpsw_default: cpsw_default {
  871. pinctrl-single,pins = <
  872. 0x110 (((1 << 5) | (1 << 4)) | 0)
  873. 0x114 (0 | 0)
  874. 0x118 (((1 << 5) | (1 << 4)) | 0)
  875. 0x11c (0 | 0)
  876. 0x120 (0 | 0)
  877. 0x124 (0 | 0)
  878. 0x128 (0 | 0)
  879. 0x12c (((1 << 5) | (1 << 4)) | 0)
  880. 0x130 (((1 << 5) | (1 << 4)) | 0)
  881. 0x134 (((1 << 5) | (1 << 4)) | 0)
  882. 0x138 (((1 << 5) | (1 << 4)) | 0)
  883. 0x13c (((1 << 5) | (1 << 4)) | 0)
  884. 0x140 (((1 << 5) | (1 << 4)) | 0)
  885. >;
  886. };
  887. cpsw_sleep: cpsw_sleep {
  888. pinctrl-single,pins = <
  889. 0x110 (((1 << 5)) | 7)
  890. 0x114 (((1 << 5)) | 7)
  891. 0x118 (((1 << 5)) | 7)
  892. 0x11c (((1 << 5)) | 7)
  893. 0x120 (((1 << 5)) | 7)
  894. 0x124 (((1 << 5)) | 7)
  895. 0x128 (((1 << 5)) | 7)
  896. 0x12c (((1 << 5)) | 7)
  897. 0x130 (((1 << 5)) | 7)
  898. 0x134 (((1 << 5)) | 7)
  899. 0x138 (((1 << 5)) | 7)
  900. 0x13c (((1 << 5)) | 7)
  901. 0x140 (((1 << 5)) | 7)
  902. >;
  903. };
  904. davinci_mdio_default: davinci_mdio_default {
  905. pinctrl-single,pins = <
  906. 0x148 (((1 << 5) | (1 << 4)) | (1 << 6) | 0)
  907. 0x14c (((1 << 4)) | 0)
  908. >;
  909. };
  910. davinci_mdio_sleep: davinci_mdio_sleep {
  911. pinctrl-single,pins = <
  912. 0x148 (((1 << 5)) | 7)
  913. 0x14c (((1 << 5)) | 7)
  914. >;
  915. };
  916. mmc1_pins: pinmux_mmc1_pins {
  917. pinctrl-single,pins = <
  918. 0x160 (((1 << 5) | (1 << 3)) | 7)
  919. >;
  920. };
  921. emmc_pins: pinmux_emmc_pins {
  922. pinctrl-single,pins = <
  923. 0x80 (((1 << 5) | (1 << 4)) | 2)
  924. 0x84 (((1 << 5) | (1 << 4)) | 2)
  925. 0x00 (((1 << 5) | (1 << 4)) | 1)
  926. 0x04 (((1 << 5) | (1 << 4)) | 1)
  927. 0x08 (((1 << 5) | (1 << 4)) | 1)
  928. 0x0c (((1 << 5) | (1 << 4)) | 1)
  929. 0x10 (((1 << 5) | (1 << 4)) | 1)
  930. 0x14 (((1 << 5) | (1 << 4)) | 1)
  931. 0x18 (((1 << 5) | (1 << 4)) | 1)
  932. 0x1c (((1 << 5) | (1 << 4)) | 1)
  933. >;
  934. };
  935. };
  936. &uart0 {
  937. pinctrl-names = "default";
  938. pinctrl-0 = <&uart0_pins>;
  939. status = "okay";
  940. };
  941. &usb {
  942. status = "okay";
  943. };
  944. &usb_ctrl_mod {
  945. status = "okay";
  946. };
  947. &usb0_phy {
  948. status = "okay";
  949. };
  950. &usb1_phy {
  951. status = "okay";
  952. };
  953. &usb0 {
  954. status = "okay";
  955. dr_mode = "peripheral";
  956. };
  957. &usb1 {
  958. status = "okay";
  959. dr_mode = "host";
  960. };
  961. &cppi41dma {
  962. status = "okay";
  963. };
  964. &i2c0 {
  965. pinctrl-names = "default";
  966. pinctrl-0 = <&i2c0_pins>;
  967. status = "okay";
  968. clock-frequency = <400000>;
  969. tps: tps@24 {
  970. reg = <0x24>;
  971. };
  972. baseboard_eeprom: baseboard_eeprom@50 {
  973. compatible = "at,24c256";
  974. reg = <0x50>;
  975. #address-cells = <1>;
  976. #size-cells = <1>;
  977. baseboard_data: baseboard_data@0 {
  978. reg = <0 0x100>;
  979. };
  980. };
  981. };
  982. &i2c2 {
  983. pinctrl-names = "default";
  984. pinctrl-0 = <&i2c2_pins>;
  985. status = "okay";
  986. clock-frequency = <100000>;
  987. cape_eeprom0: cape_eeprom0@54 {
  988. compatible = "at,24c256";
  989. reg = <0x54>;
  990. #address-cells = <1>;
  991. #size-cells = <1>;
  992. cape0_data: cape_data@0 {
  993. reg = <0 0x100>;
  994. };
  995. };
  996. cape_eeprom1: cape_eeprom1@55 {
  997. compatible = "at,24c256";
  998. reg = <0x55>;
  999. #address-cells = <1>;
  1000. #size-cells = <1>;
  1001. cape1_data: cape_data@0 {
  1002. reg = <0 0x100>;
  1003. };
  1004. };
  1005. cape_eeprom2: cape_eeprom2@56 {
  1006. compatible = "at,24c256";
  1007. reg = <0x56>;
  1008. #address-cells = <1>;
  1009. #size-cells = <1>;
  1010. cape2_data: cape_data@0 {
  1011. reg = <0 0x100>;
  1012. };
  1013. };
  1014. cape_eeprom3: cape_eeprom3@57 {
  1015. compatible = "at,24c256";
  1016. reg = <0x57>;
  1017. #address-cells = <1>;
  1018. #size-cells = <1>;
  1019. cape3_data: cape_data@0 {
  1020. reg = <0 0x100>;
  1021. };
  1022. };
  1023. };
  1024. /include/ "tps65217.dtsi"
  1025. &tps {
  1026. # 314 "./arch/arm/dts/am335x-bone-common.dtsi"
  1027. ti,pmic-shutdown-controller;
  1028. regulators {
  1029. dcdc1_reg: regulator@0 {
  1030. regulator-name = "vdds_dpr";
  1031. regulator-always-on;
  1032. };
  1033. dcdc2_reg: regulator@1 {
  1034. regulator-name = "vdd_mpu";
  1035. regulator-min-microvolt = <925000>;
  1036. regulator-max-microvolt = <1325000>;
  1037. regulator-boot-on;
  1038. regulator-always-on;
  1039. };
  1040. dcdc3_reg: regulator@2 {
  1041. regulator-name = "vdd_core";
  1042. regulator-min-microvolt = <925000>;
  1043. regulator-max-microvolt = <1150000>;
  1044. regulator-boot-on;
  1045. regulator-always-on;
  1046. };
  1047. ldo1_reg: regulator@3 {
  1048. regulator-name = "vio,vrtc,vdds";
  1049. regulator-always-on;
  1050. };
  1051. ldo2_reg: regulator@4 {
  1052. regulator-name = "vdd_3v3aux";
  1053. regulator-always-on;
  1054. };
  1055. ldo3_reg: regulator@5 {
  1056. regulator-name = "vdd_1v8";
  1057. regulator-always-on;
  1058. };
  1059. ldo4_reg: regulator@6 {
  1060. regulator-name = "vdd_3v3a";
  1061. regulator-always-on;
  1062. };
  1063. };
  1064. };
  1065. &cpsw_emac0 {
  1066. phy_id = <&davinci_mdio>, <0>;
  1067. phy-mode = "mii";
  1068. };
  1069. &cpsw_emac1 {
  1070. phy_id = <&davinci_mdio>, <1>;
  1071. phy-mode = "mii";
  1072. };
  1073. &mac {
  1074. pinctrl-names = "default", "sleep";
  1075. pinctrl-0 = <&cpsw_default>;
  1076. pinctrl-1 = <&cpsw_sleep>;
  1077. status = "okay";
  1078. };
  1079. &davinci_mdio {
  1080. pinctrl-names = "default", "sleep";
  1081. pinctrl-0 = <&davinci_mdio_default>;
  1082. pinctrl-1 = <&davinci_mdio_sleep>;
  1083. status = "okay";
  1084. };
  1085. &mmc1 {
  1086. status = "okay";
  1087. bus-width = <0x4>;
  1088. pinctrl-names = "default";
  1089. pinctrl-0 = <&mmc1_pins>;
  1090. cd-gpios = <&gpio0 6 1>;
  1091. };
  1092. &aes {
  1093. status = "okay";
  1094. };
  1095. &sham {
  1096. status = "okay";
  1097. };
  1098. # 12 "<stdin>" 2
  1099. / {
  1100. model = "TI AM335x BeagleBone Black";
  1101. compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
  1102. chosen {
  1103. stdout-path = &uart0;
  1104. tick-timer = &timer2;
  1105. };
  1106. };
  1107. &ldo3_reg {
  1108. regulator-min-microvolt = <1800000>;
  1109. regulator-max-microvolt = <1800000>;
  1110. regulator-always-on;
  1111. };
  1112. &mmc1 {
  1113. vmmc-supply = <&vmmcsd_fixed>;
  1114. };
  1115. &mmc2 {
  1116. vmmc-supply = <&vmmcsd_fixed>;
  1117. pinctrl-names = "default";
  1118. pinctrl-0 = <&emmc_pins>;
  1119. bus-width = <8>;
  1120. status = "okay";
  1121. };
  1122. &am33xx_pinmux {
  1123. nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
  1124. pinctrl-single,pins = <
  1125. 0x1b0 0x03
  1126. 0xa0 0x08
  1127. 0xa4 0x08
  1128. 0xa8 0x08
  1129. 0xac 0x08
  1130. 0xb0 0x08
  1131. 0xb4 0x08
  1132. 0xb8 0x08
  1133. 0xbc 0x08
  1134. 0xc0 0x08
  1135. 0xc4 0x08
  1136. 0xc8 0x08
  1137. 0xcc 0x08
  1138. 0xd0 0x08
  1139. 0xd4 0x08
  1140. 0xd8 0x08
  1141. 0xdc 0x08
  1142. 0xe0 0x00
  1143. 0xe4 0x00
  1144. 0xe8 0x00
  1145. 0xec 0x00
  1146. >;
  1147. };
  1148. nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
  1149. pinctrl-single,pins = <
  1150. 0x1b0 0x03
  1151. >;
  1152. };
  1153. };
  1154. &lcdc {
  1155. status = "okay";
  1156. };
  1157. / {
  1158. hdmi {
  1159. compatible = "ti,tilcdc,slave";
  1160. i2c = <&i2c0>;
  1161. pinctrl-names = "default", "off";
  1162. pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
  1163. pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
  1164. status = "okay";
  1165. };
  1166. };
  1167. &rtc {
  1168. system-power-controller;
  1169. };