intel-pt.c 58 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356
  1. /*
  2. * intel_pt.c: Intel Processor Trace support
  3. * Copyright (c) 2013-2015, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. */
  15. #include <stdio.h>
  16. #include <stdbool.h>
  17. #include <errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/types.h>
  20. #include "../perf.h"
  21. #include "session.h"
  22. #include "machine.h"
  23. #include "sort.h"
  24. #include "tool.h"
  25. #include "event.h"
  26. #include "evlist.h"
  27. #include "evsel.h"
  28. #include "map.h"
  29. #include "color.h"
  30. #include "util.h"
  31. #include "thread.h"
  32. #include "thread-stack.h"
  33. #include "symbol.h"
  34. #include "callchain.h"
  35. #include "dso.h"
  36. #include "debug.h"
  37. #include "auxtrace.h"
  38. #include "tsc.h"
  39. #include "intel-pt.h"
  40. #include "config.h"
  41. #include "intel-pt-decoder/intel-pt-log.h"
  42. #include "intel-pt-decoder/intel-pt-decoder.h"
  43. #include "intel-pt-decoder/intel-pt-insn-decoder.h"
  44. #include "intel-pt-decoder/intel-pt-pkt-decoder.h"
  45. #define MAX_TIMESTAMP (~0ULL)
  46. struct intel_pt {
  47. struct auxtrace auxtrace;
  48. struct auxtrace_queues queues;
  49. struct auxtrace_heap heap;
  50. u32 auxtrace_type;
  51. struct perf_session *session;
  52. struct machine *machine;
  53. struct perf_evsel *switch_evsel;
  54. struct thread *unknown_thread;
  55. bool timeless_decoding;
  56. bool sampling_mode;
  57. bool snapshot_mode;
  58. bool per_cpu_mmaps;
  59. bool have_tsc;
  60. bool data_queued;
  61. bool est_tsc;
  62. bool sync_switch;
  63. bool mispred_all;
  64. int have_sched_switch;
  65. u32 pmu_type;
  66. u64 kernel_start;
  67. u64 switch_ip;
  68. u64 ptss_ip;
  69. struct perf_tsc_conversion tc;
  70. bool cap_user_time_zero;
  71. struct itrace_synth_opts synth_opts;
  72. bool sample_instructions;
  73. u64 instructions_sample_type;
  74. u64 instructions_sample_period;
  75. u64 instructions_id;
  76. bool sample_branches;
  77. u32 branches_filter;
  78. u64 branches_sample_type;
  79. u64 branches_id;
  80. bool sample_transactions;
  81. u64 transactions_sample_type;
  82. u64 transactions_id;
  83. bool synth_needs_swap;
  84. u64 tsc_bit;
  85. u64 mtc_bit;
  86. u64 mtc_freq_bits;
  87. u32 tsc_ctc_ratio_n;
  88. u32 tsc_ctc_ratio_d;
  89. u64 cyc_bit;
  90. u64 noretcomp_bit;
  91. unsigned max_non_turbo_ratio;
  92. unsigned long num_events;
  93. char *filter;
  94. struct addr_filters filts;
  95. };
  96. enum switch_state {
  97. INTEL_PT_SS_NOT_TRACING,
  98. INTEL_PT_SS_UNKNOWN,
  99. INTEL_PT_SS_TRACING,
  100. INTEL_PT_SS_EXPECTING_SWITCH_EVENT,
  101. INTEL_PT_SS_EXPECTING_SWITCH_IP,
  102. };
  103. struct intel_pt_queue {
  104. struct intel_pt *pt;
  105. unsigned int queue_nr;
  106. struct auxtrace_buffer *buffer;
  107. void *decoder;
  108. const struct intel_pt_state *state;
  109. struct ip_callchain *chain;
  110. struct branch_stack *last_branch;
  111. struct branch_stack *last_branch_rb;
  112. size_t last_branch_pos;
  113. union perf_event *event_buf;
  114. bool on_heap;
  115. bool stop;
  116. bool step_through_buffers;
  117. bool use_buffer_pid_tid;
  118. pid_t pid, tid;
  119. int cpu;
  120. int switch_state;
  121. pid_t next_tid;
  122. struct thread *thread;
  123. bool exclude_kernel;
  124. bool have_sample;
  125. u64 time;
  126. u64 timestamp;
  127. u32 flags;
  128. u16 insn_len;
  129. u64 last_insn_cnt;
  130. };
  131. static void intel_pt_dump(struct intel_pt *pt __maybe_unused,
  132. unsigned char *buf, size_t len)
  133. {
  134. struct intel_pt_pkt packet;
  135. size_t pos = 0;
  136. int ret, pkt_len, i;
  137. char desc[INTEL_PT_PKT_DESC_MAX];
  138. const char *color = PERF_COLOR_BLUE;
  139. color_fprintf(stdout, color,
  140. ". ... Intel Processor Trace data: size %zu bytes\n",
  141. len);
  142. while (len) {
  143. ret = intel_pt_get_packet(buf, len, &packet);
  144. if (ret > 0)
  145. pkt_len = ret;
  146. else
  147. pkt_len = 1;
  148. printf(".");
  149. color_fprintf(stdout, color, " %08x: ", pos);
  150. for (i = 0; i < pkt_len; i++)
  151. color_fprintf(stdout, color, " %02x", buf[i]);
  152. for (; i < 16; i++)
  153. color_fprintf(stdout, color, " ");
  154. if (ret > 0) {
  155. ret = intel_pt_pkt_desc(&packet, desc,
  156. INTEL_PT_PKT_DESC_MAX);
  157. if (ret > 0)
  158. color_fprintf(stdout, color, " %s\n", desc);
  159. } else {
  160. color_fprintf(stdout, color, " Bad packet!\n");
  161. }
  162. pos += pkt_len;
  163. buf += pkt_len;
  164. len -= pkt_len;
  165. }
  166. }
  167. static void intel_pt_dump_event(struct intel_pt *pt, unsigned char *buf,
  168. size_t len)
  169. {
  170. printf(".\n");
  171. intel_pt_dump(pt, buf, len);
  172. }
  173. static int intel_pt_do_fix_overlap(struct intel_pt *pt, struct auxtrace_buffer *a,
  174. struct auxtrace_buffer *b)
  175. {
  176. void *start;
  177. start = intel_pt_find_overlap(a->data, a->size, b->data, b->size,
  178. pt->have_tsc);
  179. if (!start)
  180. return -EINVAL;
  181. b->use_size = b->data + b->size - start;
  182. b->use_data = start;
  183. return 0;
  184. }
  185. static void intel_pt_use_buffer_pid_tid(struct intel_pt_queue *ptq,
  186. struct auxtrace_queue *queue,
  187. struct auxtrace_buffer *buffer)
  188. {
  189. if (queue->cpu == -1 && buffer->cpu != -1)
  190. ptq->cpu = buffer->cpu;
  191. ptq->pid = buffer->pid;
  192. ptq->tid = buffer->tid;
  193. intel_pt_log("queue %u cpu %d pid %d tid %d\n",
  194. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  195. thread__zput(ptq->thread);
  196. if (ptq->tid != -1) {
  197. if (ptq->pid != -1)
  198. ptq->thread = machine__findnew_thread(ptq->pt->machine,
  199. ptq->pid,
  200. ptq->tid);
  201. else
  202. ptq->thread = machine__find_thread(ptq->pt->machine, -1,
  203. ptq->tid);
  204. }
  205. }
  206. /* This function assumes data is processed sequentially only */
  207. static int intel_pt_get_trace(struct intel_pt_buffer *b, void *data)
  208. {
  209. struct intel_pt_queue *ptq = data;
  210. struct auxtrace_buffer *buffer = ptq->buffer, *old_buffer = buffer;
  211. struct auxtrace_queue *queue;
  212. if (ptq->stop) {
  213. b->len = 0;
  214. return 0;
  215. }
  216. queue = &ptq->pt->queues.queue_array[ptq->queue_nr];
  217. next:
  218. buffer = auxtrace_buffer__next(queue, buffer);
  219. if (!buffer) {
  220. if (old_buffer)
  221. auxtrace_buffer__drop_data(old_buffer);
  222. b->len = 0;
  223. return 0;
  224. }
  225. ptq->buffer = buffer;
  226. if (!buffer->data) {
  227. int fd = perf_data_file__fd(ptq->pt->session->file);
  228. buffer->data = auxtrace_buffer__get_data(buffer, fd);
  229. if (!buffer->data)
  230. return -ENOMEM;
  231. }
  232. if (ptq->pt->snapshot_mode && !buffer->consecutive && old_buffer &&
  233. intel_pt_do_fix_overlap(ptq->pt, old_buffer, buffer))
  234. return -ENOMEM;
  235. if (buffer->use_data) {
  236. b->len = buffer->use_size;
  237. b->buf = buffer->use_data;
  238. } else {
  239. b->len = buffer->size;
  240. b->buf = buffer->data;
  241. }
  242. b->ref_timestamp = buffer->reference;
  243. /*
  244. * If in snapshot mode and the buffer has no usable data, get next
  245. * buffer and again check overlap against old_buffer.
  246. */
  247. if (ptq->pt->snapshot_mode && !b->len)
  248. goto next;
  249. if (old_buffer)
  250. auxtrace_buffer__drop_data(old_buffer);
  251. if (!old_buffer || ptq->pt->sampling_mode || (ptq->pt->snapshot_mode &&
  252. !buffer->consecutive)) {
  253. b->consecutive = false;
  254. b->trace_nr = buffer->buffer_nr + 1;
  255. } else {
  256. b->consecutive = true;
  257. }
  258. if (ptq->use_buffer_pid_tid && (ptq->pid != buffer->pid ||
  259. ptq->tid != buffer->tid))
  260. intel_pt_use_buffer_pid_tid(ptq, queue, buffer);
  261. if (ptq->step_through_buffers)
  262. ptq->stop = true;
  263. if (!b->len)
  264. return intel_pt_get_trace(b, data);
  265. return 0;
  266. }
  267. struct intel_pt_cache_entry {
  268. struct auxtrace_cache_entry entry;
  269. u64 insn_cnt;
  270. u64 byte_cnt;
  271. enum intel_pt_insn_op op;
  272. enum intel_pt_insn_branch branch;
  273. int length;
  274. int32_t rel;
  275. };
  276. static int intel_pt_config_div(const char *var, const char *value, void *data)
  277. {
  278. int *d = data;
  279. long val;
  280. if (!strcmp(var, "intel-pt.cache-divisor")) {
  281. val = strtol(value, NULL, 0);
  282. if (val > 0 && val <= INT_MAX)
  283. *d = val;
  284. }
  285. return 0;
  286. }
  287. static int intel_pt_cache_divisor(void)
  288. {
  289. static int d;
  290. if (d)
  291. return d;
  292. perf_config(intel_pt_config_div, &d);
  293. if (!d)
  294. d = 64;
  295. return d;
  296. }
  297. static unsigned int intel_pt_cache_size(struct dso *dso,
  298. struct machine *machine)
  299. {
  300. off_t size;
  301. size = dso__data_size(dso, machine);
  302. size /= intel_pt_cache_divisor();
  303. if (size < 1000)
  304. return 10;
  305. if (size > (1 << 21))
  306. return 21;
  307. return 32 - __builtin_clz(size);
  308. }
  309. static struct auxtrace_cache *intel_pt_cache(struct dso *dso,
  310. struct machine *machine)
  311. {
  312. struct auxtrace_cache *c;
  313. unsigned int bits;
  314. if (dso->auxtrace_cache)
  315. return dso->auxtrace_cache;
  316. bits = intel_pt_cache_size(dso, machine);
  317. /* Ignoring cache creation failure */
  318. c = auxtrace_cache__new(bits, sizeof(struct intel_pt_cache_entry), 200);
  319. dso->auxtrace_cache = c;
  320. return c;
  321. }
  322. static int intel_pt_cache_add(struct dso *dso, struct machine *machine,
  323. u64 offset, u64 insn_cnt, u64 byte_cnt,
  324. struct intel_pt_insn *intel_pt_insn)
  325. {
  326. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  327. struct intel_pt_cache_entry *e;
  328. int err;
  329. if (!c)
  330. return -ENOMEM;
  331. e = auxtrace_cache__alloc_entry(c);
  332. if (!e)
  333. return -ENOMEM;
  334. e->insn_cnt = insn_cnt;
  335. e->byte_cnt = byte_cnt;
  336. e->op = intel_pt_insn->op;
  337. e->branch = intel_pt_insn->branch;
  338. e->length = intel_pt_insn->length;
  339. e->rel = intel_pt_insn->rel;
  340. err = auxtrace_cache__add(c, offset, &e->entry);
  341. if (err)
  342. auxtrace_cache__free_entry(c, e);
  343. return err;
  344. }
  345. static struct intel_pt_cache_entry *
  346. intel_pt_cache_lookup(struct dso *dso, struct machine *machine, u64 offset)
  347. {
  348. struct auxtrace_cache *c = intel_pt_cache(dso, machine);
  349. if (!c)
  350. return NULL;
  351. return auxtrace_cache__lookup(dso->auxtrace_cache, offset);
  352. }
  353. static int intel_pt_walk_next_insn(struct intel_pt_insn *intel_pt_insn,
  354. uint64_t *insn_cnt_ptr, uint64_t *ip,
  355. uint64_t to_ip, uint64_t max_insn_cnt,
  356. void *data)
  357. {
  358. struct intel_pt_queue *ptq = data;
  359. struct machine *machine = ptq->pt->machine;
  360. struct thread *thread;
  361. struct addr_location al;
  362. unsigned char buf[1024];
  363. size_t bufsz;
  364. ssize_t len;
  365. int x86_64;
  366. u8 cpumode;
  367. u64 offset, start_offset, start_ip;
  368. u64 insn_cnt = 0;
  369. bool one_map = true;
  370. if (to_ip && *ip == to_ip)
  371. goto out_no_cache;
  372. bufsz = intel_pt_insn_max_size();
  373. if (*ip >= ptq->pt->kernel_start)
  374. cpumode = PERF_RECORD_MISC_KERNEL;
  375. else
  376. cpumode = PERF_RECORD_MISC_USER;
  377. thread = ptq->thread;
  378. if (!thread) {
  379. if (cpumode != PERF_RECORD_MISC_KERNEL)
  380. return -EINVAL;
  381. thread = ptq->pt->unknown_thread;
  382. }
  383. while (1) {
  384. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, *ip, &al);
  385. if (!al.map || !al.map->dso)
  386. return -EINVAL;
  387. if (al.map->dso->data.status == DSO_DATA_STATUS_ERROR &&
  388. dso__data_status_seen(al.map->dso,
  389. DSO_DATA_STATUS_SEEN_ITRACE))
  390. return -ENOENT;
  391. offset = al.map->map_ip(al.map, *ip);
  392. if (!to_ip && one_map) {
  393. struct intel_pt_cache_entry *e;
  394. e = intel_pt_cache_lookup(al.map->dso, machine, offset);
  395. if (e &&
  396. (!max_insn_cnt || e->insn_cnt <= max_insn_cnt)) {
  397. *insn_cnt_ptr = e->insn_cnt;
  398. *ip += e->byte_cnt;
  399. intel_pt_insn->op = e->op;
  400. intel_pt_insn->branch = e->branch;
  401. intel_pt_insn->length = e->length;
  402. intel_pt_insn->rel = e->rel;
  403. intel_pt_log_insn_no_data(intel_pt_insn, *ip);
  404. return 0;
  405. }
  406. }
  407. start_offset = offset;
  408. start_ip = *ip;
  409. /* Load maps to ensure dso->is_64_bit has been updated */
  410. map__load(al.map);
  411. x86_64 = al.map->dso->is_64_bit;
  412. while (1) {
  413. len = dso__data_read_offset(al.map->dso, machine,
  414. offset, buf, bufsz);
  415. if (len <= 0)
  416. return -EINVAL;
  417. if (intel_pt_get_insn(buf, len, x86_64, intel_pt_insn))
  418. return -EINVAL;
  419. intel_pt_log_insn(intel_pt_insn, *ip);
  420. insn_cnt += 1;
  421. if (intel_pt_insn->branch != INTEL_PT_BR_NO_BRANCH)
  422. goto out;
  423. if (max_insn_cnt && insn_cnt >= max_insn_cnt)
  424. goto out_no_cache;
  425. *ip += intel_pt_insn->length;
  426. if (to_ip && *ip == to_ip)
  427. goto out_no_cache;
  428. if (*ip >= al.map->end)
  429. break;
  430. offset += intel_pt_insn->length;
  431. }
  432. one_map = false;
  433. }
  434. out:
  435. *insn_cnt_ptr = insn_cnt;
  436. if (!one_map)
  437. goto out_no_cache;
  438. /*
  439. * Didn't lookup in the 'to_ip' case, so do it now to prevent duplicate
  440. * entries.
  441. */
  442. if (to_ip) {
  443. struct intel_pt_cache_entry *e;
  444. e = intel_pt_cache_lookup(al.map->dso, machine, start_offset);
  445. if (e)
  446. return 0;
  447. }
  448. /* Ignore cache errors */
  449. intel_pt_cache_add(al.map->dso, machine, start_offset, insn_cnt,
  450. *ip - start_ip, intel_pt_insn);
  451. return 0;
  452. out_no_cache:
  453. *insn_cnt_ptr = insn_cnt;
  454. return 0;
  455. }
  456. static bool intel_pt_match_pgd_ip(struct intel_pt *pt, uint64_t ip,
  457. uint64_t offset, const char *filename)
  458. {
  459. struct addr_filter *filt;
  460. bool have_filter = false;
  461. bool hit_tracestop = false;
  462. bool hit_filter = false;
  463. list_for_each_entry(filt, &pt->filts.head, list) {
  464. if (filt->start)
  465. have_filter = true;
  466. if ((filename && !filt->filename) ||
  467. (!filename && filt->filename) ||
  468. (filename && strcmp(filename, filt->filename)))
  469. continue;
  470. if (!(offset >= filt->addr && offset < filt->addr + filt->size))
  471. continue;
  472. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s hit filter: %s offset %#"PRIx64" size %#"PRIx64"\n",
  473. ip, offset, filename ? filename : "[kernel]",
  474. filt->start ? "filter" : "stop",
  475. filt->addr, filt->size);
  476. if (filt->start)
  477. hit_filter = true;
  478. else
  479. hit_tracestop = true;
  480. }
  481. if (!hit_tracestop && !hit_filter)
  482. intel_pt_log("TIP.PGD ip %#"PRIx64" offset %#"PRIx64" in %s is not in a filter region\n",
  483. ip, offset, filename ? filename : "[kernel]");
  484. return hit_tracestop || (have_filter && !hit_filter);
  485. }
  486. static int __intel_pt_pgd_ip(uint64_t ip, void *data)
  487. {
  488. struct intel_pt_queue *ptq = data;
  489. struct thread *thread;
  490. struct addr_location al;
  491. u8 cpumode;
  492. u64 offset;
  493. if (ip >= ptq->pt->kernel_start)
  494. return intel_pt_match_pgd_ip(ptq->pt, ip, ip, NULL);
  495. cpumode = PERF_RECORD_MISC_USER;
  496. thread = ptq->thread;
  497. if (!thread)
  498. return -EINVAL;
  499. thread__find_addr_map(thread, cpumode, MAP__FUNCTION, ip, &al);
  500. if (!al.map || !al.map->dso)
  501. return -EINVAL;
  502. offset = al.map->map_ip(al.map, ip);
  503. return intel_pt_match_pgd_ip(ptq->pt, ip, offset,
  504. al.map->dso->long_name);
  505. }
  506. static bool intel_pt_pgd_ip(uint64_t ip, void *data)
  507. {
  508. return __intel_pt_pgd_ip(ip, data) > 0;
  509. }
  510. static bool intel_pt_get_config(struct intel_pt *pt,
  511. struct perf_event_attr *attr, u64 *config)
  512. {
  513. if (attr->type == pt->pmu_type) {
  514. if (config)
  515. *config = attr->config;
  516. return true;
  517. }
  518. return false;
  519. }
  520. static bool intel_pt_exclude_kernel(struct intel_pt *pt)
  521. {
  522. struct perf_evsel *evsel;
  523. evlist__for_each_entry(pt->session->evlist, evsel) {
  524. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  525. !evsel->attr.exclude_kernel)
  526. return false;
  527. }
  528. return true;
  529. }
  530. static bool intel_pt_return_compression(struct intel_pt *pt)
  531. {
  532. struct perf_evsel *evsel;
  533. u64 config;
  534. if (!pt->noretcomp_bit)
  535. return true;
  536. evlist__for_each_entry(pt->session->evlist, evsel) {
  537. if (intel_pt_get_config(pt, &evsel->attr, &config) &&
  538. (config & pt->noretcomp_bit))
  539. return false;
  540. }
  541. return true;
  542. }
  543. static unsigned int intel_pt_mtc_period(struct intel_pt *pt)
  544. {
  545. struct perf_evsel *evsel;
  546. unsigned int shift;
  547. u64 config;
  548. if (!pt->mtc_freq_bits)
  549. return 0;
  550. for (shift = 0, config = pt->mtc_freq_bits; !(config & 1); shift++)
  551. config >>= 1;
  552. evlist__for_each_entry(pt->session->evlist, evsel) {
  553. if (intel_pt_get_config(pt, &evsel->attr, &config))
  554. return (config & pt->mtc_freq_bits) >> shift;
  555. }
  556. return 0;
  557. }
  558. static bool intel_pt_timeless_decoding(struct intel_pt *pt)
  559. {
  560. struct perf_evsel *evsel;
  561. bool timeless_decoding = true;
  562. u64 config;
  563. if (!pt->tsc_bit || !pt->cap_user_time_zero)
  564. return true;
  565. evlist__for_each_entry(pt->session->evlist, evsel) {
  566. if (!(evsel->attr.sample_type & PERF_SAMPLE_TIME))
  567. return true;
  568. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  569. if (config & pt->tsc_bit)
  570. timeless_decoding = false;
  571. else
  572. return true;
  573. }
  574. }
  575. return timeless_decoding;
  576. }
  577. static bool intel_pt_tracing_kernel(struct intel_pt *pt)
  578. {
  579. struct perf_evsel *evsel;
  580. evlist__for_each_entry(pt->session->evlist, evsel) {
  581. if (intel_pt_get_config(pt, &evsel->attr, NULL) &&
  582. !evsel->attr.exclude_kernel)
  583. return true;
  584. }
  585. return false;
  586. }
  587. static bool intel_pt_have_tsc(struct intel_pt *pt)
  588. {
  589. struct perf_evsel *evsel;
  590. bool have_tsc = false;
  591. u64 config;
  592. if (!pt->tsc_bit)
  593. return false;
  594. evlist__for_each_entry(pt->session->evlist, evsel) {
  595. if (intel_pt_get_config(pt, &evsel->attr, &config)) {
  596. if (config & pt->tsc_bit)
  597. have_tsc = true;
  598. else
  599. return false;
  600. }
  601. }
  602. return have_tsc;
  603. }
  604. static u64 intel_pt_ns_to_ticks(const struct intel_pt *pt, u64 ns)
  605. {
  606. u64 quot, rem;
  607. quot = ns / pt->tc.time_mult;
  608. rem = ns % pt->tc.time_mult;
  609. return (quot << pt->tc.time_shift) + (rem << pt->tc.time_shift) /
  610. pt->tc.time_mult;
  611. }
  612. static struct intel_pt_queue *intel_pt_alloc_queue(struct intel_pt *pt,
  613. unsigned int queue_nr)
  614. {
  615. struct intel_pt_params params = { .get_trace = 0, };
  616. struct intel_pt_queue *ptq;
  617. ptq = zalloc(sizeof(struct intel_pt_queue));
  618. if (!ptq)
  619. return NULL;
  620. if (pt->synth_opts.callchain) {
  621. size_t sz = sizeof(struct ip_callchain);
  622. sz += pt->synth_opts.callchain_sz * sizeof(u64);
  623. ptq->chain = zalloc(sz);
  624. if (!ptq->chain)
  625. goto out_free;
  626. }
  627. if (pt->synth_opts.last_branch) {
  628. size_t sz = sizeof(struct branch_stack);
  629. sz += pt->synth_opts.last_branch_sz *
  630. sizeof(struct branch_entry);
  631. ptq->last_branch = zalloc(sz);
  632. if (!ptq->last_branch)
  633. goto out_free;
  634. ptq->last_branch_rb = zalloc(sz);
  635. if (!ptq->last_branch_rb)
  636. goto out_free;
  637. }
  638. ptq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
  639. if (!ptq->event_buf)
  640. goto out_free;
  641. ptq->pt = pt;
  642. ptq->queue_nr = queue_nr;
  643. ptq->exclude_kernel = intel_pt_exclude_kernel(pt);
  644. ptq->pid = -1;
  645. ptq->tid = -1;
  646. ptq->cpu = -1;
  647. ptq->next_tid = -1;
  648. params.get_trace = intel_pt_get_trace;
  649. params.walk_insn = intel_pt_walk_next_insn;
  650. params.data = ptq;
  651. params.return_compression = intel_pt_return_compression(pt);
  652. params.max_non_turbo_ratio = pt->max_non_turbo_ratio;
  653. params.mtc_period = intel_pt_mtc_period(pt);
  654. params.tsc_ctc_ratio_n = pt->tsc_ctc_ratio_n;
  655. params.tsc_ctc_ratio_d = pt->tsc_ctc_ratio_d;
  656. if (pt->filts.cnt > 0)
  657. params.pgd_ip = intel_pt_pgd_ip;
  658. if (pt->synth_opts.instructions) {
  659. if (pt->synth_opts.period) {
  660. switch (pt->synth_opts.period_type) {
  661. case PERF_ITRACE_PERIOD_INSTRUCTIONS:
  662. params.period_type =
  663. INTEL_PT_PERIOD_INSTRUCTIONS;
  664. params.period = pt->synth_opts.period;
  665. break;
  666. case PERF_ITRACE_PERIOD_TICKS:
  667. params.period_type = INTEL_PT_PERIOD_TICKS;
  668. params.period = pt->synth_opts.period;
  669. break;
  670. case PERF_ITRACE_PERIOD_NANOSECS:
  671. params.period_type = INTEL_PT_PERIOD_TICKS;
  672. params.period = intel_pt_ns_to_ticks(pt,
  673. pt->synth_opts.period);
  674. break;
  675. default:
  676. break;
  677. }
  678. }
  679. if (!params.period) {
  680. params.period_type = INTEL_PT_PERIOD_INSTRUCTIONS;
  681. params.period = 1;
  682. }
  683. }
  684. ptq->decoder = intel_pt_decoder_new(&params);
  685. if (!ptq->decoder)
  686. goto out_free;
  687. return ptq;
  688. out_free:
  689. zfree(&ptq->event_buf);
  690. zfree(&ptq->last_branch);
  691. zfree(&ptq->last_branch_rb);
  692. zfree(&ptq->chain);
  693. free(ptq);
  694. return NULL;
  695. }
  696. static void intel_pt_free_queue(void *priv)
  697. {
  698. struct intel_pt_queue *ptq = priv;
  699. if (!ptq)
  700. return;
  701. thread__zput(ptq->thread);
  702. intel_pt_decoder_free(ptq->decoder);
  703. zfree(&ptq->event_buf);
  704. zfree(&ptq->last_branch);
  705. zfree(&ptq->last_branch_rb);
  706. zfree(&ptq->chain);
  707. free(ptq);
  708. }
  709. static void intel_pt_set_pid_tid_cpu(struct intel_pt *pt,
  710. struct auxtrace_queue *queue)
  711. {
  712. struct intel_pt_queue *ptq = queue->priv;
  713. if (queue->tid == -1 || pt->have_sched_switch) {
  714. ptq->tid = machine__get_current_tid(pt->machine, ptq->cpu);
  715. thread__zput(ptq->thread);
  716. }
  717. if (!ptq->thread && ptq->tid != -1)
  718. ptq->thread = machine__find_thread(pt->machine, -1, ptq->tid);
  719. if (ptq->thread) {
  720. ptq->pid = ptq->thread->pid_;
  721. if (queue->cpu == -1)
  722. ptq->cpu = ptq->thread->cpu;
  723. }
  724. }
  725. static void intel_pt_sample_flags(struct intel_pt_queue *ptq)
  726. {
  727. if (ptq->state->flags & INTEL_PT_ABORT_TX) {
  728. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_TX_ABORT;
  729. } else if (ptq->state->flags & INTEL_PT_ASYNC) {
  730. if (ptq->state->to_ip)
  731. ptq->flags = PERF_IP_FLAG_BRANCH | PERF_IP_FLAG_CALL |
  732. PERF_IP_FLAG_ASYNC |
  733. PERF_IP_FLAG_INTERRUPT;
  734. else
  735. ptq->flags = PERF_IP_FLAG_BRANCH |
  736. PERF_IP_FLAG_TRACE_END;
  737. ptq->insn_len = 0;
  738. } else {
  739. if (ptq->state->from_ip)
  740. ptq->flags = intel_pt_insn_type(ptq->state->insn_op);
  741. else
  742. ptq->flags = PERF_IP_FLAG_BRANCH |
  743. PERF_IP_FLAG_TRACE_BEGIN;
  744. if (ptq->state->flags & INTEL_PT_IN_TX)
  745. ptq->flags |= PERF_IP_FLAG_IN_TX;
  746. ptq->insn_len = ptq->state->insn_len;
  747. }
  748. }
  749. static int intel_pt_setup_queue(struct intel_pt *pt,
  750. struct auxtrace_queue *queue,
  751. unsigned int queue_nr)
  752. {
  753. struct intel_pt_queue *ptq = queue->priv;
  754. if (list_empty(&queue->head))
  755. return 0;
  756. if (!ptq) {
  757. ptq = intel_pt_alloc_queue(pt, queue_nr);
  758. if (!ptq)
  759. return -ENOMEM;
  760. queue->priv = ptq;
  761. if (queue->cpu != -1)
  762. ptq->cpu = queue->cpu;
  763. ptq->tid = queue->tid;
  764. if (pt->sampling_mode) {
  765. if (pt->timeless_decoding)
  766. ptq->step_through_buffers = true;
  767. if (pt->timeless_decoding || !pt->have_sched_switch)
  768. ptq->use_buffer_pid_tid = true;
  769. }
  770. }
  771. if (!ptq->on_heap &&
  772. (!pt->sync_switch ||
  773. ptq->switch_state != INTEL_PT_SS_EXPECTING_SWITCH_EVENT)) {
  774. const struct intel_pt_state *state;
  775. int ret;
  776. if (pt->timeless_decoding)
  777. return 0;
  778. intel_pt_log("queue %u getting timestamp\n", queue_nr);
  779. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  780. queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  781. while (1) {
  782. state = intel_pt_decode(ptq->decoder);
  783. if (state->err) {
  784. if (state->err == INTEL_PT_ERR_NODATA) {
  785. intel_pt_log("queue %u has no timestamp\n",
  786. queue_nr);
  787. return 0;
  788. }
  789. continue;
  790. }
  791. if (state->timestamp)
  792. break;
  793. }
  794. ptq->timestamp = state->timestamp;
  795. intel_pt_log("queue %u timestamp 0x%" PRIx64 "\n",
  796. queue_nr, ptq->timestamp);
  797. ptq->state = state;
  798. ptq->have_sample = true;
  799. intel_pt_sample_flags(ptq);
  800. ret = auxtrace_heap__add(&pt->heap, queue_nr, ptq->timestamp);
  801. if (ret)
  802. return ret;
  803. ptq->on_heap = true;
  804. }
  805. return 0;
  806. }
  807. static int intel_pt_setup_queues(struct intel_pt *pt)
  808. {
  809. unsigned int i;
  810. int ret;
  811. for (i = 0; i < pt->queues.nr_queues; i++) {
  812. ret = intel_pt_setup_queue(pt, &pt->queues.queue_array[i], i);
  813. if (ret)
  814. return ret;
  815. }
  816. return 0;
  817. }
  818. static inline void intel_pt_copy_last_branch_rb(struct intel_pt_queue *ptq)
  819. {
  820. struct branch_stack *bs_src = ptq->last_branch_rb;
  821. struct branch_stack *bs_dst = ptq->last_branch;
  822. size_t nr = 0;
  823. bs_dst->nr = bs_src->nr;
  824. if (!bs_src->nr)
  825. return;
  826. nr = ptq->pt->synth_opts.last_branch_sz - ptq->last_branch_pos;
  827. memcpy(&bs_dst->entries[0],
  828. &bs_src->entries[ptq->last_branch_pos],
  829. sizeof(struct branch_entry) * nr);
  830. if (bs_src->nr >= ptq->pt->synth_opts.last_branch_sz) {
  831. memcpy(&bs_dst->entries[nr],
  832. &bs_src->entries[0],
  833. sizeof(struct branch_entry) * ptq->last_branch_pos);
  834. }
  835. }
  836. static inline void intel_pt_reset_last_branch_rb(struct intel_pt_queue *ptq)
  837. {
  838. ptq->last_branch_pos = 0;
  839. ptq->last_branch_rb->nr = 0;
  840. }
  841. static void intel_pt_update_last_branch_rb(struct intel_pt_queue *ptq)
  842. {
  843. const struct intel_pt_state *state = ptq->state;
  844. struct branch_stack *bs = ptq->last_branch_rb;
  845. struct branch_entry *be;
  846. if (!ptq->last_branch_pos)
  847. ptq->last_branch_pos = ptq->pt->synth_opts.last_branch_sz;
  848. ptq->last_branch_pos -= 1;
  849. be = &bs->entries[ptq->last_branch_pos];
  850. be->from = state->from_ip;
  851. be->to = state->to_ip;
  852. be->flags.abort = !!(state->flags & INTEL_PT_ABORT_TX);
  853. be->flags.in_tx = !!(state->flags & INTEL_PT_IN_TX);
  854. /* No support for mispredict */
  855. be->flags.mispred = ptq->pt->mispred_all;
  856. if (bs->nr < ptq->pt->synth_opts.last_branch_sz)
  857. bs->nr += 1;
  858. }
  859. static int intel_pt_inject_event(union perf_event *event,
  860. struct perf_sample *sample, u64 type,
  861. bool swapped)
  862. {
  863. event->header.size = perf_event__sample_event_size(sample, type, 0);
  864. return perf_event__synthesize_sample(event, type, 0, sample, swapped);
  865. }
  866. static int intel_pt_synth_branch_sample(struct intel_pt_queue *ptq)
  867. {
  868. int ret;
  869. struct intel_pt *pt = ptq->pt;
  870. union perf_event *event = ptq->event_buf;
  871. struct perf_sample sample = { .ip = 0, };
  872. struct dummy_branch_stack {
  873. u64 nr;
  874. struct branch_entry entries;
  875. } dummy_bs;
  876. if (pt->branches_filter && !(pt->branches_filter & ptq->flags))
  877. return 0;
  878. if (pt->synth_opts.initial_skip &&
  879. pt->num_events++ < pt->synth_opts.initial_skip)
  880. return 0;
  881. event->sample.header.type = PERF_RECORD_SAMPLE;
  882. event->sample.header.misc = PERF_RECORD_MISC_USER;
  883. event->sample.header.size = sizeof(struct perf_event_header);
  884. if (!pt->timeless_decoding)
  885. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  886. sample.cpumode = PERF_RECORD_MISC_USER;
  887. sample.ip = ptq->state->from_ip;
  888. sample.pid = ptq->pid;
  889. sample.tid = ptq->tid;
  890. sample.addr = ptq->state->to_ip;
  891. sample.id = ptq->pt->branches_id;
  892. sample.stream_id = ptq->pt->branches_id;
  893. sample.period = 1;
  894. sample.cpu = ptq->cpu;
  895. sample.flags = ptq->flags;
  896. sample.insn_len = ptq->insn_len;
  897. /*
  898. * perf report cannot handle events without a branch stack when using
  899. * SORT_MODE__BRANCH so make a dummy one.
  900. */
  901. if (pt->synth_opts.last_branch && sort__mode == SORT_MODE__BRANCH) {
  902. dummy_bs = (struct dummy_branch_stack){
  903. .nr = 1,
  904. .entries = {
  905. .from = sample.ip,
  906. .to = sample.addr,
  907. },
  908. };
  909. sample.branch_stack = (struct branch_stack *)&dummy_bs;
  910. }
  911. if (pt->synth_opts.inject) {
  912. ret = intel_pt_inject_event(event, &sample,
  913. pt->branches_sample_type,
  914. pt->synth_needs_swap);
  915. if (ret)
  916. return ret;
  917. }
  918. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  919. if (ret)
  920. pr_err("Intel Processor Trace: failed to deliver branch event, error %d\n",
  921. ret);
  922. return ret;
  923. }
  924. static int intel_pt_synth_instruction_sample(struct intel_pt_queue *ptq)
  925. {
  926. int ret;
  927. struct intel_pt *pt = ptq->pt;
  928. union perf_event *event = ptq->event_buf;
  929. struct perf_sample sample = { .ip = 0, };
  930. if (pt->synth_opts.initial_skip &&
  931. pt->num_events++ < pt->synth_opts.initial_skip)
  932. return 0;
  933. event->sample.header.type = PERF_RECORD_SAMPLE;
  934. event->sample.header.misc = PERF_RECORD_MISC_USER;
  935. event->sample.header.size = sizeof(struct perf_event_header);
  936. if (!pt->timeless_decoding)
  937. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  938. sample.cpumode = PERF_RECORD_MISC_USER;
  939. sample.ip = ptq->state->from_ip;
  940. sample.pid = ptq->pid;
  941. sample.tid = ptq->tid;
  942. sample.addr = ptq->state->to_ip;
  943. sample.id = ptq->pt->instructions_id;
  944. sample.stream_id = ptq->pt->instructions_id;
  945. sample.period = ptq->state->tot_insn_cnt - ptq->last_insn_cnt;
  946. sample.cpu = ptq->cpu;
  947. sample.flags = ptq->flags;
  948. sample.insn_len = ptq->insn_len;
  949. ptq->last_insn_cnt = ptq->state->tot_insn_cnt;
  950. if (pt->synth_opts.callchain) {
  951. thread_stack__sample(ptq->thread, ptq->chain,
  952. pt->synth_opts.callchain_sz, sample.ip);
  953. sample.callchain = ptq->chain;
  954. }
  955. if (pt->synth_opts.last_branch) {
  956. intel_pt_copy_last_branch_rb(ptq);
  957. sample.branch_stack = ptq->last_branch;
  958. }
  959. if (pt->synth_opts.inject) {
  960. ret = intel_pt_inject_event(event, &sample,
  961. pt->instructions_sample_type,
  962. pt->synth_needs_swap);
  963. if (ret)
  964. return ret;
  965. }
  966. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  967. if (ret)
  968. pr_err("Intel Processor Trace: failed to deliver instruction event, error %d\n",
  969. ret);
  970. if (pt->synth_opts.last_branch)
  971. intel_pt_reset_last_branch_rb(ptq);
  972. return ret;
  973. }
  974. static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq)
  975. {
  976. int ret;
  977. struct intel_pt *pt = ptq->pt;
  978. union perf_event *event = ptq->event_buf;
  979. struct perf_sample sample = { .ip = 0, };
  980. if (pt->synth_opts.initial_skip &&
  981. pt->num_events++ < pt->synth_opts.initial_skip)
  982. return 0;
  983. event->sample.header.type = PERF_RECORD_SAMPLE;
  984. event->sample.header.misc = PERF_RECORD_MISC_USER;
  985. event->sample.header.size = sizeof(struct perf_event_header);
  986. if (!pt->timeless_decoding)
  987. sample.time = tsc_to_perf_time(ptq->timestamp, &pt->tc);
  988. sample.cpumode = PERF_RECORD_MISC_USER;
  989. sample.ip = ptq->state->from_ip;
  990. sample.pid = ptq->pid;
  991. sample.tid = ptq->tid;
  992. sample.addr = ptq->state->to_ip;
  993. sample.id = ptq->pt->transactions_id;
  994. sample.stream_id = ptq->pt->transactions_id;
  995. sample.period = 1;
  996. sample.cpu = ptq->cpu;
  997. sample.flags = ptq->flags;
  998. sample.insn_len = ptq->insn_len;
  999. if (pt->synth_opts.callchain) {
  1000. thread_stack__sample(ptq->thread, ptq->chain,
  1001. pt->synth_opts.callchain_sz, sample.ip);
  1002. sample.callchain = ptq->chain;
  1003. }
  1004. if (pt->synth_opts.last_branch) {
  1005. intel_pt_copy_last_branch_rb(ptq);
  1006. sample.branch_stack = ptq->last_branch;
  1007. }
  1008. if (pt->synth_opts.inject) {
  1009. ret = intel_pt_inject_event(event, &sample,
  1010. pt->transactions_sample_type,
  1011. pt->synth_needs_swap);
  1012. if (ret)
  1013. return ret;
  1014. }
  1015. ret = perf_session__deliver_synth_event(pt->session, event, &sample);
  1016. if (ret)
  1017. pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
  1018. ret);
  1019. if (pt->synth_opts.last_branch)
  1020. intel_pt_reset_last_branch_rb(ptq);
  1021. return ret;
  1022. }
  1023. static int intel_pt_synth_error(struct intel_pt *pt, int code, int cpu,
  1024. pid_t pid, pid_t tid, u64 ip)
  1025. {
  1026. union perf_event event;
  1027. char msg[MAX_AUXTRACE_ERROR_MSG];
  1028. int err;
  1029. intel_pt__strerror(code, msg, MAX_AUXTRACE_ERROR_MSG);
  1030. auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
  1031. code, cpu, pid, tid, ip, msg);
  1032. err = perf_session__deliver_synth_event(pt->session, &event, NULL);
  1033. if (err)
  1034. pr_err("Intel Processor Trace: failed to deliver error event, error %d\n",
  1035. err);
  1036. return err;
  1037. }
  1038. static int intel_pt_next_tid(struct intel_pt *pt, struct intel_pt_queue *ptq)
  1039. {
  1040. struct auxtrace_queue *queue;
  1041. pid_t tid = ptq->next_tid;
  1042. int err;
  1043. if (tid == -1)
  1044. return 0;
  1045. intel_pt_log("switch: cpu %d tid %d\n", ptq->cpu, tid);
  1046. err = machine__set_current_tid(pt->machine, ptq->cpu, -1, tid);
  1047. queue = &pt->queues.queue_array[ptq->queue_nr];
  1048. intel_pt_set_pid_tid_cpu(pt, queue);
  1049. ptq->next_tid = -1;
  1050. return err;
  1051. }
  1052. static inline bool intel_pt_is_switch_ip(struct intel_pt_queue *ptq, u64 ip)
  1053. {
  1054. struct intel_pt *pt = ptq->pt;
  1055. return ip == pt->switch_ip &&
  1056. (ptq->flags & PERF_IP_FLAG_BRANCH) &&
  1057. !(ptq->flags & (PERF_IP_FLAG_CONDITIONAL | PERF_IP_FLAG_ASYNC |
  1058. PERF_IP_FLAG_INTERRUPT | PERF_IP_FLAG_TX_ABORT));
  1059. }
  1060. static int intel_pt_sample(struct intel_pt_queue *ptq)
  1061. {
  1062. const struct intel_pt_state *state = ptq->state;
  1063. struct intel_pt *pt = ptq->pt;
  1064. int err;
  1065. if (!ptq->have_sample)
  1066. return 0;
  1067. ptq->have_sample = false;
  1068. if (pt->sample_instructions &&
  1069. (state->type & INTEL_PT_INSTRUCTION) &&
  1070. (!pt->synth_opts.initial_skip ||
  1071. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1072. err = intel_pt_synth_instruction_sample(ptq);
  1073. if (err)
  1074. return err;
  1075. }
  1076. if (pt->sample_transactions &&
  1077. (state->type & INTEL_PT_TRANSACTION) &&
  1078. (!pt->synth_opts.initial_skip ||
  1079. pt->num_events++ >= pt->synth_opts.initial_skip)) {
  1080. err = intel_pt_synth_transaction_sample(ptq);
  1081. if (err)
  1082. return err;
  1083. }
  1084. if (!(state->type & INTEL_PT_BRANCH))
  1085. return 0;
  1086. if (pt->synth_opts.callchain || pt->synth_opts.thread_stack)
  1087. thread_stack__event(ptq->thread, ptq->flags, state->from_ip,
  1088. state->to_ip, ptq->insn_len,
  1089. state->trace_nr);
  1090. else
  1091. thread_stack__set_trace_nr(ptq->thread, state->trace_nr);
  1092. if (pt->sample_branches) {
  1093. err = intel_pt_synth_branch_sample(ptq);
  1094. if (err)
  1095. return err;
  1096. }
  1097. if (pt->synth_opts.last_branch)
  1098. intel_pt_update_last_branch_rb(ptq);
  1099. if (!pt->sync_switch)
  1100. return 0;
  1101. if (intel_pt_is_switch_ip(ptq, state->to_ip)) {
  1102. switch (ptq->switch_state) {
  1103. case INTEL_PT_SS_UNKNOWN:
  1104. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1105. err = intel_pt_next_tid(pt, ptq);
  1106. if (err)
  1107. return err;
  1108. ptq->switch_state = INTEL_PT_SS_TRACING;
  1109. break;
  1110. default:
  1111. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_EVENT;
  1112. return 1;
  1113. }
  1114. } else if (!state->to_ip) {
  1115. ptq->switch_state = INTEL_PT_SS_NOT_TRACING;
  1116. } else if (ptq->switch_state == INTEL_PT_SS_NOT_TRACING) {
  1117. ptq->switch_state = INTEL_PT_SS_UNKNOWN;
  1118. } else if (ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1119. state->to_ip == pt->ptss_ip &&
  1120. (ptq->flags & PERF_IP_FLAG_CALL)) {
  1121. ptq->switch_state = INTEL_PT_SS_TRACING;
  1122. }
  1123. return 0;
  1124. }
  1125. static u64 intel_pt_switch_ip(struct intel_pt *pt, u64 *ptss_ip)
  1126. {
  1127. struct machine *machine = pt->machine;
  1128. struct map *map;
  1129. struct symbol *sym, *start;
  1130. u64 ip, switch_ip = 0;
  1131. const char *ptss;
  1132. if (ptss_ip)
  1133. *ptss_ip = 0;
  1134. map = machine__kernel_map(machine);
  1135. if (!map)
  1136. return 0;
  1137. if (map__load(map))
  1138. return 0;
  1139. start = dso__first_symbol(map->dso, MAP__FUNCTION);
  1140. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1141. if (sym->binding == STB_GLOBAL &&
  1142. !strcmp(sym->name, "__switch_to")) {
  1143. ip = map->unmap_ip(map, sym->start);
  1144. if (ip >= map->start && ip < map->end) {
  1145. switch_ip = ip;
  1146. break;
  1147. }
  1148. }
  1149. }
  1150. if (!switch_ip || !ptss_ip)
  1151. return 0;
  1152. if (pt->have_sched_switch == 1)
  1153. ptss = "perf_trace_sched_switch";
  1154. else
  1155. ptss = "__perf_event_task_sched_out";
  1156. for (sym = start; sym; sym = dso__next_symbol(sym)) {
  1157. if (!strcmp(sym->name, ptss)) {
  1158. ip = map->unmap_ip(map, sym->start);
  1159. if (ip >= map->start && ip < map->end) {
  1160. *ptss_ip = ip;
  1161. break;
  1162. }
  1163. }
  1164. }
  1165. return switch_ip;
  1166. }
  1167. static int intel_pt_run_decoder(struct intel_pt_queue *ptq, u64 *timestamp)
  1168. {
  1169. const struct intel_pt_state *state = ptq->state;
  1170. struct intel_pt *pt = ptq->pt;
  1171. int err;
  1172. if (!pt->kernel_start) {
  1173. pt->kernel_start = machine__kernel_start(pt->machine);
  1174. if (pt->per_cpu_mmaps &&
  1175. (pt->have_sched_switch == 1 || pt->have_sched_switch == 3) &&
  1176. !pt->timeless_decoding && intel_pt_tracing_kernel(pt) &&
  1177. !pt->sampling_mode) {
  1178. pt->switch_ip = intel_pt_switch_ip(pt, &pt->ptss_ip);
  1179. if (pt->switch_ip) {
  1180. intel_pt_log("switch_ip: %"PRIx64" ptss_ip: %"PRIx64"\n",
  1181. pt->switch_ip, pt->ptss_ip);
  1182. pt->sync_switch = true;
  1183. }
  1184. }
  1185. }
  1186. intel_pt_log("queue %u decoding cpu %d pid %d tid %d\n",
  1187. ptq->queue_nr, ptq->cpu, ptq->pid, ptq->tid);
  1188. while (1) {
  1189. err = intel_pt_sample(ptq);
  1190. if (err)
  1191. return err;
  1192. state = intel_pt_decode(ptq->decoder);
  1193. if (state->err) {
  1194. if (state->err == INTEL_PT_ERR_NODATA)
  1195. return 1;
  1196. if (pt->sync_switch &&
  1197. state->from_ip >= pt->kernel_start) {
  1198. pt->sync_switch = false;
  1199. intel_pt_next_tid(pt, ptq);
  1200. }
  1201. if (pt->synth_opts.errors) {
  1202. err = intel_pt_synth_error(pt, state->err,
  1203. ptq->cpu, ptq->pid,
  1204. ptq->tid,
  1205. state->from_ip);
  1206. if (err)
  1207. return err;
  1208. }
  1209. continue;
  1210. }
  1211. ptq->state = state;
  1212. ptq->have_sample = true;
  1213. intel_pt_sample_flags(ptq);
  1214. /* Use estimated TSC upon return to user space */
  1215. if (pt->est_tsc &&
  1216. (state->from_ip >= pt->kernel_start || !state->from_ip) &&
  1217. state->to_ip && state->to_ip < pt->kernel_start) {
  1218. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1219. state->timestamp, state->est_timestamp);
  1220. ptq->timestamp = state->est_timestamp;
  1221. /* Use estimated TSC in unknown switch state */
  1222. } else if (pt->sync_switch &&
  1223. ptq->switch_state == INTEL_PT_SS_UNKNOWN &&
  1224. intel_pt_is_switch_ip(ptq, state->to_ip) &&
  1225. ptq->next_tid == -1) {
  1226. intel_pt_log("TSC %"PRIx64" est. TSC %"PRIx64"\n",
  1227. state->timestamp, state->est_timestamp);
  1228. ptq->timestamp = state->est_timestamp;
  1229. } else if (state->timestamp > ptq->timestamp) {
  1230. ptq->timestamp = state->timestamp;
  1231. }
  1232. if (!pt->timeless_decoding && ptq->timestamp >= *timestamp) {
  1233. *timestamp = ptq->timestamp;
  1234. return 0;
  1235. }
  1236. }
  1237. return 0;
  1238. }
  1239. static inline int intel_pt_update_queues(struct intel_pt *pt)
  1240. {
  1241. if (pt->queues.new_data) {
  1242. pt->queues.new_data = false;
  1243. return intel_pt_setup_queues(pt);
  1244. }
  1245. return 0;
  1246. }
  1247. static int intel_pt_process_queues(struct intel_pt *pt, u64 timestamp)
  1248. {
  1249. unsigned int queue_nr;
  1250. u64 ts;
  1251. int ret;
  1252. while (1) {
  1253. struct auxtrace_queue *queue;
  1254. struct intel_pt_queue *ptq;
  1255. if (!pt->heap.heap_cnt)
  1256. return 0;
  1257. if (pt->heap.heap_array[0].ordinal >= timestamp)
  1258. return 0;
  1259. queue_nr = pt->heap.heap_array[0].queue_nr;
  1260. queue = &pt->queues.queue_array[queue_nr];
  1261. ptq = queue->priv;
  1262. intel_pt_log("queue %u processing 0x%" PRIx64 " to 0x%" PRIx64 "\n",
  1263. queue_nr, pt->heap.heap_array[0].ordinal,
  1264. timestamp);
  1265. auxtrace_heap__pop(&pt->heap);
  1266. if (pt->heap.heap_cnt) {
  1267. ts = pt->heap.heap_array[0].ordinal + 1;
  1268. if (ts > timestamp)
  1269. ts = timestamp;
  1270. } else {
  1271. ts = timestamp;
  1272. }
  1273. intel_pt_set_pid_tid_cpu(pt, queue);
  1274. ret = intel_pt_run_decoder(ptq, &ts);
  1275. if (ret < 0) {
  1276. auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1277. return ret;
  1278. }
  1279. if (!ret) {
  1280. ret = auxtrace_heap__add(&pt->heap, queue_nr, ts);
  1281. if (ret < 0)
  1282. return ret;
  1283. } else {
  1284. ptq->on_heap = false;
  1285. }
  1286. }
  1287. return 0;
  1288. }
  1289. static int intel_pt_process_timeless_queues(struct intel_pt *pt, pid_t tid,
  1290. u64 time_)
  1291. {
  1292. struct auxtrace_queues *queues = &pt->queues;
  1293. unsigned int i;
  1294. u64 ts = 0;
  1295. for (i = 0; i < queues->nr_queues; i++) {
  1296. struct auxtrace_queue *queue = &pt->queues.queue_array[i];
  1297. struct intel_pt_queue *ptq = queue->priv;
  1298. if (ptq && (tid == -1 || ptq->tid == tid)) {
  1299. ptq->time = time_;
  1300. intel_pt_set_pid_tid_cpu(pt, queue);
  1301. intel_pt_run_decoder(ptq, &ts);
  1302. }
  1303. }
  1304. return 0;
  1305. }
  1306. static int intel_pt_lost(struct intel_pt *pt, struct perf_sample *sample)
  1307. {
  1308. return intel_pt_synth_error(pt, INTEL_PT_ERR_LOST, sample->cpu,
  1309. sample->pid, sample->tid, 0);
  1310. }
  1311. static struct intel_pt_queue *intel_pt_cpu_to_ptq(struct intel_pt *pt, int cpu)
  1312. {
  1313. unsigned i, j;
  1314. if (cpu < 0 || !pt->queues.nr_queues)
  1315. return NULL;
  1316. if ((unsigned)cpu >= pt->queues.nr_queues)
  1317. i = pt->queues.nr_queues - 1;
  1318. else
  1319. i = cpu;
  1320. if (pt->queues.queue_array[i].cpu == cpu)
  1321. return pt->queues.queue_array[i].priv;
  1322. for (j = 0; i > 0; j++) {
  1323. if (pt->queues.queue_array[--i].cpu == cpu)
  1324. return pt->queues.queue_array[i].priv;
  1325. }
  1326. for (; j < pt->queues.nr_queues; j++) {
  1327. if (pt->queues.queue_array[j].cpu == cpu)
  1328. return pt->queues.queue_array[j].priv;
  1329. }
  1330. return NULL;
  1331. }
  1332. static int intel_pt_sync_switch(struct intel_pt *pt, int cpu, pid_t tid,
  1333. u64 timestamp)
  1334. {
  1335. struct intel_pt_queue *ptq;
  1336. int err;
  1337. if (!pt->sync_switch)
  1338. return 1;
  1339. ptq = intel_pt_cpu_to_ptq(pt, cpu);
  1340. if (!ptq)
  1341. return 1;
  1342. switch (ptq->switch_state) {
  1343. case INTEL_PT_SS_NOT_TRACING:
  1344. ptq->next_tid = -1;
  1345. break;
  1346. case INTEL_PT_SS_UNKNOWN:
  1347. case INTEL_PT_SS_TRACING:
  1348. ptq->next_tid = tid;
  1349. ptq->switch_state = INTEL_PT_SS_EXPECTING_SWITCH_IP;
  1350. return 0;
  1351. case INTEL_PT_SS_EXPECTING_SWITCH_EVENT:
  1352. if (!ptq->on_heap) {
  1353. ptq->timestamp = perf_time_to_tsc(timestamp,
  1354. &pt->tc);
  1355. err = auxtrace_heap__add(&pt->heap, ptq->queue_nr,
  1356. ptq->timestamp);
  1357. if (err)
  1358. return err;
  1359. ptq->on_heap = true;
  1360. }
  1361. ptq->switch_state = INTEL_PT_SS_TRACING;
  1362. break;
  1363. case INTEL_PT_SS_EXPECTING_SWITCH_IP:
  1364. ptq->next_tid = tid;
  1365. intel_pt_log("ERROR: cpu %d expecting switch ip\n", cpu);
  1366. break;
  1367. default:
  1368. break;
  1369. }
  1370. return 1;
  1371. }
  1372. static int intel_pt_process_switch(struct intel_pt *pt,
  1373. struct perf_sample *sample)
  1374. {
  1375. struct perf_evsel *evsel;
  1376. pid_t tid;
  1377. int cpu, ret;
  1378. evsel = perf_evlist__id2evsel(pt->session->evlist, sample->id);
  1379. if (evsel != pt->switch_evsel)
  1380. return 0;
  1381. tid = perf_evsel__intval(evsel, sample, "next_pid");
  1382. cpu = sample->cpu;
  1383. intel_pt_log("sched_switch: cpu %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1384. cpu, tid, sample->time, perf_time_to_tsc(sample->time,
  1385. &pt->tc));
  1386. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1387. if (ret <= 0)
  1388. return ret;
  1389. return machine__set_current_tid(pt->machine, cpu, -1, tid);
  1390. }
  1391. static int intel_pt_context_switch(struct intel_pt *pt, union perf_event *event,
  1392. struct perf_sample *sample)
  1393. {
  1394. bool out = event->header.misc & PERF_RECORD_MISC_SWITCH_OUT;
  1395. pid_t pid, tid;
  1396. int cpu, ret;
  1397. cpu = sample->cpu;
  1398. if (pt->have_sched_switch == 3) {
  1399. if (!out)
  1400. return 0;
  1401. if (event->header.type != PERF_RECORD_SWITCH_CPU_WIDE) {
  1402. pr_err("Expecting CPU-wide context switch event\n");
  1403. return -EINVAL;
  1404. }
  1405. pid = event->context_switch.next_prev_pid;
  1406. tid = event->context_switch.next_prev_tid;
  1407. } else {
  1408. if (out)
  1409. return 0;
  1410. pid = sample->pid;
  1411. tid = sample->tid;
  1412. }
  1413. if (tid == -1) {
  1414. pr_err("context_switch event has no tid\n");
  1415. return -EINVAL;
  1416. }
  1417. intel_pt_log("context_switch: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1418. cpu, pid, tid, sample->time, perf_time_to_tsc(sample->time,
  1419. &pt->tc));
  1420. ret = intel_pt_sync_switch(pt, cpu, tid, sample->time);
  1421. if (ret <= 0)
  1422. return ret;
  1423. return machine__set_current_tid(pt->machine, cpu, pid, tid);
  1424. }
  1425. static int intel_pt_process_itrace_start(struct intel_pt *pt,
  1426. union perf_event *event,
  1427. struct perf_sample *sample)
  1428. {
  1429. if (!pt->per_cpu_mmaps)
  1430. return 0;
  1431. intel_pt_log("itrace_start: cpu %d pid %d tid %d time %"PRIu64" tsc %#"PRIx64"\n",
  1432. sample->cpu, event->itrace_start.pid,
  1433. event->itrace_start.tid, sample->time,
  1434. perf_time_to_tsc(sample->time, &pt->tc));
  1435. return machine__set_current_tid(pt->machine, sample->cpu,
  1436. event->itrace_start.pid,
  1437. event->itrace_start.tid);
  1438. }
  1439. static int intel_pt_process_event(struct perf_session *session,
  1440. union perf_event *event,
  1441. struct perf_sample *sample,
  1442. struct perf_tool *tool)
  1443. {
  1444. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1445. auxtrace);
  1446. u64 timestamp;
  1447. int err = 0;
  1448. if (dump_trace)
  1449. return 0;
  1450. if (!tool->ordered_events) {
  1451. pr_err("Intel Processor Trace requires ordered events\n");
  1452. return -EINVAL;
  1453. }
  1454. if (sample->time && sample->time != (u64)-1)
  1455. timestamp = perf_time_to_tsc(sample->time, &pt->tc);
  1456. else
  1457. timestamp = 0;
  1458. if (timestamp || pt->timeless_decoding) {
  1459. err = intel_pt_update_queues(pt);
  1460. if (err)
  1461. return err;
  1462. }
  1463. if (pt->timeless_decoding) {
  1464. if (event->header.type == PERF_RECORD_EXIT) {
  1465. err = intel_pt_process_timeless_queues(pt,
  1466. event->fork.tid,
  1467. sample->time);
  1468. }
  1469. } else if (timestamp) {
  1470. err = intel_pt_process_queues(pt, timestamp);
  1471. }
  1472. if (err)
  1473. return err;
  1474. if (event->header.type == PERF_RECORD_AUX &&
  1475. (event->aux.flags & PERF_AUX_FLAG_TRUNCATED) &&
  1476. pt->synth_opts.errors) {
  1477. err = intel_pt_lost(pt, sample);
  1478. if (err)
  1479. return err;
  1480. }
  1481. if (pt->switch_evsel && event->header.type == PERF_RECORD_SAMPLE)
  1482. err = intel_pt_process_switch(pt, sample);
  1483. else if (event->header.type == PERF_RECORD_ITRACE_START)
  1484. err = intel_pt_process_itrace_start(pt, event, sample);
  1485. else if (event->header.type == PERF_RECORD_SWITCH ||
  1486. event->header.type == PERF_RECORD_SWITCH_CPU_WIDE)
  1487. err = intel_pt_context_switch(pt, event, sample);
  1488. intel_pt_log("event %s (%u): cpu %d time %"PRIu64" tsc %#"PRIx64"\n",
  1489. perf_event__name(event->header.type), event->header.type,
  1490. sample->cpu, sample->time, timestamp);
  1491. return err;
  1492. }
  1493. static int intel_pt_flush(struct perf_session *session, struct perf_tool *tool)
  1494. {
  1495. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1496. auxtrace);
  1497. int ret;
  1498. if (dump_trace)
  1499. return 0;
  1500. if (!tool->ordered_events)
  1501. return -EINVAL;
  1502. ret = intel_pt_update_queues(pt);
  1503. if (ret < 0)
  1504. return ret;
  1505. if (pt->timeless_decoding)
  1506. return intel_pt_process_timeless_queues(pt, -1,
  1507. MAX_TIMESTAMP - 1);
  1508. return intel_pt_process_queues(pt, MAX_TIMESTAMP);
  1509. }
  1510. static void intel_pt_free_events(struct perf_session *session)
  1511. {
  1512. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1513. auxtrace);
  1514. struct auxtrace_queues *queues = &pt->queues;
  1515. unsigned int i;
  1516. for (i = 0; i < queues->nr_queues; i++) {
  1517. intel_pt_free_queue(queues->queue_array[i].priv);
  1518. queues->queue_array[i].priv = NULL;
  1519. }
  1520. intel_pt_log_disable();
  1521. auxtrace_queues__free(queues);
  1522. }
  1523. static void intel_pt_free(struct perf_session *session)
  1524. {
  1525. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1526. auxtrace);
  1527. auxtrace_heap__free(&pt->heap);
  1528. intel_pt_free_events(session);
  1529. session->auxtrace = NULL;
  1530. thread__put(pt->unknown_thread);
  1531. addr_filters__exit(&pt->filts);
  1532. zfree(&pt->filter);
  1533. free(pt);
  1534. }
  1535. static int intel_pt_process_auxtrace_event(struct perf_session *session,
  1536. union perf_event *event,
  1537. struct perf_tool *tool __maybe_unused)
  1538. {
  1539. struct intel_pt *pt = container_of(session->auxtrace, struct intel_pt,
  1540. auxtrace);
  1541. if (pt->sampling_mode)
  1542. return 0;
  1543. if (!pt->data_queued) {
  1544. struct auxtrace_buffer *buffer;
  1545. off_t data_offset;
  1546. int fd = perf_data_file__fd(session->file);
  1547. int err;
  1548. if (perf_data_file__is_pipe(session->file)) {
  1549. data_offset = 0;
  1550. } else {
  1551. data_offset = lseek(fd, 0, SEEK_CUR);
  1552. if (data_offset == -1)
  1553. return -errno;
  1554. }
  1555. err = auxtrace_queues__add_event(&pt->queues, session, event,
  1556. data_offset, &buffer);
  1557. if (err)
  1558. return err;
  1559. /* Dump here now we have copied a piped trace out of the pipe */
  1560. if (dump_trace) {
  1561. if (auxtrace_buffer__get_data(buffer, fd)) {
  1562. intel_pt_dump_event(pt, buffer->data,
  1563. buffer->size);
  1564. auxtrace_buffer__put_data(buffer);
  1565. }
  1566. }
  1567. }
  1568. return 0;
  1569. }
  1570. struct intel_pt_synth {
  1571. struct perf_tool dummy_tool;
  1572. struct perf_session *session;
  1573. };
  1574. static int intel_pt_event_synth(struct perf_tool *tool,
  1575. union perf_event *event,
  1576. struct perf_sample *sample __maybe_unused,
  1577. struct machine *machine __maybe_unused)
  1578. {
  1579. struct intel_pt_synth *intel_pt_synth =
  1580. container_of(tool, struct intel_pt_synth, dummy_tool);
  1581. return perf_session__deliver_synth_event(intel_pt_synth->session, event,
  1582. NULL);
  1583. }
  1584. static int intel_pt_synth_event(struct perf_session *session,
  1585. struct perf_event_attr *attr, u64 id)
  1586. {
  1587. struct intel_pt_synth intel_pt_synth;
  1588. memset(&intel_pt_synth, 0, sizeof(struct intel_pt_synth));
  1589. intel_pt_synth.session = session;
  1590. return perf_event__synthesize_attr(&intel_pt_synth.dummy_tool, attr, 1,
  1591. &id, intel_pt_event_synth);
  1592. }
  1593. static int intel_pt_synth_events(struct intel_pt *pt,
  1594. struct perf_session *session)
  1595. {
  1596. struct perf_evlist *evlist = session->evlist;
  1597. struct perf_evsel *evsel;
  1598. struct perf_event_attr attr;
  1599. bool found = false;
  1600. u64 id;
  1601. int err;
  1602. evlist__for_each_entry(evlist, evsel) {
  1603. if (evsel->attr.type == pt->pmu_type && evsel->ids) {
  1604. found = true;
  1605. break;
  1606. }
  1607. }
  1608. if (!found) {
  1609. pr_debug("There are no selected events with Intel Processor Trace data\n");
  1610. return 0;
  1611. }
  1612. memset(&attr, 0, sizeof(struct perf_event_attr));
  1613. attr.size = sizeof(struct perf_event_attr);
  1614. attr.type = PERF_TYPE_HARDWARE;
  1615. attr.sample_type = evsel->attr.sample_type & PERF_SAMPLE_MASK;
  1616. attr.sample_type |= PERF_SAMPLE_IP | PERF_SAMPLE_TID |
  1617. PERF_SAMPLE_PERIOD;
  1618. if (pt->timeless_decoding)
  1619. attr.sample_type &= ~(u64)PERF_SAMPLE_TIME;
  1620. else
  1621. attr.sample_type |= PERF_SAMPLE_TIME;
  1622. if (!pt->per_cpu_mmaps)
  1623. attr.sample_type &= ~(u64)PERF_SAMPLE_CPU;
  1624. attr.exclude_user = evsel->attr.exclude_user;
  1625. attr.exclude_kernel = evsel->attr.exclude_kernel;
  1626. attr.exclude_hv = evsel->attr.exclude_hv;
  1627. attr.exclude_host = evsel->attr.exclude_host;
  1628. attr.exclude_guest = evsel->attr.exclude_guest;
  1629. attr.sample_id_all = evsel->attr.sample_id_all;
  1630. attr.read_format = evsel->attr.read_format;
  1631. id = evsel->id[0] + 1000000000;
  1632. if (!id)
  1633. id = 1;
  1634. if (pt->synth_opts.instructions) {
  1635. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1636. if (pt->synth_opts.period_type == PERF_ITRACE_PERIOD_NANOSECS)
  1637. attr.sample_period =
  1638. intel_pt_ns_to_ticks(pt, pt->synth_opts.period);
  1639. else
  1640. attr.sample_period = pt->synth_opts.period;
  1641. pt->instructions_sample_period = attr.sample_period;
  1642. if (pt->synth_opts.callchain)
  1643. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1644. if (pt->synth_opts.last_branch)
  1645. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1646. pr_debug("Synthesizing 'instructions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1647. id, (u64)attr.sample_type);
  1648. err = intel_pt_synth_event(session, &attr, id);
  1649. if (err) {
  1650. pr_err("%s: failed to synthesize 'instructions' event type\n",
  1651. __func__);
  1652. return err;
  1653. }
  1654. pt->sample_instructions = true;
  1655. pt->instructions_sample_type = attr.sample_type;
  1656. pt->instructions_id = id;
  1657. id += 1;
  1658. }
  1659. if (pt->synth_opts.transactions) {
  1660. attr.config = PERF_COUNT_HW_INSTRUCTIONS;
  1661. attr.sample_period = 1;
  1662. if (pt->synth_opts.callchain)
  1663. attr.sample_type |= PERF_SAMPLE_CALLCHAIN;
  1664. if (pt->synth_opts.last_branch)
  1665. attr.sample_type |= PERF_SAMPLE_BRANCH_STACK;
  1666. pr_debug("Synthesizing 'transactions' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1667. id, (u64)attr.sample_type);
  1668. err = intel_pt_synth_event(session, &attr, id);
  1669. if (err) {
  1670. pr_err("%s: failed to synthesize 'transactions' event type\n",
  1671. __func__);
  1672. return err;
  1673. }
  1674. pt->sample_transactions = true;
  1675. pt->transactions_id = id;
  1676. id += 1;
  1677. evlist__for_each_entry(evlist, evsel) {
  1678. if (evsel->id && evsel->id[0] == pt->transactions_id) {
  1679. if (evsel->name)
  1680. zfree(&evsel->name);
  1681. evsel->name = strdup("transactions");
  1682. break;
  1683. }
  1684. }
  1685. }
  1686. if (pt->synth_opts.branches) {
  1687. attr.config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS;
  1688. attr.sample_period = 1;
  1689. attr.sample_type |= PERF_SAMPLE_ADDR;
  1690. attr.sample_type &= ~(u64)PERF_SAMPLE_CALLCHAIN;
  1691. attr.sample_type &= ~(u64)PERF_SAMPLE_BRANCH_STACK;
  1692. pr_debug("Synthesizing 'branches' event with id %" PRIu64 " sample type %#" PRIx64 "\n",
  1693. id, (u64)attr.sample_type);
  1694. err = intel_pt_synth_event(session, &attr, id);
  1695. if (err) {
  1696. pr_err("%s: failed to synthesize 'branches' event type\n",
  1697. __func__);
  1698. return err;
  1699. }
  1700. pt->sample_branches = true;
  1701. pt->branches_sample_type = attr.sample_type;
  1702. pt->branches_id = id;
  1703. }
  1704. pt->synth_needs_swap = evsel->needs_swap;
  1705. return 0;
  1706. }
  1707. static struct perf_evsel *intel_pt_find_sched_switch(struct perf_evlist *evlist)
  1708. {
  1709. struct perf_evsel *evsel;
  1710. evlist__for_each_entry_reverse(evlist, evsel) {
  1711. const char *name = perf_evsel__name(evsel);
  1712. if (!strcmp(name, "sched:sched_switch"))
  1713. return evsel;
  1714. }
  1715. return NULL;
  1716. }
  1717. static bool intel_pt_find_switch(struct perf_evlist *evlist)
  1718. {
  1719. struct perf_evsel *evsel;
  1720. evlist__for_each_entry(evlist, evsel) {
  1721. if (evsel->attr.context_switch)
  1722. return true;
  1723. }
  1724. return false;
  1725. }
  1726. static int intel_pt_perf_config(const char *var, const char *value, void *data)
  1727. {
  1728. struct intel_pt *pt = data;
  1729. if (!strcmp(var, "intel-pt.mispred-all"))
  1730. pt->mispred_all = perf_config_bool(var, value);
  1731. return 0;
  1732. }
  1733. static const char * const intel_pt_info_fmts[] = {
  1734. [INTEL_PT_PMU_TYPE] = " PMU Type %"PRId64"\n",
  1735. [INTEL_PT_TIME_SHIFT] = " Time Shift %"PRIu64"\n",
  1736. [INTEL_PT_TIME_MULT] = " Time Muliplier %"PRIu64"\n",
  1737. [INTEL_PT_TIME_ZERO] = " Time Zero %"PRIu64"\n",
  1738. [INTEL_PT_CAP_USER_TIME_ZERO] = " Cap Time Zero %"PRId64"\n",
  1739. [INTEL_PT_TSC_BIT] = " TSC bit %#"PRIx64"\n",
  1740. [INTEL_PT_NORETCOMP_BIT] = " NoRETComp bit %#"PRIx64"\n",
  1741. [INTEL_PT_HAVE_SCHED_SWITCH] = " Have sched_switch %"PRId64"\n",
  1742. [INTEL_PT_SNAPSHOT_MODE] = " Snapshot mode %"PRId64"\n",
  1743. [INTEL_PT_PER_CPU_MMAPS] = " Per-cpu maps %"PRId64"\n",
  1744. [INTEL_PT_MTC_BIT] = " MTC bit %#"PRIx64"\n",
  1745. [INTEL_PT_TSC_CTC_N] = " TSC:CTC numerator %"PRIu64"\n",
  1746. [INTEL_PT_TSC_CTC_D] = " TSC:CTC denominator %"PRIu64"\n",
  1747. [INTEL_PT_CYC_BIT] = " CYC bit %#"PRIx64"\n",
  1748. [INTEL_PT_MAX_NONTURBO_RATIO] = " Max non-turbo ratio %"PRIu64"\n",
  1749. [INTEL_PT_FILTER_STR_LEN] = " Filter string len. %"PRIu64"\n",
  1750. };
  1751. static void intel_pt_print_info(u64 *arr, int start, int finish)
  1752. {
  1753. int i;
  1754. if (!dump_trace)
  1755. return;
  1756. for (i = start; i <= finish; i++)
  1757. fprintf(stdout, intel_pt_info_fmts[i], arr[i]);
  1758. }
  1759. static void intel_pt_print_info_str(const char *name, const char *str)
  1760. {
  1761. if (!dump_trace)
  1762. return;
  1763. fprintf(stdout, " %-20s%s\n", name, str ? str : "");
  1764. }
  1765. static bool intel_pt_has(struct auxtrace_info_event *auxtrace_info, int pos)
  1766. {
  1767. return auxtrace_info->header.size >=
  1768. sizeof(struct auxtrace_info_event) + (sizeof(u64) * (pos + 1));
  1769. }
  1770. int intel_pt_process_auxtrace_info(union perf_event *event,
  1771. struct perf_session *session)
  1772. {
  1773. struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
  1774. size_t min_sz = sizeof(u64) * INTEL_PT_PER_CPU_MMAPS;
  1775. struct intel_pt *pt;
  1776. void *info_end;
  1777. u64 *info;
  1778. int err;
  1779. if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event) +
  1780. min_sz)
  1781. return -EINVAL;
  1782. pt = zalloc(sizeof(struct intel_pt));
  1783. if (!pt)
  1784. return -ENOMEM;
  1785. addr_filters__init(&pt->filts);
  1786. perf_config(intel_pt_perf_config, pt);
  1787. err = auxtrace_queues__init(&pt->queues);
  1788. if (err)
  1789. goto err_free;
  1790. intel_pt_log_set_name(INTEL_PT_PMU_NAME);
  1791. pt->session = session;
  1792. pt->machine = &session->machines.host; /* No kvm support */
  1793. pt->auxtrace_type = auxtrace_info->type;
  1794. pt->pmu_type = auxtrace_info->priv[INTEL_PT_PMU_TYPE];
  1795. pt->tc.time_shift = auxtrace_info->priv[INTEL_PT_TIME_SHIFT];
  1796. pt->tc.time_mult = auxtrace_info->priv[INTEL_PT_TIME_MULT];
  1797. pt->tc.time_zero = auxtrace_info->priv[INTEL_PT_TIME_ZERO];
  1798. pt->cap_user_time_zero = auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO];
  1799. pt->tsc_bit = auxtrace_info->priv[INTEL_PT_TSC_BIT];
  1800. pt->noretcomp_bit = auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT];
  1801. pt->have_sched_switch = auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH];
  1802. pt->snapshot_mode = auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE];
  1803. pt->per_cpu_mmaps = auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS];
  1804. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_PMU_TYPE,
  1805. INTEL_PT_PER_CPU_MMAPS);
  1806. if (intel_pt_has(auxtrace_info, INTEL_PT_CYC_BIT)) {
  1807. pt->mtc_bit = auxtrace_info->priv[INTEL_PT_MTC_BIT];
  1808. pt->mtc_freq_bits = auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS];
  1809. pt->tsc_ctc_ratio_n = auxtrace_info->priv[INTEL_PT_TSC_CTC_N];
  1810. pt->tsc_ctc_ratio_d = auxtrace_info->priv[INTEL_PT_TSC_CTC_D];
  1811. pt->cyc_bit = auxtrace_info->priv[INTEL_PT_CYC_BIT];
  1812. intel_pt_print_info(&auxtrace_info->priv[0], INTEL_PT_MTC_BIT,
  1813. INTEL_PT_CYC_BIT);
  1814. }
  1815. if (intel_pt_has(auxtrace_info, INTEL_PT_MAX_NONTURBO_RATIO)) {
  1816. pt->max_non_turbo_ratio =
  1817. auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO];
  1818. intel_pt_print_info(&auxtrace_info->priv[0],
  1819. INTEL_PT_MAX_NONTURBO_RATIO,
  1820. INTEL_PT_MAX_NONTURBO_RATIO);
  1821. }
  1822. info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
  1823. info_end = (void *)info + auxtrace_info->header.size;
  1824. if (intel_pt_has(auxtrace_info, INTEL_PT_FILTER_STR_LEN)) {
  1825. size_t len;
  1826. len = auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN];
  1827. intel_pt_print_info(&auxtrace_info->priv[0],
  1828. INTEL_PT_FILTER_STR_LEN,
  1829. INTEL_PT_FILTER_STR_LEN);
  1830. if (len) {
  1831. const char *filter = (const char *)info;
  1832. len = roundup(len + 1, 8);
  1833. info += len >> 3;
  1834. if ((void *)info > info_end) {
  1835. pr_err("%s: bad filter string length\n", __func__);
  1836. err = -EINVAL;
  1837. goto err_free_queues;
  1838. }
  1839. pt->filter = memdup(filter, len);
  1840. if (!pt->filter) {
  1841. err = -ENOMEM;
  1842. goto err_free_queues;
  1843. }
  1844. if (session->header.needs_swap)
  1845. mem_bswap_64(pt->filter, len);
  1846. if (pt->filter[len - 1]) {
  1847. pr_err("%s: filter string not null terminated\n", __func__);
  1848. err = -EINVAL;
  1849. goto err_free_queues;
  1850. }
  1851. err = addr_filters__parse_bare_filter(&pt->filts,
  1852. filter);
  1853. if (err)
  1854. goto err_free_queues;
  1855. }
  1856. intel_pt_print_info_str("Filter string", pt->filter);
  1857. }
  1858. pt->timeless_decoding = intel_pt_timeless_decoding(pt);
  1859. pt->have_tsc = intel_pt_have_tsc(pt);
  1860. pt->sampling_mode = false;
  1861. pt->est_tsc = !pt->timeless_decoding;
  1862. pt->unknown_thread = thread__new(999999999, 999999999);
  1863. if (!pt->unknown_thread) {
  1864. err = -ENOMEM;
  1865. goto err_free_queues;
  1866. }
  1867. /*
  1868. * Since this thread will not be kept in any rbtree not in a
  1869. * list, initialize its list node so that at thread__put() the
  1870. * current thread lifetime assuption is kept and we don't segfault
  1871. * at list_del_init().
  1872. */
  1873. INIT_LIST_HEAD(&pt->unknown_thread->node);
  1874. err = thread__set_comm(pt->unknown_thread, "unknown", 0);
  1875. if (err)
  1876. goto err_delete_thread;
  1877. if (thread__init_map_groups(pt->unknown_thread, pt->machine)) {
  1878. err = -ENOMEM;
  1879. goto err_delete_thread;
  1880. }
  1881. pt->auxtrace.process_event = intel_pt_process_event;
  1882. pt->auxtrace.process_auxtrace_event = intel_pt_process_auxtrace_event;
  1883. pt->auxtrace.flush_events = intel_pt_flush;
  1884. pt->auxtrace.free_events = intel_pt_free_events;
  1885. pt->auxtrace.free = intel_pt_free;
  1886. session->auxtrace = &pt->auxtrace;
  1887. if (dump_trace)
  1888. return 0;
  1889. if (pt->have_sched_switch == 1) {
  1890. pt->switch_evsel = intel_pt_find_sched_switch(session->evlist);
  1891. if (!pt->switch_evsel) {
  1892. pr_err("%s: missing sched_switch event\n", __func__);
  1893. err = -EINVAL;
  1894. goto err_delete_thread;
  1895. }
  1896. } else if (pt->have_sched_switch == 2 &&
  1897. !intel_pt_find_switch(session->evlist)) {
  1898. pr_err("%s: missing context_switch attribute flag\n", __func__);
  1899. err = -EINVAL;
  1900. goto err_delete_thread;
  1901. }
  1902. if (session->itrace_synth_opts && session->itrace_synth_opts->set) {
  1903. pt->synth_opts = *session->itrace_synth_opts;
  1904. } else {
  1905. itrace_synth_opts__set_default(&pt->synth_opts);
  1906. if (use_browser != -1) {
  1907. pt->synth_opts.branches = false;
  1908. pt->synth_opts.callchain = true;
  1909. }
  1910. if (session->itrace_synth_opts)
  1911. pt->synth_opts.thread_stack =
  1912. session->itrace_synth_opts->thread_stack;
  1913. }
  1914. if (pt->synth_opts.log)
  1915. intel_pt_log_enable();
  1916. /* Maximum non-turbo ratio is TSC freq / 100 MHz */
  1917. if (pt->tc.time_mult) {
  1918. u64 tsc_freq = intel_pt_ns_to_ticks(pt, 1000000000);
  1919. if (!pt->max_non_turbo_ratio)
  1920. pt->max_non_turbo_ratio =
  1921. (tsc_freq + 50000000) / 100000000;
  1922. intel_pt_log("TSC frequency %"PRIu64"\n", tsc_freq);
  1923. intel_pt_log("Maximum non-turbo ratio %u\n",
  1924. pt->max_non_turbo_ratio);
  1925. }
  1926. if (pt->synth_opts.calls)
  1927. pt->branches_filter |= PERF_IP_FLAG_CALL | PERF_IP_FLAG_ASYNC |
  1928. PERF_IP_FLAG_TRACE_END;
  1929. if (pt->synth_opts.returns)
  1930. pt->branches_filter |= PERF_IP_FLAG_RETURN |
  1931. PERF_IP_FLAG_TRACE_BEGIN;
  1932. if (pt->synth_opts.callchain && !symbol_conf.use_callchain) {
  1933. symbol_conf.use_callchain = true;
  1934. if (callchain_register_param(&callchain_param) < 0) {
  1935. symbol_conf.use_callchain = false;
  1936. pt->synth_opts.callchain = false;
  1937. }
  1938. }
  1939. err = intel_pt_synth_events(pt, session);
  1940. if (err)
  1941. goto err_delete_thread;
  1942. err = auxtrace_queues__process_index(&pt->queues, session);
  1943. if (err)
  1944. goto err_delete_thread;
  1945. if (pt->queues.populated)
  1946. pt->data_queued = true;
  1947. if (pt->timeless_decoding)
  1948. pr_debug2("Intel PT decoding without timestamps\n");
  1949. return 0;
  1950. err_delete_thread:
  1951. thread__zput(pt->unknown_thread);
  1952. err_free_queues:
  1953. intel_pt_log_disable();
  1954. auxtrace_queues__free(&pt->queues);
  1955. session->auxtrace = NULL;
  1956. err_free:
  1957. addr_filters__exit(&pt->filts);
  1958. zfree(&pt->filter);
  1959. free(pt);
  1960. return err;
  1961. }