wm8960.c 37 KB

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  1. /*
  2. * wm8960.c -- WM8960 ALSA SoC Audio driver
  3. *
  4. * Copyright 2007-11 Wolfson Microelectronics, plc
  5. *
  6. * Author: Liam Girdwood
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/clk.h>
  18. #include <linux/i2c.h>
  19. #include <linux/slab.h>
  20. #include <sound/core.h>
  21. #include <sound/pcm.h>
  22. #include <sound/pcm_params.h>
  23. #include <sound/soc.h>
  24. #include <sound/initval.h>
  25. #include <sound/tlv.h>
  26. #include <sound/wm8960.h>
  27. #include "wm8960.h"
  28. /* R25 - Power 1 */
  29. #define WM8960_VMID_MASK 0x180
  30. #define WM8960_VREF 0x40
  31. /* R26 - Power 2 */
  32. #define WM8960_PWR2_LOUT1 0x40
  33. #define WM8960_PWR2_ROUT1 0x20
  34. #define WM8960_PWR2_OUT3 0x02
  35. /* R28 - Anti-pop 1 */
  36. #define WM8960_POBCTRL 0x80
  37. #define WM8960_BUFDCOPEN 0x10
  38. #define WM8960_BUFIOEN 0x08
  39. #define WM8960_SOFT_ST 0x04
  40. #define WM8960_HPSTBY 0x01
  41. /* R29 - Anti-pop 2 */
  42. #define WM8960_DISOP 0x40
  43. #define WM8960_DRES_MASK 0x30
  44. static bool is_pll_freq_available(unsigned int source, unsigned int target);
  45. static int wm8960_set_pll(struct snd_soc_codec *codec,
  46. unsigned int freq_in, unsigned int freq_out);
  47. /*
  48. * wm8960 register cache
  49. * We can't read the WM8960 register space when we are
  50. * using 2 wire for device control, so we cache them instead.
  51. */
  52. static const struct reg_default wm8960_reg_defaults[] = {
  53. { 0x0, 0x00a7 },
  54. { 0x1, 0x00a7 },
  55. { 0x2, 0x0000 },
  56. { 0x3, 0x0000 },
  57. { 0x4, 0x0000 },
  58. { 0x5, 0x0008 },
  59. { 0x6, 0x0000 },
  60. { 0x7, 0x000a },
  61. { 0x8, 0x01c0 },
  62. { 0x9, 0x0000 },
  63. { 0xa, 0x00ff },
  64. { 0xb, 0x00ff },
  65. { 0x10, 0x0000 },
  66. { 0x11, 0x007b },
  67. { 0x12, 0x0100 },
  68. { 0x13, 0x0032 },
  69. { 0x14, 0x0000 },
  70. { 0x15, 0x00c3 },
  71. { 0x16, 0x00c3 },
  72. { 0x17, 0x01c0 },
  73. { 0x18, 0x0000 },
  74. { 0x19, 0x0000 },
  75. { 0x1a, 0x0000 },
  76. { 0x1b, 0x0000 },
  77. { 0x1c, 0x0000 },
  78. { 0x1d, 0x0000 },
  79. { 0x20, 0x0100 },
  80. { 0x21, 0x0100 },
  81. { 0x22, 0x0050 },
  82. { 0x25, 0x0050 },
  83. { 0x26, 0x0000 },
  84. { 0x27, 0x0000 },
  85. { 0x28, 0x0000 },
  86. { 0x29, 0x0000 },
  87. { 0x2a, 0x0040 },
  88. { 0x2b, 0x0000 },
  89. { 0x2c, 0x0000 },
  90. { 0x2d, 0x0050 },
  91. { 0x2e, 0x0050 },
  92. { 0x2f, 0x0000 },
  93. { 0x30, 0x0002 },
  94. { 0x31, 0x0037 },
  95. { 0x33, 0x0080 },
  96. { 0x34, 0x0008 },
  97. { 0x35, 0x0031 },
  98. { 0x36, 0x0026 },
  99. { 0x37, 0x00e9 },
  100. };
  101. static bool wm8960_volatile(struct device *dev, unsigned int reg)
  102. {
  103. switch (reg) {
  104. case WM8960_RESET:
  105. return true;
  106. default:
  107. return false;
  108. }
  109. }
  110. struct wm8960_priv {
  111. struct clk *mclk;
  112. struct regmap *regmap;
  113. int (*set_bias_level)(struct snd_soc_codec *,
  114. enum snd_soc_bias_level level);
  115. struct snd_soc_dapm_widget *lout1;
  116. struct snd_soc_dapm_widget *rout1;
  117. struct snd_soc_dapm_widget *out3;
  118. bool deemph;
  119. int lrclk;
  120. int bclk;
  121. int sysclk;
  122. int clk_id;
  123. int freq_in;
  124. bool is_stream_in_use[2];
  125. struct wm8960_data pdata;
  126. };
  127. #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0)
  128. /* enumerated controls */
  129. static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
  130. "Right Inverted", "Stereo Inversion"};
  131. static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
  132. static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
  133. static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
  134. static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
  135. static const char *wm8960_adc_data_output_sel[] = {
  136. "Left Data = Left ADC; Right Data = Right ADC",
  137. "Left Data = Left ADC; Right Data = Left ADC",
  138. "Left Data = Right ADC; Right Data = Right ADC",
  139. "Left Data = Right ADC; Right Data = Left ADC",
  140. };
  141. static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
  142. static const struct soc_enum wm8960_enum[] = {
  143. SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
  144. SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
  145. SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
  146. SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
  147. SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
  148. SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
  149. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
  150. SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
  151. };
  152. static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
  153. static int wm8960_set_deemph(struct snd_soc_codec *codec)
  154. {
  155. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  156. int val, i, best;
  157. /* If we're using deemphasis select the nearest available sample
  158. * rate.
  159. */
  160. if (wm8960->deemph) {
  161. best = 1;
  162. for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
  163. if (abs(deemph_settings[i] - wm8960->lrclk) <
  164. abs(deemph_settings[best] - wm8960->lrclk))
  165. best = i;
  166. }
  167. val = best << 1;
  168. } else {
  169. val = 0;
  170. }
  171. dev_dbg(codec->dev, "Set deemphasis %d\n", val);
  172. return snd_soc_update_bits(codec, WM8960_DACCTL1,
  173. 0x6, val);
  174. }
  175. static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
  176. struct snd_ctl_elem_value *ucontrol)
  177. {
  178. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  179. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  180. ucontrol->value.integer.value[0] = wm8960->deemph;
  181. return 0;
  182. }
  183. static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
  184. struct snd_ctl_elem_value *ucontrol)
  185. {
  186. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  187. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  188. unsigned int deemph = ucontrol->value.integer.value[0];
  189. if (deemph > 1)
  190. return -EINVAL;
  191. wm8960->deemph = deemph;
  192. return wm8960_set_deemph(codec);
  193. }
  194. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  195. static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
  196. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  197. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
  198. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  199. static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
  200. static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
  201. 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
  202. 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
  203. );
  204. static const struct snd_kcontrol_new wm8960_snd_controls[] = {
  205. SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
  206. 0, 63, 0, inpga_tlv),
  207. SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
  208. 6, 1, 0),
  209. SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
  210. 7, 1, 1),
  211. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
  212. WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
  213. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
  214. WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
  215. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
  216. WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
  217. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
  218. WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
  219. SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
  220. WM8960_RINPATH, 4, 3, 0, micboost_tlv),
  221. SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
  222. WM8960_LINPATH, 4, 3, 0, micboost_tlv),
  223. SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
  224. 0, 255, 0, dac_tlv),
  225. SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
  226. 0, 127, 0, out_tlv),
  227. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
  228. 7, 1, 0),
  229. SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
  230. 0, 127, 0, out_tlv),
  231. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
  232. 7, 1, 0),
  233. SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
  234. SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
  235. SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
  236. SOC_ENUM("ADC Polarity", wm8960_enum[0]),
  237. SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
  238. SOC_ENUM("DAC Polarity", wm8960_enum[1]),
  239. SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
  240. wm8960_get_deemph, wm8960_put_deemph),
  241. SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
  242. SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
  243. SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
  244. SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
  245. SOC_ENUM("ALC Function", wm8960_enum[4]),
  246. SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
  247. SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
  248. SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
  249. SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
  250. SOC_ENUM("ALC Mode", wm8960_enum[5]),
  251. SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
  252. SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
  253. SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
  254. SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
  255. SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
  256. 0, 255, 0, adc_tlv),
  257. SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
  258. WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
  259. SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
  260. WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
  261. SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
  262. WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
  263. SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
  264. WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
  265. SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
  266. SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
  267. };
  268. static const struct snd_kcontrol_new wm8960_lin_boost[] = {
  269. SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
  270. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
  271. SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
  272. };
  273. static const struct snd_kcontrol_new wm8960_lin[] = {
  274. SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
  275. };
  276. static const struct snd_kcontrol_new wm8960_rin_boost[] = {
  277. SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
  278. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
  279. SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
  280. };
  281. static const struct snd_kcontrol_new wm8960_rin[] = {
  282. SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
  283. };
  284. static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
  285. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
  286. SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
  287. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
  288. };
  289. static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
  290. SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
  291. SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
  292. SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
  293. };
  294. static const struct snd_kcontrol_new wm8960_mono_out[] = {
  295. SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
  296. SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
  297. };
  298. static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
  299. SND_SOC_DAPM_INPUT("LINPUT1"),
  300. SND_SOC_DAPM_INPUT("RINPUT1"),
  301. SND_SOC_DAPM_INPUT("LINPUT2"),
  302. SND_SOC_DAPM_INPUT("RINPUT2"),
  303. SND_SOC_DAPM_INPUT("LINPUT3"),
  304. SND_SOC_DAPM_INPUT("RINPUT3"),
  305. SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
  306. SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
  307. wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
  308. SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
  309. wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
  310. SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
  311. wm8960_lin, ARRAY_SIZE(wm8960_lin)),
  312. SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
  313. wm8960_rin, ARRAY_SIZE(wm8960_rin)),
  314. SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
  315. SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
  316. SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
  317. SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
  318. SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
  319. &wm8960_loutput_mixer[0],
  320. ARRAY_SIZE(wm8960_loutput_mixer)),
  321. SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
  322. &wm8960_routput_mixer[0],
  323. ARRAY_SIZE(wm8960_routput_mixer)),
  324. SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
  325. SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
  326. SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
  327. SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
  328. SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
  329. SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
  330. SND_SOC_DAPM_OUTPUT("SPK_LP"),
  331. SND_SOC_DAPM_OUTPUT("SPK_LN"),
  332. SND_SOC_DAPM_OUTPUT("HP_L"),
  333. SND_SOC_DAPM_OUTPUT("HP_R"),
  334. SND_SOC_DAPM_OUTPUT("SPK_RP"),
  335. SND_SOC_DAPM_OUTPUT("SPK_RN"),
  336. SND_SOC_DAPM_OUTPUT("OUT3"),
  337. };
  338. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
  339. SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
  340. &wm8960_mono_out[0],
  341. ARRAY_SIZE(wm8960_mono_out)),
  342. };
  343. /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
  344. static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
  345. SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
  346. };
  347. static const struct snd_soc_dapm_route audio_paths[] = {
  348. { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
  349. { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
  350. { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
  351. { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
  352. { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */
  353. { "Left Input Mixer", NULL, "LINPUT2" },
  354. { "Left Input Mixer", NULL, "LINPUT3" },
  355. { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
  356. { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
  357. { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
  358. { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
  359. { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */
  360. { "Right Input Mixer", NULL, "RINPUT2" },
  361. { "Right Input Mixer", NULL, "RINPUT3" },
  362. { "Left ADC", NULL, "Left Input Mixer" },
  363. { "Right ADC", NULL, "Right Input Mixer" },
  364. { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
  365. { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
  366. { "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
  367. { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
  368. { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
  369. { "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
  370. { "LOUT1 PGA", NULL, "Left Output Mixer" },
  371. { "ROUT1 PGA", NULL, "Right Output Mixer" },
  372. { "HP_L", NULL, "LOUT1 PGA" },
  373. { "HP_R", NULL, "ROUT1 PGA" },
  374. { "Left Speaker PGA", NULL, "Left Output Mixer" },
  375. { "Right Speaker PGA", NULL, "Right Output Mixer" },
  376. { "Left Speaker Output", NULL, "Left Speaker PGA" },
  377. { "Right Speaker Output", NULL, "Right Speaker PGA" },
  378. { "SPK_LN", NULL, "Left Speaker Output" },
  379. { "SPK_LP", NULL, "Left Speaker Output" },
  380. { "SPK_RN", NULL, "Right Speaker Output" },
  381. { "SPK_RP", NULL, "Right Speaker Output" },
  382. };
  383. static const struct snd_soc_dapm_route audio_paths_out3[] = {
  384. { "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
  385. { "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
  386. { "OUT3", NULL, "Mono Output Mixer", }
  387. };
  388. static const struct snd_soc_dapm_route audio_paths_capless[] = {
  389. { "HP_L", NULL, "OUT3 VMID" },
  390. { "HP_R", NULL, "OUT3 VMID" },
  391. { "OUT3 VMID", NULL, "Left Output Mixer" },
  392. { "OUT3 VMID", NULL, "Right Output Mixer" },
  393. };
  394. static int wm8960_add_widgets(struct snd_soc_codec *codec)
  395. {
  396. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  397. struct wm8960_data *pdata = &wm8960->pdata;
  398. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  399. struct snd_soc_dapm_widget *w;
  400. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
  401. ARRAY_SIZE(wm8960_dapm_widgets));
  402. snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
  403. /* In capless mode OUT3 is used to provide VMID for the
  404. * headphone outputs, otherwise it is used as a mono mixer.
  405. */
  406. if (pdata && pdata->capless) {
  407. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
  408. ARRAY_SIZE(wm8960_dapm_widgets_capless));
  409. snd_soc_dapm_add_routes(dapm, audio_paths_capless,
  410. ARRAY_SIZE(audio_paths_capless));
  411. } else {
  412. snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
  413. ARRAY_SIZE(wm8960_dapm_widgets_out3));
  414. snd_soc_dapm_add_routes(dapm, audio_paths_out3,
  415. ARRAY_SIZE(audio_paths_out3));
  416. }
  417. /* We need to power up the headphone output stage out of
  418. * sequence for capless mode. To save scanning the widget
  419. * list each time to find the desired power state do so now
  420. * and save the result.
  421. */
  422. list_for_each_entry(w, &codec->component.card->widgets, list) {
  423. if (w->dapm != dapm)
  424. continue;
  425. if (strcmp(w->name, "LOUT1 PGA") == 0)
  426. wm8960->lout1 = w;
  427. if (strcmp(w->name, "ROUT1 PGA") == 0)
  428. wm8960->rout1 = w;
  429. if (strcmp(w->name, "OUT3 VMID") == 0)
  430. wm8960->out3 = w;
  431. }
  432. return 0;
  433. }
  434. static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
  435. unsigned int fmt)
  436. {
  437. struct snd_soc_codec *codec = codec_dai->codec;
  438. u16 iface = 0;
  439. /* set master/slave audio interface */
  440. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  441. case SND_SOC_DAIFMT_CBM_CFM:
  442. iface |= 0x0040;
  443. break;
  444. case SND_SOC_DAIFMT_CBS_CFS:
  445. break;
  446. default:
  447. return -EINVAL;
  448. }
  449. /* interface format */
  450. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  451. case SND_SOC_DAIFMT_I2S:
  452. iface |= 0x0002;
  453. break;
  454. case SND_SOC_DAIFMT_RIGHT_J:
  455. break;
  456. case SND_SOC_DAIFMT_LEFT_J:
  457. iface |= 0x0001;
  458. break;
  459. case SND_SOC_DAIFMT_DSP_A:
  460. iface |= 0x0003;
  461. break;
  462. case SND_SOC_DAIFMT_DSP_B:
  463. iface |= 0x0013;
  464. break;
  465. default:
  466. return -EINVAL;
  467. }
  468. /* clock inversion */
  469. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  470. case SND_SOC_DAIFMT_NB_NF:
  471. break;
  472. case SND_SOC_DAIFMT_IB_IF:
  473. iface |= 0x0090;
  474. break;
  475. case SND_SOC_DAIFMT_IB_NF:
  476. iface |= 0x0080;
  477. break;
  478. case SND_SOC_DAIFMT_NB_IF:
  479. iface |= 0x0010;
  480. break;
  481. default:
  482. return -EINVAL;
  483. }
  484. /* set iface */
  485. snd_soc_write(codec, WM8960_IFACE1, iface);
  486. return 0;
  487. }
  488. static struct {
  489. int rate;
  490. unsigned int val;
  491. } alc_rates[] = {
  492. { 48000, 0 },
  493. { 44100, 0 },
  494. { 32000, 1 },
  495. { 22050, 2 },
  496. { 24000, 2 },
  497. { 16000, 3 },
  498. { 11025, 4 },
  499. { 12000, 4 },
  500. { 8000, 5 },
  501. };
  502. /* -1 for reserved value */
  503. static const int sysclk_divs[] = { 1, -1, 2, -1 };
  504. /* Multiply 256 for internal 256 div */
  505. static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
  506. /* Multiply 10 to eliminate decimials */
  507. static const int bclk_divs[] = {
  508. 10, 15, 20, 30, 40, 55, 60, 80, 110,
  509. 120, 160, 220, 240, 320, 320, 320
  510. };
  511. static int wm8960_configure_clocking(struct snd_soc_codec *codec)
  512. {
  513. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  514. int sysclk, bclk, lrclk, freq_out, freq_in;
  515. u16 iface1 = snd_soc_read(codec, WM8960_IFACE1);
  516. int i, j, k;
  517. if (!(iface1 & (1<<6))) {
  518. dev_dbg(codec->dev,
  519. "Codec is slave mode, no need to configure clock\n");
  520. return 0;
  521. }
  522. if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
  523. dev_err(codec->dev, "No MCLK configured\n");
  524. return -EINVAL;
  525. }
  526. freq_in = wm8960->freq_in;
  527. bclk = wm8960->bclk;
  528. lrclk = wm8960->lrclk;
  529. /*
  530. * If it's sysclk auto mode, check if the MCLK can provide sysclk or
  531. * not. If MCLK can provide sysclk, using MCLK to provide sysclk
  532. * directly. Otherwise, auto select a available pll out frequency
  533. * and set PLL.
  534. */
  535. if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
  536. /* disable the PLL and using MCLK to provide sysclk */
  537. wm8960_set_pll(codec, 0, 0);
  538. freq_out = freq_in;
  539. } else if (wm8960->sysclk) {
  540. freq_out = wm8960->sysclk;
  541. } else {
  542. dev_err(codec->dev, "No SYSCLK configured\n");
  543. return -EINVAL;
  544. }
  545. if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
  546. /* check if the sysclk frequency is available. */
  547. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  548. if (sysclk_divs[i] == -1)
  549. continue;
  550. sysclk = freq_out / sysclk_divs[i];
  551. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  552. if (sysclk != dac_divs[j] * lrclk)
  553. continue;
  554. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k)
  555. if (sysclk == bclk * bclk_divs[k] / 10)
  556. break;
  557. if (k != ARRAY_SIZE(bclk_divs))
  558. break;
  559. }
  560. if (j != ARRAY_SIZE(dac_divs))
  561. break;
  562. }
  563. if (i != ARRAY_SIZE(sysclk_divs)) {
  564. goto configure_clock;
  565. } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
  566. dev_err(codec->dev, "failed to configure clock\n");
  567. return -EINVAL;
  568. }
  569. }
  570. /* get a available pll out frequency and set pll */
  571. for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
  572. if (sysclk_divs[i] == -1)
  573. continue;
  574. for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
  575. sysclk = lrclk * dac_divs[j];
  576. freq_out = sysclk * sysclk_divs[i];
  577. for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
  578. if (sysclk == bclk * bclk_divs[k] / 10 &&
  579. is_pll_freq_available(freq_in, freq_out)) {
  580. wm8960_set_pll(codec,
  581. freq_in, freq_out);
  582. break;
  583. } else {
  584. continue;
  585. }
  586. }
  587. if (k != ARRAY_SIZE(bclk_divs))
  588. break;
  589. }
  590. if (j != ARRAY_SIZE(dac_divs))
  591. break;
  592. }
  593. if (i == ARRAY_SIZE(sysclk_divs)) {
  594. dev_err(codec->dev, "failed to configure clock\n");
  595. return -EINVAL;
  596. }
  597. configure_clock:
  598. /* configure sysclk clock */
  599. snd_soc_update_bits(codec, WM8960_CLOCK1, 3 << 1, i << 1);
  600. /* configure frame clock */
  601. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 3, j << 3);
  602. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x7 << 6, j << 6);
  603. /* configure bit clock */
  604. snd_soc_update_bits(codec, WM8960_CLOCK2, 0xf, k);
  605. return 0;
  606. }
  607. static int wm8960_hw_params(struct snd_pcm_substream *substream,
  608. struct snd_pcm_hw_params *params,
  609. struct snd_soc_dai *dai)
  610. {
  611. struct snd_soc_codec *codec = dai->codec;
  612. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  613. u16 iface = snd_soc_read(codec, WM8960_IFACE1) & 0xfff3;
  614. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  615. int i;
  616. wm8960->bclk = snd_soc_params_to_bclk(params);
  617. if (params_channels(params) == 1)
  618. wm8960->bclk *= 2;
  619. /* bit size */
  620. switch (params_width(params)) {
  621. case 16:
  622. break;
  623. case 20:
  624. iface |= 0x0004;
  625. break;
  626. case 24:
  627. iface |= 0x0008;
  628. break;
  629. case 32:
  630. /* right justify mode does not support 32 word length */
  631. if ((iface & 0x3) != 0) {
  632. iface |= 0x000c;
  633. break;
  634. }
  635. default:
  636. dev_err(codec->dev, "unsupported width %d\n",
  637. params_width(params));
  638. return -EINVAL;
  639. }
  640. wm8960->lrclk = params_rate(params);
  641. /* Update filters for the new rate */
  642. if (tx) {
  643. wm8960_set_deemph(codec);
  644. } else {
  645. for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
  646. if (alc_rates[i].rate == params_rate(params))
  647. snd_soc_update_bits(codec,
  648. WM8960_ADDCTL3, 0x7,
  649. alc_rates[i].val);
  650. }
  651. /* set iface */
  652. snd_soc_write(codec, WM8960_IFACE1, iface);
  653. wm8960->is_stream_in_use[tx] = true;
  654. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON &&
  655. !wm8960->is_stream_in_use[!tx])
  656. return wm8960_configure_clocking(codec);
  657. return 0;
  658. }
  659. static int wm8960_hw_free(struct snd_pcm_substream *substream,
  660. struct snd_soc_dai *dai)
  661. {
  662. struct snd_soc_codec *codec = dai->codec;
  663. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  664. bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
  665. wm8960->is_stream_in_use[tx] = false;
  666. return 0;
  667. }
  668. static int wm8960_mute(struct snd_soc_dai *dai, int mute)
  669. {
  670. struct snd_soc_codec *codec = dai->codec;
  671. if (mute)
  672. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0x8);
  673. else
  674. snd_soc_update_bits(codec, WM8960_DACCTL1, 0x8, 0);
  675. return 0;
  676. }
  677. static int wm8960_set_bias_level_out3(struct snd_soc_codec *codec,
  678. enum snd_soc_bias_level level)
  679. {
  680. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  681. u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
  682. int ret;
  683. switch (level) {
  684. case SND_SOC_BIAS_ON:
  685. break;
  686. case SND_SOC_BIAS_PREPARE:
  687. switch (snd_soc_codec_get_bias_level(codec)) {
  688. case SND_SOC_BIAS_STANDBY:
  689. if (!IS_ERR(wm8960->mclk)) {
  690. ret = clk_prepare_enable(wm8960->mclk);
  691. if (ret) {
  692. dev_err(codec->dev,
  693. "Failed to enable MCLK: %d\n",
  694. ret);
  695. return ret;
  696. }
  697. }
  698. ret = wm8960_configure_clocking(codec);
  699. if (ret)
  700. return ret;
  701. /* Set VMID to 2x50k */
  702. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x80);
  703. break;
  704. case SND_SOC_BIAS_ON:
  705. /*
  706. * If it's sysclk auto mode, and the pll is enabled,
  707. * disable the pll
  708. */
  709. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  710. wm8960_set_pll(codec, 0, 0);
  711. if (!IS_ERR(wm8960->mclk))
  712. clk_disable_unprepare(wm8960->mclk);
  713. break;
  714. default:
  715. break;
  716. }
  717. break;
  718. case SND_SOC_BIAS_STANDBY:
  719. if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
  720. regcache_sync(wm8960->regmap);
  721. /* Enable anti-pop features */
  722. snd_soc_write(codec, WM8960_APOP1,
  723. WM8960_POBCTRL | WM8960_SOFT_ST |
  724. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  725. /* Enable & ramp VMID at 2x50k */
  726. snd_soc_update_bits(codec, WM8960_POWER1, 0x80, 0x80);
  727. msleep(100);
  728. /* Enable VREF */
  729. snd_soc_update_bits(codec, WM8960_POWER1, WM8960_VREF,
  730. WM8960_VREF);
  731. /* Disable anti-pop features */
  732. snd_soc_write(codec, WM8960_APOP1, WM8960_BUFIOEN);
  733. }
  734. /* Set VMID to 2x250k */
  735. snd_soc_update_bits(codec, WM8960_POWER1, 0x180, 0x100);
  736. break;
  737. case SND_SOC_BIAS_OFF:
  738. /* Enable anti-pop features */
  739. snd_soc_write(codec, WM8960_APOP1,
  740. WM8960_POBCTRL | WM8960_SOFT_ST |
  741. WM8960_BUFDCOPEN | WM8960_BUFIOEN);
  742. /* Disable VMID and VREF, let them discharge */
  743. snd_soc_write(codec, WM8960_POWER1, 0);
  744. msleep(600);
  745. break;
  746. }
  747. return 0;
  748. }
  749. static int wm8960_set_bias_level_capless(struct snd_soc_codec *codec,
  750. enum snd_soc_bias_level level)
  751. {
  752. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  753. u16 pm2 = snd_soc_read(codec, WM8960_POWER2);
  754. int reg, ret;
  755. switch (level) {
  756. case SND_SOC_BIAS_ON:
  757. break;
  758. case SND_SOC_BIAS_PREPARE:
  759. switch (snd_soc_codec_get_bias_level(codec)) {
  760. case SND_SOC_BIAS_STANDBY:
  761. /* Enable anti pop mode */
  762. snd_soc_update_bits(codec, WM8960_APOP1,
  763. WM8960_POBCTRL | WM8960_SOFT_ST |
  764. WM8960_BUFDCOPEN,
  765. WM8960_POBCTRL | WM8960_SOFT_ST |
  766. WM8960_BUFDCOPEN);
  767. /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
  768. reg = 0;
  769. if (wm8960->lout1 && wm8960->lout1->power)
  770. reg |= WM8960_PWR2_LOUT1;
  771. if (wm8960->rout1 && wm8960->rout1->power)
  772. reg |= WM8960_PWR2_ROUT1;
  773. if (wm8960->out3 && wm8960->out3->power)
  774. reg |= WM8960_PWR2_OUT3;
  775. snd_soc_update_bits(codec, WM8960_POWER2,
  776. WM8960_PWR2_LOUT1 |
  777. WM8960_PWR2_ROUT1 |
  778. WM8960_PWR2_OUT3, reg);
  779. /* Enable VMID at 2*50k */
  780. snd_soc_update_bits(codec, WM8960_POWER1,
  781. WM8960_VMID_MASK, 0x80);
  782. /* Ramp */
  783. msleep(100);
  784. /* Enable VREF */
  785. snd_soc_update_bits(codec, WM8960_POWER1,
  786. WM8960_VREF, WM8960_VREF);
  787. msleep(100);
  788. if (!IS_ERR(wm8960->mclk)) {
  789. ret = clk_prepare_enable(wm8960->mclk);
  790. if (ret) {
  791. dev_err(codec->dev,
  792. "Failed to enable MCLK: %d\n",
  793. ret);
  794. return ret;
  795. }
  796. }
  797. ret = wm8960_configure_clocking(codec);
  798. if (ret)
  799. return ret;
  800. break;
  801. case SND_SOC_BIAS_ON:
  802. /*
  803. * If it's sysclk auto mode, and the pll is enabled,
  804. * disable the pll
  805. */
  806. if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
  807. wm8960_set_pll(codec, 0, 0);
  808. if (!IS_ERR(wm8960->mclk))
  809. clk_disable_unprepare(wm8960->mclk);
  810. /* Enable anti-pop mode */
  811. snd_soc_update_bits(codec, WM8960_APOP1,
  812. WM8960_POBCTRL | WM8960_SOFT_ST |
  813. WM8960_BUFDCOPEN,
  814. WM8960_POBCTRL | WM8960_SOFT_ST |
  815. WM8960_BUFDCOPEN);
  816. /* Disable VMID and VREF */
  817. snd_soc_update_bits(codec, WM8960_POWER1,
  818. WM8960_VREF | WM8960_VMID_MASK, 0);
  819. break;
  820. case SND_SOC_BIAS_OFF:
  821. regcache_sync(wm8960->regmap);
  822. break;
  823. default:
  824. break;
  825. }
  826. break;
  827. case SND_SOC_BIAS_STANDBY:
  828. switch (snd_soc_codec_get_bias_level(codec)) {
  829. case SND_SOC_BIAS_PREPARE:
  830. /* Disable HP discharge */
  831. snd_soc_update_bits(codec, WM8960_APOP2,
  832. WM8960_DISOP | WM8960_DRES_MASK,
  833. 0);
  834. /* Disable anti-pop features */
  835. snd_soc_update_bits(codec, WM8960_APOP1,
  836. WM8960_POBCTRL | WM8960_SOFT_ST |
  837. WM8960_BUFDCOPEN,
  838. WM8960_POBCTRL | WM8960_SOFT_ST |
  839. WM8960_BUFDCOPEN);
  840. break;
  841. default:
  842. break;
  843. }
  844. break;
  845. case SND_SOC_BIAS_OFF:
  846. break;
  847. }
  848. return 0;
  849. }
  850. /* PLL divisors */
  851. struct _pll_div {
  852. u32 pre_div:1;
  853. u32 n:4;
  854. u32 k:24;
  855. };
  856. static bool is_pll_freq_available(unsigned int source, unsigned int target)
  857. {
  858. unsigned int Ndiv;
  859. if (source == 0 || target == 0)
  860. return false;
  861. /* Scale up target to PLL operating frequency */
  862. target *= 4;
  863. Ndiv = target / source;
  864. if (Ndiv < 6) {
  865. source >>= 1;
  866. Ndiv = target / source;
  867. }
  868. if ((Ndiv < 6) || (Ndiv > 12))
  869. return false;
  870. return true;
  871. }
  872. /* The size in bits of the pll divide multiplied by 10
  873. * to allow rounding later */
  874. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  875. static int pll_factors(unsigned int source, unsigned int target,
  876. struct _pll_div *pll_div)
  877. {
  878. unsigned long long Kpart;
  879. unsigned int K, Ndiv, Nmod;
  880. pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
  881. /* Scale up target to PLL operating frequency */
  882. target *= 4;
  883. Ndiv = target / source;
  884. if (Ndiv < 6) {
  885. source >>= 1;
  886. pll_div->pre_div = 1;
  887. Ndiv = target / source;
  888. } else
  889. pll_div->pre_div = 0;
  890. if ((Ndiv < 6) || (Ndiv > 12)) {
  891. pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
  892. return -EINVAL;
  893. }
  894. pll_div->n = Ndiv;
  895. Nmod = target % source;
  896. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  897. do_div(Kpart, source);
  898. K = Kpart & 0xFFFFFFFF;
  899. /* Check if we need to round */
  900. if ((K % 10) >= 5)
  901. K += 5;
  902. /* Move down to proper range now rounding is done */
  903. K /= 10;
  904. pll_div->k = K;
  905. pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
  906. pll_div->n, pll_div->k, pll_div->pre_div);
  907. return 0;
  908. }
  909. static int wm8960_set_pll(struct snd_soc_codec *codec,
  910. unsigned int freq_in, unsigned int freq_out)
  911. {
  912. u16 reg;
  913. static struct _pll_div pll_div;
  914. int ret;
  915. if (freq_in && freq_out) {
  916. ret = pll_factors(freq_in, freq_out, &pll_div);
  917. if (ret != 0)
  918. return ret;
  919. }
  920. /* Disable the PLL: even if we are changing the frequency the
  921. * PLL needs to be disabled while we do so. */
  922. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0);
  923. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0);
  924. if (!freq_in || !freq_out)
  925. return 0;
  926. reg = snd_soc_read(codec, WM8960_PLL1) & ~0x3f;
  927. reg |= pll_div.pre_div << 4;
  928. reg |= pll_div.n;
  929. if (pll_div.k) {
  930. reg |= 0x20;
  931. snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
  932. snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
  933. snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff);
  934. }
  935. snd_soc_write(codec, WM8960_PLL1, reg);
  936. /* Turn it on */
  937. snd_soc_update_bits(codec, WM8960_POWER2, 0x1, 0x1);
  938. msleep(250);
  939. snd_soc_update_bits(codec, WM8960_CLOCK1, 0x1, 0x1);
  940. return 0;
  941. }
  942. static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  943. int source, unsigned int freq_in, unsigned int freq_out)
  944. {
  945. struct snd_soc_codec *codec = codec_dai->codec;
  946. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  947. wm8960->freq_in = freq_in;
  948. if (pll_id == WM8960_SYSCLK_AUTO)
  949. return 0;
  950. return wm8960_set_pll(codec, freq_in, freq_out);
  951. }
  952. static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  953. int div_id, int div)
  954. {
  955. struct snd_soc_codec *codec = codec_dai->codec;
  956. u16 reg;
  957. switch (div_id) {
  958. case WM8960_SYSCLKDIV:
  959. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1f9;
  960. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  961. break;
  962. case WM8960_DACDIV:
  963. reg = snd_soc_read(codec, WM8960_CLOCK1) & 0x1c7;
  964. snd_soc_write(codec, WM8960_CLOCK1, reg | div);
  965. break;
  966. case WM8960_OPCLKDIV:
  967. reg = snd_soc_read(codec, WM8960_PLL1) & 0x03f;
  968. snd_soc_write(codec, WM8960_PLL1, reg | div);
  969. break;
  970. case WM8960_DCLKDIV:
  971. reg = snd_soc_read(codec, WM8960_CLOCK2) & 0x03f;
  972. snd_soc_write(codec, WM8960_CLOCK2, reg | div);
  973. break;
  974. case WM8960_TOCLKSEL:
  975. reg = snd_soc_read(codec, WM8960_ADDCTL1) & 0x1fd;
  976. snd_soc_write(codec, WM8960_ADDCTL1, reg | div);
  977. break;
  978. default:
  979. return -EINVAL;
  980. }
  981. return 0;
  982. }
  983. static int wm8960_set_bias_level(struct snd_soc_codec *codec,
  984. enum snd_soc_bias_level level)
  985. {
  986. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  987. return wm8960->set_bias_level(codec, level);
  988. }
  989. static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
  990. unsigned int freq, int dir)
  991. {
  992. struct snd_soc_codec *codec = dai->codec;
  993. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  994. switch (clk_id) {
  995. case WM8960_SYSCLK_MCLK:
  996. snd_soc_update_bits(codec, WM8960_CLOCK1,
  997. 0x1, WM8960_SYSCLK_MCLK);
  998. break;
  999. case WM8960_SYSCLK_PLL:
  1000. snd_soc_update_bits(codec, WM8960_CLOCK1,
  1001. 0x1, WM8960_SYSCLK_PLL);
  1002. break;
  1003. case WM8960_SYSCLK_AUTO:
  1004. break;
  1005. default:
  1006. return -EINVAL;
  1007. }
  1008. wm8960->sysclk = freq;
  1009. wm8960->clk_id = clk_id;
  1010. return 0;
  1011. }
  1012. #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
  1013. #define WM8960_FORMATS \
  1014. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  1015. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1016. static const struct snd_soc_dai_ops wm8960_dai_ops = {
  1017. .hw_params = wm8960_hw_params,
  1018. .hw_free = wm8960_hw_free,
  1019. .digital_mute = wm8960_mute,
  1020. .set_fmt = wm8960_set_dai_fmt,
  1021. .set_clkdiv = wm8960_set_dai_clkdiv,
  1022. .set_pll = wm8960_set_dai_pll,
  1023. .set_sysclk = wm8960_set_dai_sysclk,
  1024. };
  1025. static struct snd_soc_dai_driver wm8960_dai = {
  1026. .name = "wm8960-hifi",
  1027. .playback = {
  1028. .stream_name = "Playback",
  1029. .channels_min = 1,
  1030. .channels_max = 2,
  1031. .rates = WM8960_RATES,
  1032. .formats = WM8960_FORMATS,},
  1033. .capture = {
  1034. .stream_name = "Capture",
  1035. .channels_min = 1,
  1036. .channels_max = 2,
  1037. .rates = WM8960_RATES,
  1038. .formats = WM8960_FORMATS,},
  1039. .ops = &wm8960_dai_ops,
  1040. .symmetric_rates = 1,
  1041. };
  1042. static int wm8960_probe(struct snd_soc_codec *codec)
  1043. {
  1044. struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
  1045. struct wm8960_data *pdata = &wm8960->pdata;
  1046. if (pdata->capless)
  1047. wm8960->set_bias_level = wm8960_set_bias_level_capless;
  1048. else
  1049. wm8960->set_bias_level = wm8960_set_bias_level_out3;
  1050. snd_soc_add_codec_controls(codec, wm8960_snd_controls,
  1051. ARRAY_SIZE(wm8960_snd_controls));
  1052. wm8960_add_widgets(codec);
  1053. return 0;
  1054. }
  1055. static const struct snd_soc_codec_driver soc_codec_dev_wm8960 = {
  1056. .probe = wm8960_probe,
  1057. .set_bias_level = wm8960_set_bias_level,
  1058. .suspend_bias_off = true,
  1059. };
  1060. static const struct regmap_config wm8960_regmap = {
  1061. .reg_bits = 7,
  1062. .val_bits = 9,
  1063. .max_register = WM8960_PLL4,
  1064. .reg_defaults = wm8960_reg_defaults,
  1065. .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
  1066. .cache_type = REGCACHE_RBTREE,
  1067. .volatile_reg = wm8960_volatile,
  1068. };
  1069. static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
  1070. struct wm8960_data *pdata)
  1071. {
  1072. const struct device_node *np = i2c->dev.of_node;
  1073. if (of_property_read_bool(np, "wlf,capless"))
  1074. pdata->capless = true;
  1075. if (of_property_read_bool(np, "wlf,shared-lrclk"))
  1076. pdata->shared_lrclk = true;
  1077. }
  1078. static int wm8960_i2c_probe(struct i2c_client *i2c,
  1079. const struct i2c_device_id *id)
  1080. {
  1081. struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
  1082. struct wm8960_priv *wm8960;
  1083. int ret;
  1084. wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
  1085. GFP_KERNEL);
  1086. if (wm8960 == NULL)
  1087. return -ENOMEM;
  1088. wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
  1089. if (IS_ERR(wm8960->mclk)) {
  1090. if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
  1091. return -EPROBE_DEFER;
  1092. }
  1093. wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
  1094. if (IS_ERR(wm8960->regmap))
  1095. return PTR_ERR(wm8960->regmap);
  1096. if (pdata)
  1097. memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
  1098. else if (i2c->dev.of_node)
  1099. wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
  1100. ret = wm8960_reset(wm8960->regmap);
  1101. if (ret != 0) {
  1102. dev_err(&i2c->dev, "Failed to issue reset\n");
  1103. return ret;
  1104. }
  1105. if (wm8960->pdata.shared_lrclk) {
  1106. ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
  1107. 0x4, 0x4);
  1108. if (ret != 0) {
  1109. dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
  1110. ret);
  1111. return ret;
  1112. }
  1113. }
  1114. /* Latch the update bits */
  1115. regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
  1116. regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
  1117. regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
  1118. regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
  1119. regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
  1120. regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
  1121. regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
  1122. regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
  1123. regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
  1124. regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
  1125. i2c_set_clientdata(i2c, wm8960);
  1126. ret = snd_soc_register_codec(&i2c->dev,
  1127. &soc_codec_dev_wm8960, &wm8960_dai, 1);
  1128. return ret;
  1129. }
  1130. static int wm8960_i2c_remove(struct i2c_client *client)
  1131. {
  1132. snd_soc_unregister_codec(&client->dev);
  1133. return 0;
  1134. }
  1135. static const struct i2c_device_id wm8960_i2c_id[] = {
  1136. { "wm8960", 0 },
  1137. { }
  1138. };
  1139. MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
  1140. static const struct of_device_id wm8960_of_match[] = {
  1141. { .compatible = "wlf,wm8960", },
  1142. { }
  1143. };
  1144. MODULE_DEVICE_TABLE(of, wm8960_of_match);
  1145. static struct i2c_driver wm8960_i2c_driver = {
  1146. .driver = {
  1147. .name = "wm8960",
  1148. .of_match_table = wm8960_of_match,
  1149. },
  1150. .probe = wm8960_i2c_probe,
  1151. .remove = wm8960_i2c_remove,
  1152. .id_table = wm8960_i2c_id,
  1153. };
  1154. module_i2c_driver(wm8960_i2c_driver);
  1155. MODULE_DESCRIPTION("ASoC WM8960 driver");
  1156. MODULE_AUTHOR("Liam Girdwood");
  1157. MODULE_LICENSE("GPL");